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Required Senior Design Engineer, Networking, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, VHSIC Hardware Description Language (VHDL)), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power, and FPGA/silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Communicate and work with multi-disciplined and multi-site teams.

Required Staff Design Engineer, Networking, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will be part of a team developing application-specific integrated circuits (ASICs) used to accelerate networking in data centers. You will have multiple responsibilities in areas such as project definition, design, and implementation. You will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators.You will also be responsible for performance analysis for a networking stack using your knowledge.
Responsibilities
Lead an ASIC subsystem.
Understand how it interacts with software and other ASIC subsystems to implement data center networks.
Define hardware/software interfaces. Write micro architecture and design specifications.
Define efficient micro-architecture and block partitioning/interfaces and flows.
Collaborate closely with software, verification, and physical design stakeholders to ensure the designs are complete, correct, and performant.

We're looking for exceptional engineers to join our Signal/Power-Integrity and Packaging team. A team that sits where the Silicon meets the Board, bridging the gap between what happens internally at the DIE and the overall system interconnect and the external memories and peer devices.
What sets us apart:
Small team, yet a one stop shop for IP electrical integration at the DIE level, Package design, SI/PI simulations, Layout, Board-design and advanced lab characterization.
Combining Signal-Integrity and Layout, to come up with optimized Package and PCB designs.
Holistic view of the entire interconnect, from the DIEs metals, through the Package, to the PCB traces, and all the way to the peer device.
In-depth post-silicon characterization, using advanced measurement techniques, far exceeding traditional compliance measurements.
Deep dive mentality, in both theory and the bolts and nuts that make the internal circuitry of the electrical interfaces.

The SIP (Signal-Integrity & Packaging) team is part of Annapurna-Labs Chip development team.
The team is dealing with the external electrical interfaces of the device, from their Signal/Power-integrity and electrical usage perspectives.
The teams work includes close work with the BackEnd team on integrating these interfaces to the Die, the package layout design of the BGAs substrate, Signal and power integrity simulations, and working with the system team to come up with optimal pin-out and optimal PCB breakout schemes.

As a SIP team member, you will assume responsibility for all electrical aspects of physical interfaces of advanced I/Os, PLL, Memory and SerDes interfaces, from integration at the Die level, through SI/PI simulation and package layout, to reference board design aspects.

This position is for an experienced engineer with strong background in high-speed electrical interfaces, such as DRAM, PCIe, Ethernet SerDeses. The line of work is multi-disciplinary, combining Package-Design, Back-End integration of electrical IPs, SI/PI extractions & simulations.


Key job responsibilities
Deep dive into electrical IPs, integrated into the DIE;
I/O ring design and close work with Backend team on floor-planning all I/O interfaces at the DIE level.
Lead test studies of Die bump-out arrangements and Package substrate breakout.
Lead layout test studies of package pin-out arrangements and PCB board breakout.
Design large and complex package substrates.
Carry advanced SI/PI extractions and simulations to validate the design from the silicon to the peer device at the board level.

Required Micro-Architect
Description:
A global leader in control systems for quantum computing, a field on the verge of exponential growth.
Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands.
At our core olies a passionate and ambitious team committed to reshaping the construction and operation of quantum computers.
Our work is fueled by a deep understanding of customer needs, driving us to deliver unparalleled solutions in this revolutionary field.
Join our cutting-edge hardware development team as Micro-Architect and play a key role in defining and implementing the micro-architecture of advanced digital logic components.
What You'll Do:
Define and develop micro-architecture for complex logic blocks - from concept through high-quality RTL implementation
Collaborate closely with architecture, verification, design and software design teams
Write clear and detailed design specifications and drive architectural trade-off analysis
Optimize for performance and area
Contribute to innovation, methodology improvements, and technical leadership within the team.

We're looking for exceptional engineers to join our Signal/Power-Integrity and Packaging team. A team that sits where the Silicon meets the Board, bridging the gap between what happens internally at the DIE and the overall system interconnect and the external memories and peer devices.
What sets us apart:
Small team, yet a one stop shop for IP electrical integration at the DIE level, Package design, SI/PI simulations, Layout, Board-design and advanced lab characterization.
Combining Signal-Integrity and Layout, to come up with optimized Package and PCB designs.
Holistic view of the entire interconnect, from the DIEs metals, through the Package, to the PCB traces, and all the way to the peer device.
In-depth post-silicon characterization, using advanced measurement techniques, far exceeding traditional compliance measurements.
Deep dive mentality, in both theory and the bolts and nuts that make the internal circuitry of the electrical interfaces.

The SIP (Signal-Integrity & Packaging) team is part of Annapurna-Labs Chip development team.
The team is dealing with the external electrical interfaces of the device, from their Signal/Power-integrity and electrical usage perspectives.
The teams work includes close work with the BackEnd team on integrating these interfaces to the Die, the package layout design of the BGAs substrate, Signal and power integrity simulations, and working with the system team to come up with optimal pin-out and optimal PCB breakout schemes.
We are looking for highly motivated Electrical Engineering graduates, or engineers with up to 3 years' experience in related fields, to join our growing team specializing in Signal Integrity and IC Package Design. The position offers a unique entry point into a diverse and multidisciplinary domain.

Key job responsibilities
Work on advanced high-speed interfaces such as PCIe, DDR and Ethernet.
End-to-end solution of high-speed interfaces; from floor-planning at the DIE level, through Package and PCB routing, addressing both robust SI/PI considerations as well as optimizing layout routing.
Signal and power integrity modeling and simulation of high-speed interconnects using advanced SI/PI simulation tools.

We are seeking a sharp, innovative, and hands-on Architect to help shape the future of LLM inference at scale. Join our dynamic E2E Architecture group, where we build ground breaking systems powering the next generation of generative AI workloads. In this role, you will work across software and hardware domains to design and optimize inference infrastructure for large language models running on some of the most sophisticated GPU clusters in the world. Youll help define how AI models are deployed and scaled in production, driving decisions on everything from memory orchestration and compute scheduling to inter-node communication and system-level optimizations. This is an opportunity to work with top engineers, researchers, and partners across us and leave a mark on the way generative AI reaches real-world applications.

What Youll Be Doing:

Design and evolve scalable architectures for multi-node LLM inference across GPU clusters.

Develop infrastructure to optimize latency, throughput, and cost-efficiency of serving large models in production.

Collaborate with model, systems, compiler, and networking teams to ensure complete, high-performance solutions.

Prototype novel approaches to KV cache handling, tensor/pipeline parallel execution, and dynamic batching.

Evaluate and integrate new software and hardware technologies relevant to Core Spectrum-X technologies, such as load balancing, telemetry, congestion control, vertical application integration.

Work closely with internal teams and external partners to translate high-level architecture into reliable, high-performance systems.

Author design documents, internal specs, and technical blog posts and contribute to open-source efforts when appropriate.

Required Senior System Architect
As a Senior System Architect, you will:
Define and maintain the overall system architecture, ensuring scalability, reliability, security, performance and regulatory compliance
Develop long-term architectural roadmaps aligned with business objectives and regulatory requirements
Design scalable, resilient and highly available systems for data ingestion, processing, storage and presentation
Establish architecture standards, reference architectures, design patterns and technology selection guidelines
Evaluate new technologies and architectural approaches to improve system performance, maintainability and operational efficiency
Work closely with engineering, research, security and product teams to map solution requirements.

We're looking for a Backend Architect to be the technical authority across our engineering teams. This is a hands-on leadership role for someone who loves diving deep into complex systems while keeping the big picture in mind.
You'll work closely with three cross-functional development teams - shaping the backend architecture, driving engineering standards, and making sure we're building for scale, reliability, and long-term maintainability.
Responsibilities:
Own the backend architecture across all product domains - define patterns, set standards, and ensure hands-on involvement when it matters.
Be the go-to technical authority for backend engineers across three teams.
Identify technical debt, scalability risks, and performance bottlenecks - and drive the roadmap to address them.
Partner with team leads to elevate engineering practices: code quality, testing, CI/CD etc.
Collaborate with product and R&D leadership to align technical strategy with business goals.

Required Senior Platform Architect
Job Description:
The Customer Success Senior Platform Architect is an advisory role, responsible for helping our customers establish a technical foundation in the Platform and design solutions that deliver outcomes. The Senior Platform Architect ensures customers use leading practices around instance strategy, technical governance, core data, integrations and the health of the platform. This is a consultative role focused on guiding us, partner and customer employees on the engagement team to provide a solution on an architecture designed for long-term success.
You will work with the customer across executive, platform owner, enterprise architects, and development teams during the selling, structuring, and implementation of solutions.
Be an architectural advisor across multiple engagements to guide customers, partners, and internal team members to provide successful customer solutions.
Provide a variety of architectural knowledge across multiple workflows.
Develop relationships with CoEI and business leaders at the customer site to understand our role in their digital transformation vision.
Translate goals to outcomes into a customer roadmap.
Translate business information and technical requirements into an architectural blueprint to achieve complex goals.
Engage with the customer's Enterprise Architects to position us as the digital transformation platform standard, integrated with the customer's core applications.
Manage technical governance, and a delivery operating model and governance.
Ensure instance health by working with the engagement team to reduce technical debt and align to our leading practices.
Support the sales effort by scoping and estimating the engagement and change orders.
Be an active contributor of leading practices and expertise related to the platform. 

What Youll Actually Be Doing
Lead enterprise-scale architecture across strategic accounts - coordinating multiple architects, aligning on solution vision, and guiding customers from requirements through delivery.
Act as a trusted C-suite advisor, shaping how customers adopt Agentforce, Data Cloud, and AI-powered automation to transform their business processes
Partner with engagement managers and project teams to review implementation approaches, manage risks proactively, and ensure solutions are scalable and follow platform best practices.
Grow the team and the practice - mentoring architects, contributing to pre-sales, building internal knowledge, and representing Salesforces values through community and volunteering commitments.

CodeValue is looking for an experienced AI Solutions Architect to join our team and support the design and implementation of AI solutions across organizational systems. The role focuses on designing AI-based solutions to improve existing business processes, supporting development teams in implementing AI solutions, and defining scalable, secure, and compliant AI architectures. The position combines AI architecture, Cloud technologies, technical consulting, and cross-functional collaboration . This is not a pure hands-on development role; rather, it requires strong technical leadership, architectural thinking, and the ability to guide development teams throughout the implementation lifecycle.
Key Responsibilities Design and architect AI-based solutions for organizational and enterprise-wide use. Support development teams in planning and implementing AI solutions. Provide technical guidance and participate in POCs , including involvement at the code level when required. Define best practices and guidelines for the effective use of AI models. Develop technical procedures and guidelines for development teams while ensuring compliance with regulatory and information security requirements Design cross-organizational AI solutions, including solutions for making organizational data and information more accessible. Work with external vendors and partners on AI-based projects , including technical guidance, coordination, and quality control. Troubleshoot complex technical challenges and provide architectural solutions. Lead and coordinate technology initiatives and work closely with multidisciplinary teams. Support teams in adopting AI technologies and integrating them into existing systems and processes.

We are looking for a Senior Cloud Infrastructure and DevOps Solutions Architect to join its Infrastructure Specialist Team. Academic and commercial organizations around the world are using our products to redefine deep learning and data analytics, and to power next-generation data centers. Join the team building and advising on many of the largest and fastest AI/HPC systems in the world!

We are looking for someone who combines deep technical expertise with strong consulting and communication skills. This role will engage directly with customers, partners, and cross-functional teams to assess, architect, and guide the implementation of large-scale infrastructure projects. The scope spans system architecture, Kubernetes-based platforms, and automation-serving as both a trusted advisor and a hands-on technical leader.

What Youll Be Doing:

Advise on and help maintain large-scale computational and AI infrastructure, including monitoring, logging, and workload orchestration (Kubernetes and Linux job schedulers).

Provide consultative guidance and perform hands-on troubleshooting across the full stack-from bare metal and operating system, through the software stack, container platform, networking, and storage.

Assess customer environments and recommend optimized, production-ready Kubernetes-based container platforms integrated with enterprise-grade networking and storage solutions.

Serve as a key technical resource: develop, refine, and document standard methodologies and operational guidelines to be shared with internal teams and customer stakeholders.

Support Development activities and engage in POCs/POVs to validate new features, architectures, and upgrade approaches.

Create and deliver high-quality documentation, including runbooks, onboarding materials, and best-practice guides for customers and internal teams.

Act as the technical leader for assigned customer accounts, providing strategic guidance on DevOps and platform architecture and influencing long-term infrastructure and operations decisions.

we are looking for a R&D Architect Director.
What youll do:
Drive new technologies and frameworks - extending capacity & effectiveness of teams, capacity & scalability of the product - for both server and client side
Be involved in all key technology and methodological aspects of development and testing
Take an active role and lead key product enhancements, per product-management and stakeholders requirements, and select the right development solutions to address the requirements in terms of functionality, reliability, testability, and scalability
Be involved in business needs and operational flows to come up with the right technology solutions
Mentor and lead R&D teams in design reviews, coding standards, and architectural designs
Drive AI adoption across R&D - both as a development accelerator (coding tools, agents, MCPs) and as a capability embedded in the product

We are looking for a Staff QA Architect to join our elite team, contributing to the development of one of our strategic products for Cloud Security.
In your role, you will be responsible for developing and maintaining high-quality work procedures, leading the team to achieve better quality.
You will be involved in the full feature lifecycle - from gathering requirements with the product team to release - ensuring quality at every stage, including bug management and observability and defining QA work procedures, guidelines, and designing the entire testing process.
The ideal candidate will be responsible for leading quality activities across solution-level features, ensuring the highest standards of quality are met. This role requires a proactive individual with excellent leadership and communication skills, capable of driving quality initiatives and fostering a quality-focused mindset within the organization.
Comprehensive understanding of the product's functionality, target use cases, and the value it delivers to customers.
Lead the quality efforts across multiple interfaces with a proactive and assertive approach, serving as the key point of contact for all quality-related matters.
Define, implement, and manage QA processes, promoting a quality-driven culture and managing the quality backlog.
Define the overall testing strategy and tooling stack across integration, regression, and load/performance testing.
Drive an automation-first approach - collaborating with developers to ensure code is testable and observable.
Lead root-cause analysis for escaped bugs and define improvement actions.
Own CI quality metrics and dashboards (e.g., build stability, test flakiness, regression coverage).
Influence decisions regarding test environments, mocks, test data, and production parity.
Collaborate with the centralized quality group to ensure E2E test coverage.
Quality Point of Contact: Serve as the primary point of contact for quality-related matters concerning the unit or the cross-group feature.

Shape the Future of AI Infrastructure with our company
This is a rare opportunity to join one of the fastest-growing infrastructure companies in tech history, right at the epicenter of the AI revolution.
Recognized by Forbes as "the future of the market," our company is building the foundational enterprise software powering the AI era. We engineer platforms that capture, catalog, refine, and protect massive datasets across data centers, edge, and cloud, making real-time analytics, AI training, and inference simpler and faster than ever before.
Our explosive growth is fueled by relentless engineering innovation, a customer-first mindset, and a team of fearless company ronauts who thrive on solving computing's hardest problems. Join us at this pivotal moment in technology history and make a lasting impact on how the world processes data.
We are seeking a talented and experienced Software Engineer to design, build, and optimize high-performance distributed systems, core data engines, and backend infrastructure. This role requires deep system-level architecture understanding, the ability to handle large-scale clusters processing petabytes of data, and mastery of modern C/C++ and Linux environment internals.