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We are seeking a high-caliber, multidisciplinary Hardware Systems Architect & Tech Lead to serve as the technical cornerstone of our hardware development and system integration.
In this role, you will bridge high-level system requirements with physical deployment reality, acting as the designated "Tech Lead" driving day-to-day engineering execution.
This role demands a "System of Systems" mindset. Beyond engineering our core SDR and RF hardware architectures, you will orchestrate the physical, logical, and electrical integration of complex tactical sensor suites - incorporating software-defined radios, active/passive radar arrays, electro-optical (EO/IR) cameras, and jamming payloads.
You will steer the hardware through its entire lifecycle (PLCM) while implementing flawless Design for Excellence (DFx) frameworks.
KEY RESPONSIBILITIES:
System of Systems Integration: Architect, model, and define hardware-level interfaces and high-speed data flow paths for multi-sensor integration (SDR, Active/Passive Radar, EO/IR Cameras, and RF Jamming payloads).
Requirements Definition: Translate high-level operational and product demands into detailed, actionable hardware and system-level requirements, Interface Control Documents (ICDs), and structural specifications.
System Modeling: Establish and manage rigorous physical power, thermal, high-speed data bandwidth, and RF link budgets for deeply integrated tactical configurations.
Technical Ownership: Direct day-to-day engineering activities, lead comprehensive design reviews, and serve as the final authority on architectural and hardware design trade-offs.
Product Lifecycle Management (PLCM): Guide hardware products smoothly through the entire lifecycle-from early concept and prototyping to mass production, validation, field deployment, and subsequent obsolescence management.
Cross-Functional Orchestration: Align and coordinate specialized teams across RF/Analog, high-speed digital, FPGA, embedded software, and mechanical engineering to achieve seamless hardware/software synergy.
Test Strategy Definition: Architect and define the end-to-end testing, verification, and validation (V&V) strategy for complex hardware-software systems.
Progressive Integration: Design and oversee methodical integration plans, successfully migrating subsystems from standalone bench testing to full "System of Systems" integration.
System Verification: Oversee high-reliability Hardware-in-the-Loop (HIL) testing, RF performance verification, and automated test regression setups.
Operational Validation: Partner with field testing and QA teams to design real-world tactical validation scenarios (including drone flight trials and complex RF interference environments) to ensure top performance in the field.
DFx Implementation: Drive critical design decisions optimizing for manufacturability (DFM), automated testing (DFT), reliability (DFR), and target cost (DFC) without sacrificing tactical performance.

We are a top global leader, manufacturing smart energy solutions. The company's broad range of products encompasses intelligent inverter and Storage systems, revolutionary EV charger, and by doing that, we are changing the way electricity is being produced and consumed around the world. In this position, We looking for talented Hardware Engineer with R&D Experienced who ready to change the job title to FA Engineer in Q&R. you will be involved in various aspects of the electronic design. As we put a high value on providing best in class product quality and reliability, you will play a critical role in the success of the overall organization. You will be responsible for conducting failure analysis during manufacturing process or service period, determine the root causes and define corrective actions to prevent future occurrences and make sure we are producing best products worldwide. In this position, you will bring deep theoretical background and multidisciplinary understanding.
What you will be doing:
* Performing design review for our different products from the system and architecture level through implementation in design and layout.
* Lead failure analysis processes for company's products. Determine root cause for failures under investigation and implement corrective actions.
* Support Electrical failure analysis process in production and train technicians
 
Country:
Israel
City:
Herzliya

Join us as a Hardware Board Design Engineer, where you will contribute to complex design projects and the development of cutting-edge communication systems. In this role, you will design high-performance boards for advanced avionics systems, working as part of a professional hardware design team. Your expertise will drive innovation and ensure the highest standards of quality in our products.

Responsibilites
End to end boards design.
Starting from the component's selection and evaluation, schematic design, thermal considerations, mechanical constraints.
Layout design, production supervision, bring-up on lab.
Including all the relevant document writing and conducting the design reviews needed until the product is finished.
Leading products from the definition until their release.
Supporting production when needed.

Own full hardware development lifecycle - architecture, design, bring-up, integration, and validation.
Manage and lead the hardware engineering team and hardware architecture.

Required Design and Power Methodology Manager, Servers, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As part of our Server Chip Design team, you will use your ASIC design experience to be part of a team that creates the SoC VLSI design cycle from start to finish. You will collaborate closely with design and verification engineers in active projects, creating architecture definitions with RTL coding, and running block level simulations.
As a Design and Power Methodology Team Manager within the Server Chip Design team, you will be responsible for managing and leading design and power methodologies from IP to SoC, pre and post silicon. You will be responsible for mentoring and developing team members and tech leads while driving improvements in leadership, technical execution, and design flows.
You will work closely with CAD vendors and internal teams to develop lead design and power methodology and execution.
Responsibilities
Manage a team of tech leads and designers. Develop and mentor team members, and communicate and co-work with multi-disciplined and multi-site teams.
Lead flow and methodology development and assimilation across multiple groups. Work closely with CAD tool providers as well as internal CAD teams.
Plan, execute, track progress, assure quality, and report status.
Work closely with internal customers and support multiple activities and deliverables.
Drive design methodologies such as design construction, CDC, RDC, SDC. Drive power at: IP and SoC RTL/Gate Level Optimization, estimation, correlation.

As a Pre-Silicon Verification Engineer, you'll work at the heart of chip development, collaborating across teams to ensure our semiconductor platforms meet the highest standards before they reach production.
IO verification team will expose you to the most advanced technologies , as we lead the market with our leaving devices - youll soon have to expertise most advance protocols.

In this role, you'll engage in pre-silicon verification work that connects every phase of our product development journey- from initial product definition through firmware and software development.
You'll collaborate with hardware designers, software engineers, and cross-functional teams to validate complex semiconductor architectures and protocols.
Your days might include developing and executing verification test plans, analyzing simulation results, troubleshooting design issues, and participating in design reviews.
You'll work with advanced verification methodologies and tools, gaining exposure to cutting-edge technologies that define the next generation of cloud infrastructure.

Key job responsibilities
Develop and execute comprehensive verification plans and test cases using industry-standard methodologies and tools.
Design and implement verification environments and testbenches to validate hardware functionality and performance.
Collaborate with hardware design and software teams to identify, analyze, and resolve design issues and verification gaps.
Analyze simulation results and coverage metrics to ensure thorough validation of semiconductor designs.
Contribute to the continuous improvement of verification processes, tools, and methodologies.

we are looking for a Senior HW architect.
What will you be doing?
Lead research, evaluation, and architectural definition of next-generation chips - from requirements through production.
Define next-generation Packet Processor / Datapath / Congestion Management architectures for high-performance, complex SoC Ethernet Switches.
Design the system architecture and detailed micro-architecture definition across major functional blocks.
Collaborate closely with design, verification, and modeling teams to ensure architectural intent is fully realized.
Work cross-functionally with other architecture teams to shape cohesive system solutions.
Explore and evaluate new technologies and innovative approaches for future products.

We are looking for an experienced Board Design Engineer to support the design and development of complex mixed-signal and high-speed digital boards for advanced medical systems. You will join our multidisciplinary team in CT organization.
Your role :
Design and develop multi-layer high-speed PCBs and define layout constraints
Perform component selection and schematic design
Design power management circuits (including DC-DC converters and power distribution)
Design and support analog circuits and boards
Support EMC/EMI tests
Lead board bring-up, validation, and lab debugging. Troubleshoot system-level HW/FW issues
Support high-speed interfaces such as DDR4/DDR5, PCIe, and Ethernet
Support Install Base (IB) activities , field investigations, and NPI activities
Support Lifecycle Management (LCM) tasks, including EOL handling
Work with PCBA vendors on production, manufacturing issues, and yield improvements
Search for component alternatives, test and approve replacements
Work with PLM (Product lifecycle Management) system and support ECO creation and release

Required CPU Emulation Technical Lead, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next-generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Define the emulation strategy, identify platforms and technologies to support all customers.
Explore emulation methodologies, gather feedback from customers, and implement emulation workflows at scale.
Support emulation customers with debugging hardware, software, tooling, and project-specific issues.
Create tooling and automation to support emulation tools, licensing, and job management in our infrastructure.
Act as a primary interface to emulation vendors.

We are seeking a highly skilled Senior Communication PHY Algorithms Engineer.
This senior role is focused on the end-to-end research, design, and implementation of digital receivers for proprietary drone communication signals.
Responsibilities:
Mathematically characterize complex communication and signal detection problems. Analyze and assess design trade-offs based on both performance metrics and implementation complexity.
Develop and maintain simulations using MATLAB and Python.
Design digital receiver modules to be implemented either by FPGA of SW.
Implement features directly in SW or technically lead and verify the FPGA implementation efforts of the FPGA engineer.
Accompany the integration process of the feature until its end-to-end operation.

Required Senior Silicon Validation Engineer, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Define, develop and execute post-silicon validation content on both pre-silicon setups and real silicon platforms in the lab.
Drive silicon from being a chip towards becoming a product.
Debug and investigate issues along cross-functional teams such as firmware, software, design, design verification (DV), architecture (ARCH) and multiple production teams.
Provides a quality functional coverage for our designs.

Required ASIC Design & Verification Engineer
Meet the Team
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
We are transforming the industry with a unified, programmable architecture powering our future routing portfolio and shaping the Internet for decades to come.
Your Impact:
Review micro-architecture specifications
Implement Verification environment UVM based
Collaborate with Design engineers to resolve bugs and achieve coverage closure
Work with the firmware/Lab teams to verify chip flows
Perform debug, root-cause analysis, and post-silicon validation in the lab.

abra is seeking for an board design . A leading technology company is looking for an electronics engineer to design and edit electronic cards (board design), from the initial development stage to transfer to production and support throughout its entire life cycle. The role combines work on a wide variety of projects and technologies, in a dynamic environment that requires mental flexibility and the ability to work on several advanced tasks. Responsibilities • Design and edit printed circuit boards (PCB) from the schematic to layout stage. • Development of electronic boards combining: microcontrollers, digital and analog systems, sensors, communication interfaces, power supplies (power), etc. • Support cards from the initial development stage to the final product. • Work with production - transfer cards to production, testing and production of revisions. • Perform several revisions to cards at levels Various designs. • Work on multiple projects at a time and at a fast pace of development. Location: Rishon LeZion, full-time, Sunday-Thursday

The EyeC VLSI team designs cutting-edge chips for RADAR systems used in ADAS and autonomous vehicles and is looking for an experienced DFT Engineer.
This is a unique opportunity to join a team of top-tier engineers working with the most advanced technologies to develop Autonomous Vehicle (AV) SoCs. Every engineer in our team plays a broad and diverse role, taking on significant responsibilities, being involved in critical development stages, and making a direct impact on the success of our projects.
What will your job look like:
You'll be responsible for the architecture of DFT solutions across the SOC (MBIST, SCAN, ATPG, LBIST and more).
Develop all the necessary RTL for the different modules.
Verify and Validate your design in GLS.
Develop ATPG to the highest requirements of Functional Safety (ISO26262).
Debug and analyze coverage and yield loss.
Support production activities and Si debug.