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The Chip Test Engineer plays a crucial role in designing, developing, and implementing automated test for IC chips and systems for Automotive industry.
The Test Engineer is responsible to define and develop tests, design test features, program test scripts, and analyze test results to ensure the quality and functionality of products.
The Test Engineer collaborates with cross-functional teams to troubleshoot issues, improve test processes, and support product development efforts.
Responsibilities:
Develop and implement test strategies, plans, and procedures for ATE systems to ensure comprehensive testing of ICs.
Design and develop test features, test programs, and test scripts for automated test environment (ATE) based on product specifications and requirements.
Collaborate with design engineers, product manager, production vendors and manufacturing teams to understand product functionality, performance requirements, and testability considerations.
Conduct feasibility studies and risk assessments to identify potential challenges and develop mitigation strategies for test development and implementation.
Develop test program based on code languages C++ , Java and Python.
Debug, troubleshoot, and resolve issues with ATE hardware, software, and test scripts to ensure reliable and accurate test results.
Analyze test data and results to identify trends, anomalies, and potential defects, and provide feedback to design and development teams for product improvement.
Develop and maintain documentation for test procedures, specifications, and configurations.
Collaborate with vendors and suppliers to evaluate and select ATE equipment, components, and software tools that meet project requirements and performance standards.
Stay abreast of industry trends, advancements in test technologies, and best practices in automated testing to drive continuous improvement in test processes and methodologies.

we are looking for a passionate Software Engineer to join our Chip Design CAD team. In this role, you will experience the interesting junction of electrical and software engineering, when developing SW tools and solutions used to design the next generation Smart Adapters, Switches and GPUs for the advanced data centers across the world.
You will join us as a software engineer dedicated to the connectivity and reliability of our product ecosystem. Your focus will be engineering the integration layers that allow our CAD tools to seamlessly interact with the companys wider infrastructure and projects.
What you'll be doing:
Own the Integration Framework: Architect and maintain the Python-based framework connecting our CAD tools to the internal ecosystem, driving a code-first approach to automate delivery pipelines and integration events.
Cross-Team Compatibility: Collaborate with other engineering groups to design resilient interfaces, ensuring our tools remain compatible with the broader ecosystem as we release new features
Continuous Improvement: Proactively identify friction points in our current processes and implement software solutions to resolve them.

We develop cutting-edge technology in Silicon Photonics, revolutionizing connectivity and communication in data centres. Silicon photonics is becoming a standard technology used for high-performance systems, solving challenges of performance, integration, power, and cost. This technology is growing rapidly also in other markets such as Healthcare, LIDARs, and other sensors.
We are looking to solve difficult problems, smartly and simply, by thinking out of the box, leveraging the knowledge and know-how of the team members, and working as a team to create Magic. Our Company culture is characterized by accountability for our ethics, and for being fair to every employee, customer, supplier, and partner. We believe we must work hard and have fun on the way to success.
We are looking for a Photonics Layout Engineer to join our integrated photonics design team - This position is also well-suited for Analog Layout Engineers who are interested in transitioning into photonic integrated circuit (PIC) design.
In this role, you will be responsible for creating, optimizing and validating PIC layouts, ensuring manufacturability, performance and compliance with foundry design rules. You will work closely with device designers, process engineers, and tape-out teams to deliver high-quality layouts of silicon photonics PICs. Strong candidates will have hands-on experience with industry-standard layout tools, especially Cadence Virtuoso or similar software. Understanding of photonic components, waveguide routing and automated layout generation is a major advantage. You will also contribute to layout methodologies, PCells, and design automation flows to accelerate PIC development.
Responsibilities:
Develop and implement mask layouts for photonic integrated circuits using Cadence Virtuoso or similar software. Create and maintain PCells for photonic building blocks (waveguides, couplers, modulators, gratings, etc.). Perform waveguide routing, ensuring correct connectivity, bend radius limits, and low-loss optical paths. Verify layouts using DRC, and LVS to ensure compliance with foundry requirements. Collaborate with device designers to translate basic schematics and specifications into Software schematics and manufacturable layouts. Optimize layouts for performance, yield, and compactness while adhering to technology constraints. Participate in photonic design automation tool development and workflow improvements. Prepare and manage data for tape-out and support mask review processes. Debug layout and rule-check issues and propose corrective actions.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a SoC Physical Design Engineer, you will collaborate with functional design, Design for Testing (DFT), architecture, and packaging engineers. In this role, you will solve technical problems with innovative micro-architecture and practical logic circuits solutions, while evaluating design options with optimized performance, power, and area in mind.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Use problem-solving and simulation techniques to ensure performance, power, and area (PPA) are within defined requirements.
Collaborate with cross-functional teams to debug failures or performance shortfalls and meet program goals in lab or simulation.
Design chips, chip-subsystems, or partitions within subsystems from synthesis through place and route, and sign off convergence, ensuring that the design meets the architecture goals of power, performance, and area.
Develop, validate, and improve Electronic Design Automation (EDA) methodology for a specialized sign off or implementation domain to enable cross-functional teams to build and deliver blocks that are correct by construction and ease convergence efforts.

we are looking for best-in-class Chip Verification Engineers to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.
What youll be doing:
Verification for chip blocks/entities according to specifications
Integrations and Full-Chip models
Interaction with organization-wide groups.

We are looking for talented people to join us, as leaders in our excellent Physical Design team, adopting super advanced process nodes, mentoring team members, and further developing our implementation methodologies.
Key job responsibilities
* Daily involvement in all aspects of physical design chip development (RTL2GDS), including floorplanning, synthesis, clock tree synthesis, place and route, static timing analysis, power and noise analysis, physical verification testing, and equivalence checks.
* Being actively engaged in design-backend convergence aspects and defining timing constraints.
* Taking full end-to-end responsibility for the physical design of macros and clusters level, according to specifications, under challenging constraints, with focus on optimizing power, area, and performance.
* Participation in the development of design flows, using a variety of EDA tools and vendors such as Synopsis and Cadence.
* Engaged in defining implementation and signoff methodologies.
A day in the life
Your day will be a dynamic blend of technical innovation and collaborative problem-solving. You'll dive deep into intricate chip design processes, working with state-of-the-art tools and technologies to create semiconductor solutions that drive cloud computing forward. Expect to engage in complex design challenges, collaborate with brilliant engineers, and see your work directly impact global technological advancement.

We are now looking for a Chip Design Verification Engineer. we are seeking a verification engineer to join the chip design methodologies team. The team is in charge of the verification methodologies, shared code, training, and embracing new technologies. One of our main goals is to make sure that the team works in an efficient manner, and provides high-quality deliveries. This position offers the opportunity to have real impact in a dynamic, technology-focused company.
What you'll be doing:
Develop shared verification code and solutions to be widely used by the chip design team.
Develop groundbreaking methodologies to create a flawless experience for verification engineers to keep the focus on new problems.
Collaborate with the design automation team to provide end-to-end solutions that combine verification, simulation, and automation.
Get in touch with EDA vendors to learn about cutting-edge tools/technology and apply them into our verification process.
Understand the design, define the verification scope, develop the verification infrastructure and verify the correctness of the design.
Collaborate with designers, verification specialists to accomplish your tasks.
Develop training sessions.

We are looking for a passionate and experienced software developer to join our Chip Design Technologies group, helping to build the tools that shape the future of Chip Design and Verification. This role is at the intersection of software engineering and hardware design. Youll work on the software that accelerates the development of our industry-leading networking chips highway for the AI revolution.

We're looking for someone who combines strong coding skills with a solid understanding of chip design or verification. If youre excited about solving technical bottlenecks, building scalable tools, and collaborating with designers and verification experts, youll feel right at home here.

What youll be doing:

Develop software tools for our chip design and verification flows

Collaborate closely with designers and verification engineers to identify bottlenecks, propose improvements, and build software solutions that boost productivity and quality.

Own your solutions end-to-end from idea to delivery to support.

we ae looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
Own the special chiplet STA, analyze the timing results, verify correctness and provide budget for the different partitions.
Generate the timing constraints for the STA and the P&R flow.
Be exposed and work on a variety of exciting designs (including high cell count and high frequency), resolving complex timing and congestion problems.
Help to shape clock tree, and effect the work of the different teams (Front end, DFT & BE).
Daily work involves all aspect of STA & chip design: take part in SDC generation & review, actively running & analyzing STA tools, guiding the group during chip closure process, etc'.
Taking part inflows development.
Take part in ramping up new breaking technologies.

We are driving innovation in automotive technology, developing solutions that power the next generation of vehicles. We are looking for a Junior Engineer who is eager to learn, grow, and make an impact in a dynamic and innovative environment. This is a unique opportunity to work alongside experienced professionals, gain hands-on experience, and contribute to projects at the forefront of automotive electronics. If you are passionate about technology, curious to explore new challenges, and excited to make a real difference, we are the place to develop your skills, innovate, and grow your career.
Why join us?
* Work on cutting-edge automotive projects.
* Learn from a talented and supportive team.
* Gain exposure to real-world automotive challenges.
* Grow your career in a collaborative and inspiring environment.
If youre ready to take the next step in your career and be part of something meaningful, wed love to meet you!
About The Position:
As a Junior ASIC Design Engineer, you will take part in the full lifecycle of advanced chips that power the next generation of vehicles. This is a hands-on, growth-oriented role where youll work closely with experienced ASIC engineers, gain exposure to real silicon, and build a strong foundation in chip design and verification. In this role, you will:
* Be part of a professional ASIC team working on cutting-edge automotive solutions.
* Support and learn from real emulation platforms used in production-grade designs.
* Contribute to RTL implementation and gain practical experience in design flows.
* Assist with verification and backend (BE) activities, learning industry best practices.
* Participate in silicon bring-up, seeing your work come to life on real hardware This position is ideal for curious engineers who want to learn fast, take ownership, and grow into a key contributor in the world of automotive semiconductor design.

Join our advanced packaging team to define and develop cutting-edge semiconductor package solutions for automotive-grade digital and RF System-on-Chip (SoC) products. Youll collaborate with internal teams and external OSATs to deliver high-performance, manufacturable, and reliable packages that meet stringent automotive standards.
What will your job look like:
Define and specify advanced package architectures for digital SoCs and RF ICs in automotive applications.
Perform substrate design for flip-chip BGA (FC-BGA) packages, including stack-up, routing, and ball-out optimizations.
Evaluate and select substrate technologies, materials, and package solutions based on performance, cost, and reliability.
Collaborate with OSATs to define and validate assembly materials and process flows.
Work closely with internal teams such as Backend, SIPI, Product Engineering, and Quality & Reliability to ensure seamless integration.
Monitor yield, quality, and manufacturability across package development and production stages.
Support DFM reviews and ensure compliance with automotive standards and customer requirements.

Join our advanced packaging team to define and develop cutting-edge semiconductor package solutions for automotive-grade digital and RF System-on-Chip (SoC) products. Youll collaborate with internal teams and external OSATs to deliver high-performance, manufacturable, and reliable packages that meet stringent automotive standards.
What will your job look like:
Define and specify advanced package architectures for digital SoCs and RF ICs in automotive applications.
Perform substrate design for flip-chip BGA (FC-BGA) packages, including stack-up, routing, and ball-out optimizations.
Evaluate and select substrate technologies, materials, and package solutions based on performance, cost, and reliability.
Collaborate with OSATs to define and validate assembly materials and process flows.
Work closely with internal teams such as Backend, SIPI, Product Engineering, and Quality & Reliability to ensure seamless integration.
Monitor yield, quality, and manufacturability across package development and production stages.
Support DFM reviews and ensure compliance with automotive standards and customer requirements.

We are now looking for a Chip Design Verification Engineer. we are seeking a verification engineer to join the chip design methodologies team. The team is in charge of the verification methodologies, shared code, training, and embracing new technologies. One of our main goals is to make sure that the team works in an efficient manner, and provides high-quality deliveries. This position offers the opportunity to have real impact in a dynamic, technology-focused company.
What you'll be doing:
Develop shared verification code and solutions to be widely used by the chip design team.
Develop groundbreaking methodologies to create a flawless experience for verification engineers to keep the focus on new problems.
Collaborate with the design automation team to provide end-to-end solutions that combine verification, simulation, and automation.
Get in touch with EDA vendors to learn about cutting-edge tools/technology and apply them into our verification process.
Understand the design, define the verification scope, develop the verification infrastructure and verify the correctness of the design.
Collaborate with designers, verification specialists to accomplish your tasks.
Develop training sessions.

Required Chip Design Student, Graviton Server
A fabless semiconductor company established by semiconductor industry veterans and is now part of Amazon. We are developing leading edge products, manufactured on leading edge technologies. We offer a dynamic, open, teamwork environment operating at high pace mode.
About the team
Diverse Experiences
AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasnt followed a traditional path, or includes alternative experiences, dont let it stop you from applying.
Why AWS?
We are the worlds most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating thats why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses.
Inclusive Team Culture
AWS values curiosity and connection. Our employee-led and company-sponsored affinity groups promote inclusion and empower our people to take pride in what makes us unique. Our inclusion events foster stronger, more collaborative teams. Our continual innovation is fueled by the bold ideas, fresh perspectives, and passionate voices our teams bring to everything we do.

Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Architect will take charge of defining a processor on chip inter-connect and coherent fabric that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.