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24/09/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
As we expand our presence in Israel, we're seeking a visionary Staff DFT Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, ensuring the reliability and testability of chips that power the world's largest AI clusters.

As a Staff DFT Engineer, you will be at the intersection of architecture, design, and production. You won't just run tools-you will be a foundational member of the team responsible for the entire lifecycle of our silicon's reliability. From defining initial DFT architecture to supporting post-silicon bring-up, your work ensures that the backbone of AI infrastructure connectivity is flawless and scalable. If you thrive on solving complex challenges in deep-submicron processes and want to establish world-class DFT methodologies, this is your opportunity.

Key Responsibilities

DFT Architecture & Strategy
Own the DFT journey from high-level architecture definition and RTL design to backend implementation and post-production support.
Develop comprehensive Design-for-Testability (DFT) strategies for next-generation connectivity platforms, ensuring chips meet the highest quality standards.
​DFT architectures including JTAG/iJTAG, MBIST, Scan, and ATPG methodologies.

Test Pattern Development & Optimization
Generate and optimize high-quality test and debug patterns for production.
Perform Static Timing Analysis (STA) for DFT modes and conduct gate-level simulations to ensure robust performance.
Drive test coverage and quality metrics to meet stringent manufacturing requirements.

Cross-Functional Collaboration & Methodology Innovation
Act as a multidisciplinary bridge, collaborating closely with Architecture, Verification, and Backend teams to ensure seamless integration and optimal QoR.
Participate in developing and maintaining cutting-edge DFT implementation flows.
Automate and improve methodologies using advanced scripting and tools.
Requirements:
Basic Qualifications
Bachelor's degree in Electrical Engineering or related technical field.
8+ years of hands-on experience in DFT roles at semiconductor companies.
Deep expertise in DFT flows and architectures including JTAG/iJTAG, MBIST, Scan, and ATPG.
Proficiency with industry-standard EDA tools from Synopsys (TestMAX) or Mentor (Tessent).
Strong understanding of logic design, verification, debug, and Static Timing Analysis (STA).
Scripting proficiency in Tcl, Perl, Python, or Shell for automation and innovation.


Preferred Qualifications
Master's degree in Electrical Engineering or related field.
Knowledge of high-speed interface protocols (PCIe, Ethernet, CXL, UALink) and their specific test requirements.
Experience in chip bring-up and mass production activities.
Background in advanced process technologies (7nm and below).
Excellent communication skills with ability to work effectively in global team environments.
This position is open to all candidates.
 
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06/10/2026
Location: Rosh Haayin
Job Type: Full Time
we are looking for a Senior RF & PHY Systems Engineer.
Serve as the technical focal point for advanced RF and physical layer (PHY) modem systems, driving the definition, analysis, and hands-on performance verification of next-generation wireless architectures. In this role, you bridge baseband signal processing and analog RF hardware, taking architectural and technical ownership of link performance, system behavior, and end-to-end functionality.
Requirements:
Experience: 8+ years of hands-on engineering experience in RF and physical layer (PHY) system design, analysis, or performance engineering for wireless communications.
System & Performance Scope: Proven track record defining and executing system evaluations associated with RF, baseband, PHY, and modem performance.
Programming & Data Analysis: Advanced proficiency in Python and/or MATLAB for algorithm validation, data analysis, instrument automation, and custom test script development.
RF Test & Measurement Expertise: Deep practical knowledge in operating high-frequency RF test equipment, including spectrum analyzers, signal generators, power meters, and vector network analyzers (VNAs).
System Debugging Intuition: Exceptional deep-dive debugging skills capable of isolating issues across the boundaries of RF, digital hardware, and physical layer software.
RF Principles: Solid understanding of RF chains and parameters, including Noise Figure (NF), third-order intercept point (IP3), return loss (RL), and receiver architectures (Superheterodyne / Zero-IF).
Communication & Documentation: Excellent verbal and written communication skills in English, with a proven ability to author technical system documents and specifications.
Nice to have:
Digital Communications & Impairments: Practical knowledge of I/Q modulation (QAM, PSK), Digital Predistortion (DPD), Automatic Gain Control (AGC), and Error Vector Magnitude (EVM) characterization.
Cross-Functional Interface: Experience acting as a technical bridge or focal point communicating directly with RFIC design, algorithm, software, and firmware teams.
Engineering Mindset: Strong pragmatic problem-solving skills, broad system-level perspective, and a collaborative approach in multidisciplinary engineering environments.
This position is open to all candidates.
 
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24/09/2026
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
As we expand our presence in Israel, we're seeking a talented Senior Emulation Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful ownership in a new site, implementing the emulation strategy for chips that power the world's largest AI clusters.

As an Senior Emulation Engineer, you will be a core technical driver of our Israel R&D center, working at the intersection of hardware and software to ensure our silicon meets extreme quality and performance targets. You will execute end-to-end emulation flows, bridge the gap between RTL and functional validation, and partner with cross-functional teams to enable seamless hardware-software integration. If you thrive on solving complex technical challenges and want to play a key role in validating cutting-edge AI infrastructure connectivity solutions, this is your opportunity.

Key Responsibilities

Emulation Flow Execution & Implementation
Execute end-to-end emulation flow from high-level model generation and RTL synthesis to complex system-level testing and silicon-accurate debugging.
Work directly with next-generation emulation platforms (Zebu, Palladium, or Veloce) to implement cutting-edge methodologies.
Maintain and evolve emulation flows to reduce compile times and increase execution speed, directly impacting time-to-market.

System-Level Debug & Validation
Drive initial model bring-up process in high-stakes environment, identifying and resolving complex bugs.
Ensure rapid cycles from RTL to functional stability through systematic debug approaches.
Own technical blocks and drive them to completion independently.

Cross-Functional Collaboration
Partner with Firmware, Software, and Validation teams to debug complex system-level scenarios.
Ensure seamless hardware-software integration for AI infrastructure connectivity.
Collaborate with Design and Verification teams to optimize emulation strategies.
Requirements:
Basic Qualifications
Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical field.
3+ years of hands-on experience in Emulation at semiconductor companies
Deep expertise in emulation flows for large-scale chips using industry-standard emulators (Zebu, Palladium, or Veloce).
Strong background in SystemVerilog for developing, testing, and debugging complex SoC designs.
Experience developing and maintaining execution flows for building, running, and debugging emulation models.
"Can-do" approach with ability to own technical blocks and drive them to completion independently.

Preferred Qualifications
Master's degree in Electrical Engineering, Computer Engineering, or related field.
Familiarity with EDA tools for Lint, Clock Domain Crossing (CDC), simulation, and synthesis.
Proficiency in scripting languages such as Python or TCL for automation and flow enhancement.
Experience with standard debug environments (e.g., Verdi).
Knowledge of high-speed interface protocols (PCIe, Ethernet, CXL, UALink).
Background in hardware-software co-verification methodologies.
This position is open to all candidates.
 
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20/10/2026
Location: Kefar Sava
Job Type: Full Time
We are looking for an Electrical & Electronics Practical Engineer to join our R&D department in Kfar Saba.
This is a varied, technical role supporting development, integration, testing, and troubleshooting of electronic systems - an opportunity to grow professionally while working on challenging, advanced projects.
About us
An established technology company specializing in motion control and intelligent power management systems.
We develop and manufacture advanced motor controllers, power management systems, and smart circuit protection solutions tailored to the unique requirements of the defense and industrial markets.
What will you do?
Provide ongoing support to the development team in development, integration, and testing
Perform hardware testing and troubleshooting of electronic boards and systems
Analyze faults, perform root-cause analysis, and propose solutions to hardware issues
Read and interpret electrical drawings and electronic schematics
Perform measurements and tests using lab equipment such as DMMs, oscilloscopes, power supplies, spectrum analyzers, and other instruments
Perform lab tests and functional checks on products and systems
Support product qualification, verification, and validation testing
Document test results, faults, and solutions
Write and update technical documents, test procedures, and reports
Work closely with hardware, software, and systems engineers
What do we offer?
Work on advanced products and technologies
A professional, high-quality, and challenging working environment
Work within a multidisciplinary team
The opportunity to influence the development of new products
Location: Atir Yeda Industrial Zone, Kfar Saba, Israel
Position: Full-time, Sunday through Thursday
Responsibilities
Provide ongoing support to the development team in development, integration, and testing
Perform hardware testing and troubleshooting of electronic boards and systems
Analyze faults, perform root-cause analysis, and propose solutions to hardware issues
Perform measurements and tests using lab equipment (DMM, oscilloscope, power supplies, spectrum analyzer)
Support product qualification, verification, and validation testing
Document test results, faults, and solutions
Write and update technical documents, test procedures, and reports
Work closely with hardware, software, and systems engineers.
Requirements:
Requirements
Practical Engineering diploma in Electrical & Electronics - required
Good knowledge and understanding of analog and digital electronics
Ability to read and understand electrical drawings and electronic schematics
Experience in hardware troubleshooting - required
Experience with laboratory equipment: oscilloscope, multimeter, power supplies, spectrum analyzer, etc.
Good technical English
What do you bring?
Self-learning ability and comfort tackling new technical topics
Analytical problem-solving, systematic thinking, and attention to detail
Ability to write and maintain technical documentation
Ability to work independently and as part of a team
Strong technical and hands-on skills
Ability to work in a dynamic environment and under pressure.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior SoC Formal Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our mission is to build the best cloud in the world for our services and for our Cloud customers, by solving real world business issues of performance, cost, and scale, utilizing hardware, software, and system solutions. To better serve evolving cloud needs, we are establishing a team in Israel to develop custom chips for servers.
In this role, you will perform formal verification of design properties of complex ASIC designs. You will collaborate closely with design and verification engineers to define meaningful properties that capture the design intent of a logic block and constraints on its input stimulus. You will also help define and improve design and verification methodologies that allow you to achieve formal verification closure.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Plan the formal verification strategy and create the properties and constraints for complex digital design blocks.
Utilize formal property verification tools combined with formal verification closure techniques to verify properties and apply sign-off to blocks.
Pioneer and refine formal verification methodologies by systematically embedding AI tools to optimize verification accuracy.
Architect and implement reusable formal verification components.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
10 years of experience working on main interconnects, direct memory access (DMA), controllers, and power management.
Experience working with one or more formal verification tools, such as JasperGold, VC Formal, Questa Formal, or 360-DV.
Experience capturing design specification in a temporal assertion language such as SystemVerilog Assertions (SVA) or Property Specification Language (PSL).
Preferred qualifications:
Master's degree or PhD in Electrical Engineering or Computer Science.
Proficiency with scripting languages, such as Python.
Understanding of formal verification algorithms.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo
Job Type: Full Time
The Design for Test (DFT) team is part of the design group, which focuses on logic design, RTL development, and running verification tests.

Their main role is to design test structures embedded within the chip to ensure proper functionality after manufacturing.

The goal is to detect potential manufacturing defects with maximum efficiency and filter out faulty units before they reach the market.



What You'll Do

Insert DFT logic, perform synthesis, and run Automatic Test Pattern Generation (ATPG) to ensure hardware testability.

Execute Gate Level Simulations, timing checks, and DRC checks to maintain rigorous design integrity and performance standards.

Run regressions and perform deep-dive debugging on simulation failures as part of the core verification process.

Work in a small, agile team with an intimate atmosphere that offers direct mentoring and broad professional growth.
Requirements:
B.Sc or M.Sc Electrical/Computer Engineer Graduate from leading Israeli Universities with average grades above 85.

Team players who enjoy big challenges.

People who can quickly ramp on multiple, interdisciplinary domains.
This position is open to all candidates.
 
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28/09/2026
Location: Herzliya
Job Type: Full Time
Power the Future with us! we are a global leader in high-performance smart energy technology, with over 3000 employees, offices in 33 countries, and millions of products installed in over 133 countries. Our diverse product offering comprises intelligent solar inverters, battery Storage, backup systems, EV charging, and complete home energy management ecosystems. By leveraging world-class engineering capabilities and with a relentless focus on innovation, we strive to create a world where clean, green energy from the sun is the primary source of power for our homes, businesses, and just about everywhere we thrive. The Embedded Infrastructure Team builds and maintains the shared Embedded software foundations used across the department. We develop reusable code and core technologies that enable multiple projects and teams to succeed, while spearheading the adoption of new technologies within the organization. By providing a robust, scalable base, we empower product teams to move faster with confidence. Key Responsibilities
* Develop and maintain Embedded software for a cross-platform SDK at the core of our company Embedded products.
* Develop bootloaders, drivers, bare-metal, and RTOS-based firmware for ARM & ARC processors.
* Collaborate across software, hardware, and architecture teams to develop and integrate features, from design through implementation and system -level validation.
* Participate in design reviews/code reviews and develop high-quality code following best practices, including unit tests and automated system tests.
* Define and improve development environments and build flows that enable efficiency and flexibility across all teams.
* Navigate a hardware-oriented environment encompassing chip bring-up, physical device integration, complex troubleshooting, and software-hardware validation.
* Apply AI-driven tools and methodologies to accelerate development and enhance code quality.
Country:
Israel
City:
Herzliya
Requirements:
Basic Qualifications
* B.Sc. in Computer Science, Electrical Engineering, or equivalent experience.
* At least 5 years of experience in Real-Time Embedded systems firmware development using C / C ++.
* Hands-on experience in development and troubleshooting on Embedded micro-controllers and processors.
* Experience with firmware debugging tools such as JTAG and logic analyzers.
* Strong problem-solving skills and attention to detail.
* Experience with Embedded peripheries drivers (UART, SPI, I2C, ADC, PWM, Timers, DMA).
* Excellent teamwork skills, flexibility, and ability to handle multiple tasks.
* Ability to quickly learn and adapt to new technologies and domains.
* Familiarity with multi-threaded and/or RTOS-based systems. Preferred Qualification
* Experience with AI-driven development tools and workflows
* Hands-on experience with communication protocols such as CAN-FD, Ethernet, or TCP/IP.
* Experience developing tools and scripts for automation using Python or other scripting languages.
* Experience with CI/CD pipelines (Gitlab CI, Github Actions, Jenkins, etc) and automation workflows.
* Familiarity with command-line build systems such as CMake, Bazel, Meson, etc.
our company recognizes its talented and diverse workforce as a key competitive advantage. Our business success is a reflection of the quality and skill of our people. we are committed to seeking out and retaining the finest human talent to ensure top business growth and performance.
This position is open to all candidates.
 
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24/09/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
As we expand our presence in Israel, we're seeking a talented Senior Design Verification Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful ownership in a new site, developing the verification environments that ensure our next-generation AI silicon performs flawlessly.

As a Senior Design Verification Engineer, you will be a vital contributor to the quality and reliability of our Israel R&D center. You will work on the front lines of functional verification, developing testbenches and environments that validate high-performance digital blocks, subsystems, and full-chip designs. You will tackle complex verification challenges that ensure our connectivity solutions meet the rigorous demands of the world's largest AI clusters. If you thrive on solving technical puzzles and want to play a key role in delivering cutting-edge AI infrastructure connectivity, this is your opportunity.

Key Responsibilities

Verification Environment Development
Contribute to the design and development of ASIC verification environments, focusing on unit-level and subsystem functional blocks.
Develop and maintain System Verilog/UVM-based components including traffic generators, monitors, and checkers to ensure robust testing.
Execute detailed verification plans for challenging digital designs, ensuring all functional requirements are met and verified.

Coverage & Quality Assurance
Implement functional coverage models and analyze results to identify gaps in the verification process.
Drive designs toward 100% verification closure through comprehensive test development.
Contribute to verification methodology improvements and best practices.

Debug & Cross-Functional Collaboration
Work closely with design engineers to identify, root-cause, and resolve complex hardware bugs early in the development cycle.
Apply analytical skills and debugging techniques to solve intricate verification challenges.
Collaborate effectively in a fast-paced, team-oriented R&D environment.
Requirements:
Basic Qualifications
Bachelor's degree in Electrical Engineering or related technical field.
3+ years of proven experience in ASIC verification within the semiconductor industry.
Hands-on experience developing components within complex verification environments using System Verilog.
Strong working knowledge of standard verification methodologies, specifically UVM.
Sharp analytical mind with passion for debugging and technical problem-solving.
Excellent communication skills with ability to thrive in collaborative R&D environments.

Preferred Qualifications
Master's degree in Electrical Engineering or related field.
Familiarity with Formal Verification or Emulation flows.
Basic proficiency in scripting languages such as Python or Tcl to automate verification tasks.
Exposure to industry-standard protocols such as AMBA, PCIe, Ethernet, or CXL.
Experience with assertion-based verification and constrained-random testing.
Background in connectivity or networking silicon verification.
This position is open to all candidates.
 
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24/09/2026
Location: Haifa
Job Type: Full Time
As we expand our presence in Israel, we're seeking a visionary System Validation Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, ensuring the reliability and testability of chips that power the world's largest AI clusters.


Job Description
The mission of this role is to perform system validation for our highly advanced devices, that includes defining strategy, develop tools, innovate, be creative to make sure devices are performing as they should in all aspects, logical, performance, durability, stress and more.

You will be part of the site located at Israel (Haifa - Matam), surrounded with highly experienced and professional engineers who will escort, mentor and support you on your journey in our company.
Requirements:
Basic qualifications
Strong academic and technical background in electrical or computer engineering.
3-5 years experience validating and/or developing complex SoC/silicon products for Networking and/or Server & Storage applications.
Professional attitude with the ability to prioritize a dynamic list of multiple tasks, to plan and work with minimal guidance and supervision.
Entrepreneurial, open-mind behavior and can-do attitude. Think and act with the customer in mind!

Required experience
Hands-on, thorough knowledge of high-speed protocols like Ethernet CXL, PCIe, NVMe.
Silicon/System bring-up, validation, and debug experience, including customers systems.
A Python coding experience.
Familiarity with validation techniques C, C++.
Experience with lab equipment as protocol analyzers, chambers, in-circuit debuggers, and CPU-based tool suites.
Familiarity with lab testing automation techniques.

Preferred experience
Familiarity with devices trees and related debugging techniques.
Familiarity with board system design.
C\C++ for embedded FW and device drivers.
Basic understanding of x86/ARM architecture, UEFI/Linux boot sequence.
Familiarity with CXL compliance standards and ability to follow and be involved in compliance consortiums to adapt the tests to be run from X86/ARM based platforms.
Experience working with DRAM memory vendors on DDR4 or DDR5 to identify issues and working on SoC HW/FW to improve memory calibration and tuning sequences.
Knowledge of memory subsystem compliance from a data integrity and RAS is a plus.
Knowledge of schematic capture and PCB layout tools from Cadence, Altium, etc.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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13/10/2026
Location: Herzliya
Job Type: Full Time
SolarEdge (NASDAQ: SEDG), is a global leader in high-performance smart energy technology, and millions of products installed in over 133 countries. Our diverse product offering comprises intelligent solar inverters, battery storage, backup systems, EV charging, and complete home energy management ecosystems. By leveraging world-class engineering capabilities and with a relentless focus on innovation, we strive to create a world where clean, green energy from the sun is the primary source of power for our homes, businesses, and just about everywhere we thrive. We are seeking a skilled and motivated Practical Engineer (Electronics/Electrical) or Electronics Technician to join our Quality & Reliability team, specializing in hands?on failure analysis, product investigation, and testing. The ideal candidate will have solid practical experience working with electronic circuits, performing measurements, and supporting troubleshooting activities at both the board and system level. This role involves conducting detailed failure analysis, assisting in root?cause investigations, and performing experiments and tests to recreate issues and identify underlying problems. The position plays an important role in improving product reliability and supporting engineering teams. Key Responsibilities Conduct electrical measurements, functional tests, and perform experiments to isolate and characterize fault mechanisms, including building test stations
* Perform hands?on failure analysis on electronic boards, components, and system?level assemblies, including careful removal of potting material to enable component-level inspection and testing without damage
* Document findings, test results, and root cause hypotheses in a clear and structured manner using log files, pictures, Excel, and PowerPoint
* Support Q&R engineers in root cause investigations and the definition of corrective and preventive actions
* Operate lab equipment including oscilloscopes, power supplies, DMMs, LCR meters, and thermal chambers
* Collaborate with teams within Q&R and with teams outside Q&R to resolve technical issues

Country:
Israel

City:
Herzliya
Requirements:
* Practical Engineer (Electronics/Electrical) or Electronics Technician with strong lab skills
* Hands-on skills with lab equipment (oscilloscope, DMM, LCR meter, power supply)
* Ability to read schematics and understand analog and digital circuit behavior
* Good technical English (reading and writing)
* Organized, detail-oriented, and methodical approach to problem solving Preferred Qualifications
* Experience with soldering, rework, and component-level troubleshooting
* Background in power electronics — power converters, MOSFET/IGBT/SiC stages
* Understanding of common electronic failure mechanisms
* Prior experience in manufacturing, quality, or reliability engineering environments
* 1–3 years of experience in electronics lab work, testing, or failure analysis
This position is open to all candidates.
 
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05/10/2026
Location: Merkaz
Job Type: Full Time
We are looking for highly motivated engineers who love the challenges and the opportunity of a small company. Join us and be a part of a small and dynamic team, which revolutionizes the parallel processor architecture.
Requirements:
BSc in Electronics Engineering or Computer Science

10+ Years of industry experience in verification, full chip dev. cycle.

2+ years of experience in leading a team of engineers (including technical and personal mentoring, etc.)

Experience with System Verilog and UVM methodology - MUST
This position is open to all candidates.
 
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19/10/2026
Location: Petah Tikva
Job Type: More than one
Our CTO Office AI Research Group is looking for a motivated advanced BSc student to join our team as a Data Preprocessing Engineer. You will play a foundational role in building the data infrastructure that powers our AI research - working directly with large-scale, real-world datasets at the intersection of machine learning and semiconductor chip design.
job requisition id
2604499
This is a hands-on, high-impact student position for someone who enjoys getting into the details of messy data and turning it into clean, structured, and model-ready assets.
What You Can Expect:
Collect, clean, normalize, and sanitize large-scale chip design datasets from diverse sources and formats
Build and maintain scripts and pipelines to automate repetitive data extraction and transformation tasks
Parse and process a wide variety of file formats (JSON, CSV, Parquet, logs, and domain-specific EDA formats)
Navigate complex codebases and directory structures to locate, understand, and extract relevant data
Work with structured and semi-structured data using SQL and Python-based tooling
Collaborate with researchers and engineers to understand data requirements and deliver model-ready datasets
Document data sources, transformation logic, and dataset versions in shared repositories.
Requirements:
Advanced BSc student in Computer Science, Software Engineering, Electrical Engineering, Data Science, or a related field
Good Python skills with hands-on experience using pandas and NumPy for real data manipulation
Solid SQL and comfort working with structured and semi-structured data (JSON, CSV, Parquet, logs)
Practical experience cleaning, normalizing, and sanitizing messy, real-world data
Comfort navigating codebases and filesystems - understanding directory/file structures and parsing multiple file formats
Git fluency - reading commit history, diffs, and working with versioned repositories
Scripting ability to automate repetitive extraction and transformation tasks
Advantages:
Exposure to data pipeline tools or frameworks (e.g., Airflow, dbt, Spark)
Basic familiarity with ML concepts - understanding what makes a good feature, and awareness of train/test leakage
Curiosity for reverse-engineering undocumented data and uncovering hidden relationships across files and datasets.
This position is open to all candidates.
 
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19/10/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
Were looking for a talented Radar System Engineer to join our innovative system team. As a member of our team, you'll work on multidisciplinary system design, which combines cutting edge RF, digital, signal processing, software, hardware and chips development.
Responsibilities:
Participate in the development and production of radar sensors
Debug our Radar ASIC platforms and processors
Develop subsystem specifications and process flows
Simulate and validate Radar system performance
Solve diverse complex problems and help in the debugging and integration process
Support and manage the product evaluation process involving customers.
Interface with multi-disciplinary product development team in support of design, integration and test of automotive radar systems
define system requirements for various projects.
Requirements:
B.Sc in Electrical Engineering or equivalent (Computer Science)
At least 5 years' experience as a System Engineer
Hands-on experience in SW architecture development
Hands-on experience in Radar or other relevant fields like Sonar, Communications, or EW
Hands-on Matlab/ Python/ C experience
Readiness to work in a challenging startup environment
Entrepreneurial, self-directed and motivated
Preferred Qualifications
Hands-on Radar experience
Architecture experience.
This position is open to all candidates.
 
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Location: Hod Hasharon and Haifa
Job Type: Full Time
Required Computing Network & System Architecture Group Leader
In this role, you will be responsible for several teams of architects, engineers and software developers, all working together to conduct state-of-the-art R&D in system and network architecture. As the group lead, you will guide and mentor the individual team leads, and also conduct hands-on work leading architecture, technology innovation and technical planning and of high-performance computing cluster network, which oriented at AI, HPC, and big data.
Responsibilities:
You will perform a wide range of duties including:
Architecture Innovation:
Deeply analyzing the advantages and disadvantages of mainstream network systems, to find opportunities for network architecture innovation;
Insight into the technology developing trend of the high-performance computing network field, and leading the corresponding technology planning.
Exploring new architectures of high-performance computing network systems and efficiently integrating communication library, topology, and network protocol to solve performance bottlenecks.
Technical breakthroughs in networking and cluster routing algorithm:
Analyzes computing cluster network performance and leads the development of computing cluster network technologies
Research and optimize the heterogeneous interconnection topology of key computing chips to continuously improve the key competitiveness of Huawei computing heterogeneous chipsets
Responsible for the research of data center network technologies, and guide network topology design and routing algorithm development
Group leadership:
Lead the development of a comprehensive system architecture for AI Fabric and HPC Fabric solutions
Manage and mentor highly skilled team leaders, to ensure that the group operates together in pursuit of common goal
Foster a collaborative and innovative work environment
Provide technical guidance and support to team members
Collaborate closely with cross-functional teams internationally, including hardware, software, and ucode design teams, to ensure alignment of architectural decisions with product and platform common objectives
Initiate and supervise collaborations with top academic researchers in Israel and abroad
Stay up to date with emerging technologies and industry trends in AI, HPC and big data industries
דרישות:
At least 10 years of hands-on experience in system architecture design, or equivalent research experience
Demonstrated experience in leading R&D team
Familiarity with high-performance computing cluster services and system architectures, such as AI, HPC and big data.
In-depth understanding of computer networks, communication libraries, and design of AI or HPC cluster networks
Key qualifications you hold include:
Ability to work in a team environment; actively seek out resolution to issues with the team and work co-operatively to build a coherent system; Team-working and excellent inter-personal communication skills.
High level of self-reliance and an autonomous target-oriented work style, can do attitude, eager to learn new things and ready to think outside the box
Ability to work on a schedule, even for un-schedule-able issues such as inventiveness
Experience with network system of AI, HPC or big data cluster
Demonstrated capability in several items from the list below:
o Deep understanding of computer network protocol and network topology of computing cluster
o Familiarity with communication library, such as OpenMPI/NCCL
o Extensive experience in leading the network architecture design of computing cluster
o Experience with implementing routing algorithm
o Familiarity with network specifications of CPU/Network Processing Unit/ Neural Processing Unit/Switch chip
Fluent in written and spoken English
Advantage:
You hold a Doctors degree or above in the field of computer science, electrical and electronic engineering or in a similar background in Research & Development
Publications in reputed jou המשרה מיועדת לנשים ולגברים כאחד.
 
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Location: Herzliya
Job Type: Full Time
As a member of our ML group, you will design, prototype, and ship agentic GenAI systems used by chip design engineers to accelerate their day-to-day workflows. We are looking for a machine learning engineer who is energized by taking LLMs from "promising demo" to "depended-on tool": designing the agent loops, retrieval pipelines, and evaluation frameworks that make this transition real. Success in this role means agents that meaningfully shift how our customer teams work, backed by measurements you trust.

You will join a growing team of ML and software engineers building GenAI solutions for chip design teams. In this role, you will:

Design and build agentic systems featuring multi-agent coordination, long-horizon reasoning, tool use, and planning frameworks.
Develop end-to-end solutions, including domain-specific agents and high-performance retrieval pipelines spanning diverse data sources.
Partner with subject-matter experts on the customer teams to translate their workflows and rules of thumb into concrete agent assignments, prompts, tools, and guidelines.
Build the evaluation backbone for our agents: define success measures, curate offline golden sets, and instrument online telemetry to power feedback loops that drive fast, safe iteration with real cost and quality control.
Drive prompt engineering, model selection, and lightweight model adaptation as the workloads demand.
Collaborate closely with software engineers on the team to productionize your work, and with researchers and customers to shape what we build next.
Stay current with the rapidly evolving agentic and LLM landscape and bring promising techniques into our products with good engineering judgment.
Requirements:
Minimum Qualifications
3+ years of applied ML/AI experience, including hands-on work building LLM-powered or agentic applications
Strong programming skills in Python and experience with modern ML and deep learning frameworks (e.g., PyTorch)
Hands-on experience with agentic frameworks, tool use, and data pipelines
Strong evaluation mindset: comfortable designing golden sets, metrics, and telemetry to drive iteration
Excellent communication and collaboration skills, with the ability to align with subject-matter experts and translate their domain knowledge into agent behavior
Preferred Qualifications
Hands-on experience with stateful, multi-turn agentic frameworks and complex execution flows
Experience with prompt engineering and optimization techniques
Experience with model adaptation (e.g., fine-tuning, distillation, preference optimization)
Publications at top-tier venues (e.g., NeurIPS, ICML, ICLR, ACL, EMNLP, or similar)
Familiarity with chip design or EDA environments.
This position is open to all candidates.
 
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