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We are looking for an experienced Electronics Engineer / Practical Electronics Engineer to join our multidisciplinary R&D team and support the development of advanced electro-optical systems.

In this role, you will be responsible for electronic board bring-up, debugging, repair, testing, calibration, and system integration. You will work closely with electrical, mechanical, and system engineers throughout the product lifecycle, from early prototypes to production and deployment.

This position is ideal for someone who enjoys practical engineering work, solving complex hardware issues, and working on mission-critical technologies in a dynamic development environment.



Responsibilities

Perform bring-up, debugging, validation, and repair of electronic boards for advanced electro-optical systems.
Troubleshoot analog, digital, power, and communication interfaces using oscilloscopes and other laboratory equipment.
Perform board-level modifications, rework, repairs, and validation according to engineering requirements.
Work closely with hardware design engineers to investigate failures, improve designs, and resolve technical issues.
Support PCB manufacturers and assembly partners throughout production, troubleshooting, and quality processes.
Execute and support environmental testing of electronic boards and electro-optical systems.
Collaborate with mechanical engineers on system integration, thermal considerations, cable routing, and assembly optimization.
Develop, document, and perform calibration procedures for electro-optical systems.
Document test results, failure analysis, corrective actions, and engineering activities.
Support continuous improvement of laboratory processes, production readiness, and engineering workflows.

We are seeking experienced electrical engineers with a passion for system-level thinking and innovation in high-performance optical switch development. This role offers a unique opportunity to shape and deliver next-generation products that push the boundaries of high-speed optical communication.

What Youll Be Doing:

Lead and serve as the technical focal point for the integration of PHY system aspects and optical (CPO) electrical subsystems, ensuring their performance.

Hands on cross-disciplinary testing efforts and lab work, collaborating with system architecture, optics, silicon, thermal, mechanical, signal/power integrity, and software teams.

Characterization and testing of optical links using lab equipment (e.g., oscilloscopes, BER testers, optical spectrum analyzers and simulation tools).

Driving product scalability, working with internal partners-qualification teams to transition designs from prototype to high-volume production.

Documentation and reporting of design specifications, test results, and performance metrics.

As a member of our ML group, you will design, prototype, and ship agentic GenAI systems used by chip design engineers to accelerate their day-to-day workflows. We are looking for a machine learning engineer who is energized by taking LLMs from "promising demo" to "depended-on tool": designing the agent loops, retrieval pipelines, and evaluation frameworks that make this transition real. Success in this role means agents that meaningfully shift how our customer teams work, backed by measurements you trust.

You will join a growing team of ML and software engineers building GenAI solutions for chip design teams. In this role, you will:

Design and build agentic systems featuring multi-agent coordination, long-horizon reasoning, tool use, and planning frameworks.
Develop end-to-end solutions, including domain-specific agents and high-performance retrieval pipelines spanning diverse data sources.
Partner with subject-matter experts on the customer teams to translate their workflows and rules of thumb into concrete agent assignments, prompts, tools, and guidelines.
Build the evaluation backbone for our agents: define success measures, curate offline golden sets, and instrument online telemetry to power feedback loops that drive fast, safe iteration with real cost and quality control.
Drive prompt engineering, model selection, and lightweight model adaptation as the workloads demand.
Collaborate closely with software engineers on the team to productionize your work, and with researchers and customers to shape what we build next.
Stay current with the rapidly evolving agentic and LLM landscape and bring promising techniques into our products with good engineering judgment.

You will guide and mentor our electrical technicians and manage subcontractors, vendors, and suppliers to ensure high-quality, on-time delivery. The role requires deep experience working with EO system electronics, including board-level definitions, mixed-signal design, high speed cameras pipeline, and complex system integration. Your leadership will directly impact on the reliability, performance, and operational capabilities of our tactical EO products.



Responsibilities

Lead end-to-end electrical design of complex EO systems, from concept to validation
Define board-level architecture across analog, digital, power, and high-speed domains
Oversee PCB design and collaborate with external partners and manufacturers
Drive bring-up, debugging, and validation of mixed-signal boards
Perform root-cause analysis and resolve complex electrical issues
Work cross-functionally to ensure seamless system integration
Develop and execute test plans at board and system level
Manage component selection (BOM), vendors, and suppliers
Mentor technicians and support lab activities

We are looking for a System Level Electrical Validation Engineer to join our Switch Group. In this role, you will be a key member of team that responsible for the validation of high bandwidth Ethernet switching ASICs.
job requisition id
2604877
What You Can Expect:
Execute and develop comprehensive functional testing of high-bandwidth Ethernet switching silicon systems to verify proper behavior, adherence to required specifications, and performance across all spec-defined conditions.
Drive the debug of complex switching silicon and system platforms with a strong emphasis on Layer-1 issues, including link-up flows, state-of-the-art SerDes, signal integrity, link stability, and analog front-end behavior.
Work closely with software developers, hardware design engineers, architects, and operations teams to investigate system-level issues and accelerate root-cause identification.
Stay current with modern automation tools, validation methodologies, and industry best practices, proactively identifying opportunities to enhance existing validation flows and efficiency.

As a Wireless Design Verification Engineer, you will be part of a team that is responsible for pre-silicon RTL verification of communication subsystems, SoC sub-systems and chip-level functionality. The activity may focus on block level, sub-system level or chip level, including end-to-end simulations of the entire data/control path. You will interact with DV methodologists, designers and communication systems engineers to develop reusable testbench and verification environment deploying the latest methodology with metric driven verification.

Description
- Own critical block and sub-system verification of wireless SoC projects.
- Architect and develop testbenches and environments, by using state-of-the-art verification methodologies.
- Define verification plan, create, simulate and debug test scenarios.
- Drive regression and coverage analysis to ensure high quality DV.
- Collaborate with design and systems engineering teams to review requirements, specifications and architecture, extract features and define DV attribute.

As we expand our presence in Israel, we're seeking a highly skilled Physical Design Engineer specializing in SoC EMIR to join our local engineering powerhouse from the ground up.

This is a unique opportunity to take on meaningful technical ownership in a new site, executing the backend power methodologies for chips that power the world's largest AI clusters. As an EMIR Engineer, you will be a core technical contributor ensuring the power robustness and long-term reliability of our high-performance connectivity silicon.

You will be responsible for SoC EMIR Analysis to ensure our products meet aggressive voltage drop and reliability targets in advanced FinFET process nodes, directly impacting the performance and yield of chips operating in the worlds most demanding AI and cloud environments.

Key Responsibilities
Take responsibility on IR drop analysis and signal/power electromigration (EM) of very complex chip.
Collaborate closely with Physical Design team to insure a full power integrity.
Partner with Package Design engineers to perform Chip-Package co-analysis (CPM).
Understand root-cause analysis for voltage drop violations and EM risks.

Required Senior SoC Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

We are looking for highly motivated engineers who love the challenges and the opportunity of a small company. Join us and be a part of a small and dynamic team, which revolutionizes the parallel processor architecture.

As we expand our presence in Israel, we're seeking a highly skilled Front-End CAD Engineer to join our local engineering powerhouse from the ground up.

As a Front-End CAD Engineer, you will be the backbone of our chip design ecosystem. You wont just be using tools; youll be architecting the methodologies, automation scripts, and design flows that enable our hardware teams to push the limits of silicon performance. Your work directly impacts the productivity of the design team and the time-to-market for our next-generation processors.


Key Responsibilities
Develop, maintain, and optimize RTL generation tools, building automated IPs and SoC schemes.
Create robust applications using Python and Tcl to automate models build, regression and analysis tools and other assisting tools for all disciplines in front-end flows.
Evaluate and integrate Electronic Design Automation (EDA) tools from vendors like Cadence, Synopsys, and Mentor Graphics.
Define the methodologies of usage and integrate AI tools in this fast-growing field impacting all VLSI development flows.

As we expand our presence in Israel, we're seeking a talented Staff/ Principal Design Verification Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful ownership in a new site, developing the verification environments that ensure our next-generation AI silicon performs flawlessly.

As a Staff/ Principal Design Verification Engineer, you will be a vital contributor to the quality and reliability of our Israel R&D center. You will work on the front lines of functional verification, developing testbenches and environments that validate high-performance digital blocks, subsystems, and full-chip designs. You will tackle complex verification challenges that ensure our connectivity solutions meet the rigorous demands of the world's largest AI clusters. If you thrive on solving technical puzzles and want to play a key role in delivering cutting-edge AI infrastructure connectivity, this is your opportunity.

Key Responsibilities

Verification Environment Development
Contribute to the design and development of ASIC verification environments, focusing on unit-level and subsystem functional blocks
Develop and maintain SystemVerilog/UVM-based components including traffic generators, monitors, and checkers to ensure robust testing
Execute detailed verification plans for challenging digital designs, ensuring all functional requirements are met and verified

Coverage & Quality Assurance
Implement functional coverage models and analyze results to identify gaps in the verification process
Drive designs toward 100% verification closure through comprehensive test development
Contribute to verification methodology improvements and best practices

Debug & Cross-Functional Collaboration
Work closely with design engineers to identify, root-cause, and resolve complex hardware bugs early in the development cycle
Apply analytical skills and debugging techniques to solve intricate verification challenges
Collaborate effectively in a fast-paced, team-oriented R&D environment

We are looking for an Electrical & Electronics Engineer to join our R&D department in Kfar Saba.
This is a varied, technical role supporting development, integration, testing, and troubleshooting of electronic systems - an opportunity to grow professionally while working on challenging, advanced projects.
About us
An established technology company specializing in motion control and intelligent power management systems.
We develop and manufacture advanced motor controllers, power management systems, and smart circuit protection solutions tailored to the unique requirements of the defense and industrial markets.
What will you do?
Provide ongoing support to the development team in development, integration, and testing
Perform hardware testing and troubleshooting of electronic boards and systems
Analyze faults, perform root-cause analysis, and propose solutions to hardware issues
Read and interpret electrical drawings and electronic schematics
Perform measurements and tests using lab equipment such as DMMs, oscilloscopes, power supplies, spectrum analyzers, and other instruments
Perform lab tests and functional checks on products and systems
Support product qualification, verification, and validation testing
Document test results, faults, and solutions
Write and update technical documents, test procedures, and reports
Work closely with hardware, software, and systems engineers

As a System Verification Software Engineer, you will join a unique team that works at the heart of chip development, at the HW/SW boundary, collaborating across teams to ensure our semiconductor platforms meet the highest standards before they reach production, as we lead the market with our cutting-edge devices.
Youll be part of a team that verifies Graviton chips across emulation, silicon, and AWS production fleets-developing the tests, automation, and debug tooling that give us confidence our features function correctly on real hardware.

Key job responsibilities
* Verify and validate Graviton chips in emulation, silicon, and post-production.
* Develop tests that ensure our features function as intended.
* Build automation and debugging tools for silicon regressions and bring-up.
* Collaborate with hardware design and software teams to identify, analyze, and resolve design issues and verification gaps.
* Debug failures across diverse platforms (emulation and silicon).

We are seeking an experienced Principal Architect to lead the architecture of high-performance connectivity solutions, with a strong focus on PCIe, high-speed networking, and Ethernet-based systems.
This role will define next-generation architectures for AI infrastructure, working at the intersection of silicon, system, and protocol design. You will play a key role in shaping innovative solutions that enable hyperscale customers to build scalable, high-bandwidth, and low-latency systems.

This is a unique opportunity to join a new and growing Israel site, influence technical direction, and take ownership of critical architectural decisions impacting industry-leading products.

Key Responsibilities
Define and drive system and chip-level architecture for high-speed connectivity products.
Lead architecture for PCIe-based interconnects, networking protocols, and Ethernet subsystems.
Analyze system requirements and translate them into scalable and efficient hardware architectures.
Drive tradeoff analysis across performance, power, latency, area, and cost
Collaborate with cross-functional teams including RTL, Physical Design, Firmware, Validation, and Product Engineering.
Define and review micro-architecture specifications and ensure alignment across teams.
Contribute to standard-based and custom protocols for next-generation AI infrastructure.
Support performance modeling, simulation, and architectural validation.
Work closely with customers and partners to understand emerging use cases and requirements.
Mentor engineers and help build strong technical leadership within the Israel R&D center.

We are looking for an architect to work on the invention and development of new SW visible CPU technologies to improve performance of SW scenarios related to memory ordering, memory coherency, multithreading, synchronization, memory safety, caching, etc.
The minimal tasks of this role are:
1. Modeling of new memory related architectural features in the existing CPU performance simulator
2. Development of performance tests or adaptation of existing workloads to be suitable for simulation
3. Conducting performance studies for the workloads of choice either in the performance simulator or on a real chip
4. Develop analysis, conclusions and recommendations based on the above activities
The role can comprehend much more than that depending on the skills, talent and experience of the candidate creating a career path over time. For example, to invent new instructions and mechanisms to overcome significant performance bottlenecks in these areas, refinement and further development of ideas provided by others. Possible participation in development in additional domains
If you want to be part of something bigger, if you are a team player with excellent communication skills and motivation to revolutionize data-center technology, youre welcome on board!