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We are looking for a strategic product leader to head Data Platform domain - a core area of our offering. This role is critical to the companys growth, driving both short-term impact and long-term vision for managing and leveraging massive amounts of structured and unstructured clinical data. In this role, you will lead the product strategy and execution for the domain, while guiding and mentoring product managers within the team. You will work closely with Engineering, Data Science, Clinical Experts, the rest of the Product group, as well as partners and strategic customers, shaping how our platform operates and scales to meet the needs of our growing business.

Responsibilities
Define and drive the roadmap for Data Platform, balancing short-term business needs with long-term scalability and platform strategy.
Own the product vision for data ingestion, processing, and access, ensuring the platform supports all product groups and business initiatives.
Lead and mentor a team of product managers, fostering growth, collaboration, and a culture of ownership and impact.
Support your team in translating complex technical and data requirements into clear product specifications, prioritizing initiatives that maximize business impact.
Partner closely with Engineering, Data Science, Clinical Experts, Customer Success, the entire PM group, and external partners and strategic clients, to design and prioritize initiatives, ensuring data quality, performance, and usability.
Drive cross-team technical initiatives end-to-end, coordinating dependencies and aligning stakeholders across the organization.
Establish key metrics to measure platform performance, adoption, and impact on product outcomes.

We are looking for a highly analytical, business-oriented Financial & Business Analyst to join our FP&A team. In this role, you will partner closely with Finance, Sales, Sales Operations, and senior leadership to provide analytical support that enables data-driven decision-making across the organization.

You will play a key role in business and financial analysis, forecasting, management reporting, dashboard development, process improvement, and automation initiatives. This is an excellent opportunity for someone who enjoys solving complex business problems, working with datasets, and leveraging modern BI and AI tools to improve business processes and drive operational efficiency.

This is a full-time hybrid position based in Hod Hasharon, Israel.
Key Responsibilities
Monitor and analyze key SaaS business metrics, including ARR, ACV, bookings, pipeline, renewals, churn, customer retention, and sales performance.
Organize, validate, and analyze business and sales data to ensure accurate and reliable reporting.
Build, maintain, and enhance dashboards and analytical solutions using Tableau and AI tools
Leverage AI and modern analytical tools to automate repetitive tasks and improve analytical processes.
Support the monthly and quarterly close processes by preparing business analyses, reports, and management presentations.
Support sales compensation processes through commission calculations, data validation, reporting, and analytical support.
Prepare recurring and ad hoc reports, dashboards, and analyses to support management decision-making.
Support business planning, forecasting and other FP&A activities.
Partner with cross-functional teams to provide analytical support.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a visionary Staff DFT Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, ensuring the reliability and testability of chips that power the world's largest AI clusters.
As a Staff DFT Engineer at our company Labs, you will be at the intersection of architecture, design, and production. You won't just run tools-you will be a foundational member of the team responsible for the entire lifecycle of our silicon's reliability. From defining initial DFT architecture to supporting post-silicon bring-up, your work ensures that the backbone of AI infrastructure connectivity is flawless and scalable. If you thrive on solving complex challenges in deep-submicron processes and want to establish world-class DFT methodologies, this is your opportunity.
Key Responsibilities
DFT Architecture & Strategy
Own the DFT journey from high-level architecture definition and RTL design to backend implementation and post-production support
Develop comprehensive Design-for-Testability (DFT) strategies for next-generation connectivity platforms, ensuring chips meet the highest quality standards
​DFT architectures including JTAG/iJTAG, MBIST, Scan, and ATPG methodologies
Test Pattern Development & Optimization
Generate and optimize high-quality test and debug patterns for production
Perform Static Timing Analysis (STA) for DFT modes and conduct gate-level simulations to ensure robust performance
Drive test coverage and quality metrics to meet stringent manufacturing requirements
Cross-Functional Collaboration & Methodology Innovation
Act as a multidisciplinary bridge, collaborating closely with Architecture, Verification, and Backend teams to ensure seamless integration and optimal QoR
Participate in developing and maintaining cutting-edge DFT implementation flows
Automate and improve methodologies using advanced scripting and tools.

We're currently seeking a Data Researcher to join our Data Team and help proactively guide our business growth through the provision of strategic perspective, market insight, and experience with analytical tools and techniques. You will work closely with product managers, medical analysts, and the engineering team and bring your expert analytical ability to provide key insights, recognize key opportunities, and drive strategic initiatives forward.

Responsibilities
Build and maintain data pipelines and dashboards to improve data visibility and reporting in production environments
Implement AI-powered workflows for internal and external uses
Work with product, medical, and engineering teams to turn data into insights and recommendations.
Conduct exploratory analysis to identify opportunities for new features, model their impact, and drive performance improvements.
Analyze product performance, user behavior, and interactions to showcase product value.
Define, measure, and build monitoring tools for key KPIs.
Visualize insights clearly to improve understanding and decision-making.
Support roadmap planning by identifying trends, gaps, and opportunities.

Were seeking a hands-on, analytical, and highly collaborative FinOps Lead to join our Infrastructure group.

Responsibilities
In this role, you will build and own the techno-financial operations practice for cloud, infrastructure, AI, data, and third-party engineering services. You will work closely with Engineering, DevOps, AI Infrastructure, Product, and Finance to make infrastructure spend transparent, predictable, optimized, and aligned with business value.

The role is in the junction of engineering and finance, You will be responsible for creating visibility into cloud and infrastructure costs, driving optimization initiatives, improving forecasting accuracy, defining cost governance practices, and helping engineering teams make better cost-aware technical decisions without slowing down delivery.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a highly skilled Physical Design Engineer specializing in SoC EMIR to join our local engineering powerhouse from the ground up.
This is a unique opportunity to take on meaningful technical ownership in a new site, executing the backend power methodologies for chips that power the world's largest AI clusters. As an EMIR Engineer, you will be a core technical contributor ensuring the power robustness and long-term reliability of our high-performance connectivity silicon.
You will be responsible for SoC EMIR Analysis to ensure our products meet aggressive voltage drop and reliability targets in advanced FinFET process nodes, directly impacting the performance and yield of chips operating in the worlds most demanding AI and cloud environments.
Key Responsibilities
Take responsibility on IR drop analysis and signal/power electromigration (EM) of very complex chip
Collaborate closely with Physical Design team to insure a full power integrity
Partner with Package Design engineers to perform Chip-Package co-analysis (CPM)
Understand root-cause analysis for voltage drop violations and EM risks.

We are looking for an experienced Growth Marketing Manager (Enterprise B2B) to join our Demand Generation Marketing team. In this role, you will own and scale our global digital demand engine, driving awareness, engagement, and pipeline growth across key markets.

You will lead performance marketing across multiple channels, working closely with content, Product Marketing, and Sales to deliver measurable business impact. This is a hands-on role for someone who combines strategic thinking with strong execution and is excited to scale a global B2B demand engine targeting enterprise healthcare clients. In this role you will manage external providers and agencies.

If you are passionate about growth marketing, data-driven decision making, and working in a fast-paced, collaborative environment, wed love to meet you.

Responsibilities
Implement the B2B demand generation strategy and quarterly planning across various channels
Build, manage, and optimize multi-channel campaigns across paid search, paid social, SEO/GEO, and ABM programs.
Lead SEO and GEO across search and LLM discovery, including strategy, technical SEO, keyword and entity mapping, monitoring performance, and visibility reporting.
Own website conversion optimization, continuously improving user journeys, landing pages, messaging, forms, CTAs, and overall conversion rates through data-driven experimentation.
Identify, evaluate, and scale emerging acquisition channels, technologies, and AI-powered marketing opportunities to drive efficient pipeline growth.
Collaborate with Marketing, Design, and the content team to develop high-performing ads, landing pages, and lifecycle content, including tailored ABM campaigns
Work with external agencies and vendors as needed to scale execution.
Stay up to date with emerging digital trends, tools, and AI to continuously improve performance and scale.

We are seeking a Front-End Integration Engineer for the NIC Silicon group. Join our team in our Networking business unit and be part of the innovative build and implementation of the next generation Network Adapter Silicon chips. Contribute to the development of powerful communication devices.

What You'll Be Doing:

Own and maintain Continuous Integration pipelines. Monitor, complete, and fix daily and nightly CI flows in front-end build areas. These include Lint, Synthesis, Equivalence Checking and Simulation.

Automate EDA Flows: Build, develop, and maintain robust automation scripts using Python, Tcl scripting, and Shell to integrate EDA tools (Synopsys, Cadence) into automated build pipelines.

Manage Perforce Integration: Maintain multi-IP branch/stream strategies, manage workspace specs, complete hardware build drops, and handle release labels/tags in Perforce (Helix Core).

Support Engineering Teams: Act as the primary point of contact for RTL and verification engineers to debug flow crashes, bottlenecks, environment setups, and CI failure reports.

Enforce Quality Gates: Implement automated check-in and change list triggers to run sanity checks, linting, and style enforcement before code is committed to main streams.

Optimize Infrastructure: Monitor compute farm resources (LSF) and storage usage to reduce pipeline runtime and improve overall execution efficiency.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a talented Staff / Principal ASIC Design Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful product ownership in a new site, designing the digital blocks that sit at the heart of our most ambitious connectivity projects.
As a Staff / Principal ASIC Design Engineer, you won't just build chips-you will be part of a team defining the next generation of AI infrastructure main components. The complex digital blocks under your micro-architecture and implementation responsibilities will power the world's largest AI clusters. You will own the journey from high-level definition through RTL implementation and backend support, transforming complex logic challenges into elegant, high-performance hardware. If you thrive on solving challenging problems in deep-submicron processes and want to contribute to the digital design foundation for AI infrastructure connectivity, this is your opportunity.
Key Responsibilities
Design Ownership & Implementation
Own the journey from high-level definition through micro-architecture, coding, and debug to backend implementation support
Tackle complex logic challenges and transform them into elegant, high-performance hardware solutions
Serve as the point of contact for your logic blocks, interacting with Architecture, Verification, and Backend teams
Quality Assurance & Design Optimization
Utilize industry-leading EDA tools (Lint, CDC, Synthesis, Timing, Power) and in-house quality assurance tools to ensure designs are robust, scalable, and power-efficient
Apply design techniques to meet PPA (Power, Performance, Area) targets
Contribute to design quality through verification and validation activities
Methodology Innovation & Collaboration
Participate in design methodology improvements and tool automation initiatives
Leverage AI assistance tools and contribute to in-house automation development to make engineering workflows faster and smarter
Collaborate effectively across teams to ensure seamless integration.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a highly skilled Chip Top Physical Design Engineer focusing on implementation to join our local engineering powerhouse from the ground up.
If you thrive on solving complex, unnamed challenges in deep-submicron processes, your place is with us.
As a Physical Design Engineer, you will be a key hands-on member of our PD Team in the Israel R&D center. You will execute the physical design of the SoC Top level for chips that drive the worlds largest AI clusters. You will be deeply involved in all PD disciplines of the chip, driving the tape-out (T.O.) GDS to meet strict signoff criteria (Timing, LVS, EMIR, DRC, PV, etc.), ensuring our silicon meets the extreme performance, power, and area (PPA) targets required for AI scale.
Key Responsibilities
Execute SoC Top-level physical design and actively drive full-chip convergence
Perform Top-Level physical implementation, including floor-planning, Place & Route (P&R), Clock Tree Synthesis (CTS), Power/Clock distribution, Power Integrity, and Timing/Physical signoff
Work closely with the Architecture, Design, DFT, and Product teams to achieve optimal Power, Performance, and Area (PPA). This involves participating in feasibility studies for new architectures and optimizing runs to ensure the best Quality of Results (QoR)
Resolve complex signal integrity, thermal, and power challenges inherent in high-speed connectivity silicon
Collaborate closely with the Package team on Bump-map-to-Ballout design, taking all signal integrity aspects into consideration.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a talented Staff/ Principal Design Verification Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful ownership in a new site, developing the verification environments that ensure our next-generation AI silicon performs flawlessly.
As a Staff/ Principal Design Verification Engineer, you will be a vital contributor to the quality and reliability of our Israel R&D center. You will work on the front lines of functional verification, developing testbenches and environments that validate high-performance digital blocks, subsystems, and full-chip designs. You will tackle complex verification challenges that ensure our connectivity solutions meet the rigorous demands of the world's largest AI clusters. If you thrive on solving technical puzzles and want to play a key role in delivering cutting-edge AI infrastructure connectivity, this is your opportunity.
Key Responsibilities
Verification Environment Development
Contribute to the design and development of ASIC verification environments, focusing on unit-level and subsystem functional blocks
Develop and maintain SystemVerilog/UVM-based components including traffic generators, monitors, and checkers to ensure robust testing
Execute detailed verification plans for challenging digital designs, ensuring all functional requirements are met and verified
Coverage & Quality Assurance
Implement functional coverage models and analyze results to identify gaps in the verification process
Drive designs toward 100% verification closure through comprehensive test development
Contribute to verification methodology improvements and best practices
Debug & Cross-Functional Collaboration
Work closely with design engineers to identify, root-cause, and resolve complex hardware bugs early in the development cycle
Apply analytical skills and debugging techniques to solve intricate verification challenges
Collaborate effectively in a fast-paced, team-oriented R&D environment.

Were looking for a highly skilled Technical Support Engineer to lead the charge in troubleshooting complex technical issues, ensuring exceptional customer satisfaction, and providing strategic solutions. Youll play a key role in documenting solutions, escalating critical cases, and leveraging your cloud expertise to deliver unparalleled support and build strong, lasting relationships with our customers.
Responsibilities:
Provide accurate and timely support via Slack, chat, or email to troubleshoot and resolve customer issues.
Diagnose and resolve technical problems, escalating complex issues to R&D or Product when needed.
Build strong relationships, educate customers on product features, and maintain a professional, supportive tone.
Create and update support documentation while logging all interactions in the support system.
Enhance skills through ongoing training to maintain technical excellence and deliver top-tier support.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, We are looking for a Physical Design CAD Engineer with at least 3 years of hands-on experience in digital implementation flows. The ideal candidate is highly technical, curious, and eager to drive innovation by combining strong physical design knowledge with modern automation and GenAI-based methodologies.
This is a unique opportunity to take on meaningful technical ownership in a new site, implementing the parasitic extraction (PEX) methodologies and flows for chips that power the world's largest AI clusters. As a foundational member of the team, you will be responsible for the accuracy and efficiency of our extraction environment, ensuring that our high-speed designs are modeled with the highest precision from RTL to GDSII.
Key Responsibilities
The Engineer will develop, maintain, and improve CAD flows and methodologies for physical design teams, supporting advanced implementation stages from synthesis through place and route, timing closure, power optimization, and signoff readiness.
Key responsibilities include:
Develop and support physical design CAD flows using industry-standard EDA tools
Build automation infrastructure for implementation, analysis, reporting, and debug
Support design teams in areas such as synthesis, floorplanning, placement, CTS, routing, timing, power, and physical verification
Create scripts and utilities to improve productivity, quality of results, and flow robustness
Support and enhance flows based on Synopsys Fusion Compiler
Explore and integrate GenAI solutions to accelerate debug, automate repetitive tasks, improve reporting, and enhance engineering productivity
Analyze tool results, logs, QoR metrics, timing reports, congestion, utilization, power, and design-rule issues.