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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Edge-AI SOC Verification Lead, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work to shape the future of an edge-AI product, bringing high-performance intelligence to the edge. You will have an opportunity to drive distributed inference technology that powers real-time systems where latency and reliability are mission-critical.
You will be part of a team that pushes boundaries, developing autonomous solutions that define the next generation of intelligent infrastructure and hardware for the edge. You will contribute to the innovation behind products that transform industries, leveraging your expertise in system-level integration and localized processing to deploy complex AI models across sophisticated hardware platforms, ensuring intelligence is embedded exactly where the action happens.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Lead the verification of an edge AI IP, to be used in edge-AI products.
Lead a team of chip verification engineers. Plan tasks, allocate people, hold verification design/code reviews, and drive verification execution.
Plan the verification of digital design blocks, including writing test plans, and other verification documents.
Code development of verification features and capabilities, and participate in RTL debug.
Work closely with architecture, software, design, and physical design stakeholders to make technical decisions and represent project status throughout the development process.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or a related field, or equivalent practical experience.
10 years of experience working with hardware verification languages (e.g., SystemVerilog/Specman), design verification methodologies (e.g., UVM), and chip design flow.
4 years of experience in people management, developing employees.
Experience in leading chip verification teams through the full lifecycle from concept to delivery.
Experience in creating chip or subsystem design verification strategies and plans.
Preferred qualifications:
15 years of experience in verification of complex SoC/ASIC.
8 years of experience managing verification teams.
Experience in chip design/verification of AI/ML logic.
Experience with industry verification techniques, including complementary techniques such as Formal Verification, and Emulation.
Experience in Low Power Verification.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior SoC Formal Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our mission is to build the best cloud in the world for our services and for our Cloud customers, by solving real world business issues of performance, cost, and scale, utilizing hardware, software, and system solutions. To better serve evolving cloud needs, we are establishing a team in Israel to develop custom chips for servers.
In this role, you will perform formal verification of design properties of complex ASIC designs. You will collaborate closely with design and verification engineers to define meaningful properties that capture the design intent of a logic block and constraints on its input stimulus. You will also help define and improve design and verification methodologies that allow you to achieve formal verification closure.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Plan the formal verification strategy and create the properties and constraints for complex digital design blocks.
Utilize formal property verification tools combined with formal verification closure techniques to verify properties and apply sign-off to blocks.
Pioneer and refine formal verification methodologies by systematically embedding AI tools to optimize verification accuracy.
Architect and implement reusable formal verification components.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
10 years of experience working on main interconnects, direct memory access (DMA), controllers, and power management.
Experience working with one or more formal verification tools, such as JasperGold, VC Formal, Questa Formal, or 360-DV.
Experience capturing design specification in a temporal assertion language such as SystemVerilog Assertions (SVA) or Property Specification Language (PSL).
Preferred qualifications:
Master's degree or PhD in Electrical Engineering or Computer Science.
Proficiency with scripting languages, such as Python.
Understanding of formal verification algorithms.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Edge-AI SoC Formal Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Pioneer and refine formal verification methodologies by systematically embedding AI tools to optimize verification accuracy.
Plan the formal verification strategy and create the properties and constraints for complex digital design blocks.
Utilize formal property verification tools combined with formal verification closure techniques to verify properties and apply sign-off to blocks.
Architect and implement reusable formal verification components.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
8 years of experience in Formal Verification field, utilizing different Formal Verification techniques.
Experience in establishing formal verification methodologies, combined with overall project verification process.
Experience in deploying FPV collaboration with different teams (DV, Design).
Experience in leading FV project, defining overall FPV strategy and test-plans for multiple blocks, while overseeing quality and execution for different engineers working on the project.

Preferred qualifications:
Master's degree or PhD in Electrical Engineering or Computer Science.
Experience with different formal tools, such as Jasper, VC-Formal, Rule-Base.
Understanding of different formal verification algorithms.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Edge-AI SoC Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity.
We're the driving force behind groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
8 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, or a related field.
Experience with verification techniques, and the full verification life cycle.
Experience with Application-Specific Integrated Circuit (ASIC) standard interfaces and memory system architecture.
Experience with performance verification of ASICs and ASIC components.
Experience in four or more System on a Chip (SOC) cycles.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8842967
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27/09/2026
Location: Haifa
Job Type: Full Time
We're looking for Electrical Engineering graduates to join the Pre-Silicon Verification Team based in Haifa.

As a Junior Pre-Silicon Verification Engineer, you'll work at the heart of chip development, collaborating across teams to ensure our semiconductor platforms meet the highest standards before they reach production.
IO verification team will expose you to the most advanced technologies , as we lead the market with our leaving devices - youll soon have to expertise most advance protocols

A day in the life
In this role, you'll engage in pre-silicon verification work that connects every phase of our product development journey- from initial product definition through firmware and software development.
You'll collaborate with hardware designers, software engineers, and cross-functional teams to validate complex semiconductor architectures and protocols.
Your days might include developing and executing verification test plans, analyzing simulation results, troubleshooting design issues, and participating in design reviews.
You'll work with advanced verification methodologies and tools, gaining exposure to cutting-edge technologies that define the next generation of cloud infrastructure.
Requirements:
Basic Qualifications
- Bachelor's degree in Electrical Engineering or a related field.
- Knowledge of Hardware Verification concepts and/or tools (UVM, Coverage Driven verification).

Preferred Qualifications
- Knowledge of the following programming languages: Perl/Bash/TCl/Python.
- Knowledge of PCIe, Processors, Ethernet, DDR.
- Sound understanding and knowledge of object-oriented programming concepts.
- Verilog/SystemVerilog/Specman.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8834484
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
24/09/2026
Location: Haifa
Job Type: Full Time
As we expand our presence in Israel, we're seeking a visionary System Validation Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, ensuring the reliability and testability of chips that power the world's largest AI clusters.


Job Description
The mission of this role is to perform system validation for our highly advanced devices, that includes defining strategy, develop tools, innovate, be creative to make sure devices are performing as they should in all aspects, logical, performance, durability, stress and more.

You will be part of the site located at Israel (Haifa - Matam), surrounded with highly experienced and professional engineers who will escort, mentor and support you on your journey in our company.
Requirements:
Basic qualifications
Strong academic and technical background in electrical or computer engineering.
3-5 years experience validating and/or developing complex SoC/silicon products for Networking and/or Server & Storage applications.
Professional attitude with the ability to prioritize a dynamic list of multiple tasks, to plan and work with minimal guidance and supervision.
Entrepreneurial, open-mind behavior and can-do attitude. Think and act with the customer in mind!

Required experience
Hands-on, thorough knowledge of high-speed protocols like Ethernet CXL, PCIe, NVMe.
Silicon/System bring-up, validation, and debug experience, including customers systems.
A Python coding experience.
Familiarity with validation techniques C, C++.
Experience with lab equipment as protocol analyzers, chambers, in-circuit debuggers, and CPU-based tool suites.
Familiarity with lab testing automation techniques.

Preferred experience
Familiarity with devices trees and related debugging techniques.
Familiarity with board system design.
C\C++ for embedded FW and device drivers.
Basic understanding of x86/ARM architecture, UEFI/Linux boot sequence.
Familiarity with CXL compliance standards and ability to follow and be involved in compliance consortiums to adapt the tests to be run from X86/ARM based platforms.
Experience working with DRAM memory vendors on DDR4 or DDR5 to identify issues and working on SoC HW/FW to improve memory calibration and tuning sequences.
Knowledge of memory subsystem compliance from a data integrity and RAS is a plus.
Knowledge of schematic capture and PCB layout tools from Cadence, Altium, etc.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8832119
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
24/09/2026
Location: Haifa
Job Type: Full Time
We are looking for a Post-Silicon Validation Engineer with strong hands-on experience in PCIe link bring-up, physical-layer debug, and silicon validation. Engineer will work closely with Design, Architecture, Firmware, Software, Engineering teams.

Key Responsibilities
Perform hands-on post-silicon validation.
Debug PCIe link issues including link training, LTSSM, equalization, recovery, resets, and link stability.
Analyze PCIe state-machine traces, protocol traces, registers, logs, eye diagrams, and lab measurements.
Drive complex issues from initial failure through root-cause analysis and final resolution.
Work closely with silicon, firmware, software, architecture, and signal-integrity engineers to isolate issues across HW/FW/SW boundaries.
Validate PCIe functionality across different generations, platforms, configurations, and operating conditions.
Develop and execute PCIe validation plans, stress tests, corner-case scenarios, and interoperability tests.
Develop automation to improve validation coverage, debug efficiency, and regression testing.
Requirements:
Required Qualifications
BS/MS in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience.
5+ years of engineering experience in silicon validation, post-silicon debug, or high-speed interface development.
Strong hands-on knowledge of PCIe architecture and protocol.
Experience working with PCIe analyzers, state traces, registers, logs, eye diagrams, and/or signal-integrity measurements.
Strong problem-solving skills and ability to independently drive issues to root cause.
Experience working across hardware, firmware, and software boundaries.
Good scripting/programming skills, preferably Python.
Good Linux knowledge and experience with Linux PCIe debug tools.
Strong communication and collaboration skills.

Preferred Qualifications
Experience with PCIe Gen4/Gen5/Gen6/Gen7
Hands-on experience with PCIe PHY, SerDes, equalization, lane margining, or signal integrity.
Experience with PCIe compliance and interoperability testing.
Experience debugging intermittent, marginal, thermal-sensitive, or corner-case PCIe failures.
Experience with PCIe switches, or networking/accelerator platforms.
Practical experience using AI/ML tools for engineering debug and automation.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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23/09/2026
Location: Haifa
Job Type: Full Time
We are looking for a VLSI Verification Engineer to join the ride as we spearhead the next revolution in electronics!

Responsibilities
Develop, debug, and maintain verification environments and testbenches using SystemVerilog and UVM.
Analyze simulation results and waveforms to identify, isolate, and root-cause bugs in design or testbench code.
Define, track, and analyze code and functional coverage metrics, and drive coverage closure on assigned blocks.
Own the verification of assigned IP blocks or features end-to-end, from test planning through sign-off.
Collaborate with the design team to clarify specifications and confirm verification completeness.
Escalate complex or ambiguous issues to senior engineers when needed, and incorporate their feedback to sharpen debug skills over time.
Participate in code reviews and team knowledge-sharing sessions to build best practices and technical depth.
Requirements:
Requirements
B.Sc. in Electrical/Computer Engineering, Computer Science, or a related field.
1-2 years of experience in VLSI verification.
Working knowledge of SystemVerilog and UVM fundamentals .
Basic understanding of digital design and verification concepts (RTL structure, testbench architecture, simulation flow).
Strong problem-solving skills, curiosity, and eagerness to learn new tools and methodologies.
Detail-oriented approach and solid communication skills; comfortable asking questions and collaborating within a team.

Advantages
Basic Python skills for scripting and test automation.
Familiarity with Git or other version control systems.
Hands-on experience with simulation tools such as VCS, Xcelium, or Questa.
Understanding of coverage concepts (code coverage, functional coverage).
Familiarity with common bus/interface protocols (e.g., AXI, APB, I2C, SPI).
This position is open to all candidates.
 
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23/09/2026
Location: Haifa
Job Type: Full Time
We are looking for a Senior VLSI Verification Engineer to join the ride as we spearhead the next revolution in electronics!

Responsibilities
Develop and maintain advanced verification environments using SystemVerilog and UVM, ensuring scalability, configurability, and reusability across multiple IPs.
Design, implement, and execute comprehensive testbenches and random test suites to validate functional correctness, robustness, and corner-case behavior of complex IP within various SoC integration environments.
Drive coverage closure by defining, collecting, and analyzing code and functional coverage metrics; identify verification gaps and ensure complete validation of feature sets prior to sign-off.
Lead debug and root-cause analysis efforts in collaboration with senior verification and design engineers, leveraging carefully crafted logs, waveform analysis and assertions to isolate and resolve design or environment issues.
Collaborate closely with architecture, design, and firmware teams to ensure verification completeness, alignment with design intent, and seamless integration at the system level.
Contribute to methodology and infrastructure improvements, including reusable UVM components, automation scripts, and best practices that enhance team efficiency and verification quality.
Requirements:
Requirements:
B.Sc. in Electrical/Computer Engineering or equivalent.
5+ years of experience as a VLSI Verification Engineer. Expertise in System-Verilog and UVM.
Strong software development skills and the ability to develop reusable verification components and utilities.
Strong organizational and planning skills, with the ability to prioritize and drive verification projects to completion.
Effective communicator with a structured, detail-oriented approach to problem-solving and collaboration.

Advantages:
Experience with Git, Python, code templating methods, and open-source verification workflows.
Familiarity with full-chip level aspects of VLSI verification (reset architecture and sequences, power domains and modes, etc.).
Experience in firmware verification, including emulation-based verification on FPGA.
Experience with formal verification or mixed-signal simulation.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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Location: Haifa
Job Type: Full Time
Our Unit Level Verification Team in Haifa is looking for an experienced verification engineer to be involved in the development of our future AI and deep learning HW accelerators.
This is an exciting opportunity to join a team of highly talented engineers, working on the most cutting-edge technologies to deliver our EyeQ future chips, aimed to power the worlds first fully Autonomous Vehicle!
What will your job look like:
Define, implement and enhance verification environments using UVM methodology.
Write and debug tests that combine UVM methodology and SW code.
Identify and write various types of coverage measures.
Collaborate with designers, architects, and SW developers from Haifa and Jerusalem teams to deliver the most comprehensive verification environment.
Integrate Industry Standard (such as AXI and OCP) and other 3rd party VIPs.
Requirements:
BSc in electrical engineering, computer engineering, or computer science.
4 years of experience working in verification environment, tests, and test bench development (SV/UVM/C/C++).
System Verilog writing skills, preferably in OVM/UVM.
SW embedded experience, C/C++ skills.
TestPlan defining and Coverage-Driven Verification experience.
3rd-party IPs integration testing experience.
Waveform debugging with the latest EDA tools, root-cause bugs independently.
Nice to have:
Skills in scripting Perl/Python.
Knowledge in Industry Standard protocols such as AXI/OCP/APB.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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Location: Haifa
Job Type: Full Time
Required Experienced SoC Verification Engineer
About the team:
Our SOC verification group owns the important and challenging job of verifying our chip. It is involved from product specification to final SOC delivery, and involves all the system components. The group is made up of few of the best verification engineers, so besides contributing to making our roads safer, youll get the chance to work at one of the most professional verification teams.
What will your job look like:
You'll be responsible for Pre-Silicon system-level verification of the most cutting-edge AI accelerators and technologies in the automotive field.
Define the TestPlan, develop and run tests on simulation/emulation environments, develop test environment and verification collaterals.
You'll have a broad effect on our unique product from the very beginning of the process.
Requirements:
BSc in electrical engineering, computer engineering or computer science.
7+ years of experience working in verification environment, tests, and test bench development (C/C++/SV).
TestPlan defining and Coverage-Driven Verification experience.
Fullchip/SOC verification experience, strong system understanding.
Good debug capabilities using the latest EDA tools.
Knowledge in Industry Standard protocols such as AXI/ACEL/OCP/CHI.
Nice to have:
SW embedded experience, C/C++ skills.
Strong skills in scripting Perl/Python.
System Verilog writing skills, preferably in OVM/UVM.
3rd-party IPs integration testing experience.
This position is open to all candidates.
 
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עדכון קורות החיים לפני שליחה
8826940
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Haifa
Job Type: Full Time
We are looking for an Experienced Formal Verification Engineer to join a team of talented engineers developing next-generation silicon for autonomous driving platforms.
This is a unique opportunity to enter one of the most challenging and rewarding disciplines in hardware development. Formal Verification combines deep understanding of computer architecture, digital design, and advanced verification methodologies to prove hardware correctness and uncover bugs that traditional testing may never find.
What will your job look like:
Be the owner of formal verification environment from first draft to sign-off stage.
Apply formal methods to verify the correctness of various complex digital systems.
Work with HW architects\designers to define assumptions, rules and cover properties.
Help define the formal verification methodology and environment to be applied by the team.
Explore new Formal methods and Tools.
Work with tools like Cadence JasperGold, Verisium manager, Xcelium, Indago.
Analyze verification results, identify bugs, and collaborate with engineers to resolve design issues.
Develop generic formal blocks\functions of commonly used logic, to be later used off the shelf.
Requirements:
BSc in electrical engineering, computer engineering, or computer science.
Passion for the field of Formal Verification.
5+ years of experience in Formal Verification.
Experience coding system-verilog hardware description language.
Experience with scripting languages (e.g. python, tcl ).
Strong analytical and problem solving skills.
Ability to work independently and in a team-oriented environment.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8826903
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Haifa
Job Type: Full Time
Our EyeQ Platform Group is looking for a talented Embedded SW Developer to join our Haifa team. In this role, you will be at the heart of our SoC (System on a Chip) validation, specifically responsible for theVideo Interface Unit- the "eyes" of our autonomous driving technology.
You will write high-performance, object-oriented C++ code on our proprietary validation OS, interface with low-level drivers, and take a lead role in complex board bring-up processes. If you thrive on solving "impossible" hardware-software puzzles alongside HW engineers, this is the place for you.
What will your job look like:
Design and implement robust C++ code for multi-threaded, multi-core environments running on advanced MIPS and RISC-V architectures.
Develop Video Interface drivers and frameworks, maintaining and scaling existing systems to support next-gen SoC capabilities.
Board bring-up activities and debug complex systems on our proprietary Silicon.
Utilize on-SoC scripting engines to provide flexibility and interactive SoC usage for internal and external stakeholders.
Requirements:
BSc in Computer Science, Computer Engineering, or Electrical Engineering.
3+ years of hands-on experience in C++ programming and Embedded SW development.
Proven ability to work with HW specifications and develop SW in Bare-metal or RTOS environments.
Strong experience in HW/SW integration and debugging on real SoC environments.
Knowledge in shell scripting and Python.
Understanding of embedded systems architecture (IOs, I2C, SPI, and other interconnect buses)- Advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8826860
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