Required Senior Manager, DPU Performance and System Validation
Join us as a DPU Performance and SV Manager and play a pivotal role in inventing the future of innovative computing technology! This is an outstanding opportunity to lead a dynamic team in Israel, boosting the performance of the entire DPU Chip Develop department to new heights.
What you'll be doing:
Lead and manage a group of 25+ engineers, coordinating two key teams: Performance in DV and Simulation Model, and System Validation.
Collaborate with the ARCH team to define and implement the Performance Verification (PV) Plan, ensuring comprehensive test coverage and platform integration.
Coordinate the performance emulation and functional validation processes, ensuring seamless readiness for TapeOut from a performance perspective.
Participate in post-silicon performance debugging, contributing to the flawless execution of performance improvements.
Develop and unify performance debug processes across all platforms, ensuring consistency and efficiency.
Requirements: Proven experience in performance management within the chip build industry.
Outstanding leadership skills with the ability to manage and encourage a diverse team of engineers.
Solid technical expertise in DPU performance and system validation, accompanied by a history of effective implementation, or equivalent experience.
Strong collaboration abilities, with the capability to engage effectively with cross-functional teams to identify and achieve performance objectives.
Ambitious approach and the drive to achieve world-class performance standards.
B.Sc. in Electrical Engineering, Computer Engineering, or equivalent
15+ years of overall experience in ASIC development/validation, including 5+ years of management experience.
This position is open to all candidates.