דרושים » הנדסה » Junior /Graduate Field Applications Engineer

We are looking for a Technical support to join our growing robotics startup. This role is hands-on and multidisciplinary, involving installation, maintenance, troubleshooting, and on-site support of complex robotic systems. The systems combine mechanics, hardware, electronics, and advanced software, and require strong system-level understanding. The position includes work at our companys facilities as well as international travel, primarily for system installations, demos, and field troubleshooting. As part of our rapidly growing, small, motivated, and multi-disciplinary team, this position is the first dedicated role in its domain, providing a unique opportunity to contribute to a new area within the company.

Responsibilities
Maintain, test, and troubleshoot robotic systems at the companys facilities.
Install, calibrate, and commission robotic systems at customer and partner sites abroad.
Lead on-site system setup and troubleshooting during demos and early deployments.
Diagnose and resolve hardware, mechanical, and software issues in the field
Perform hands-on replacement and repair of mechanical and electromechanical components.
Work closely with R&D teams (software, mechanical, electrical, algorithms) to deeply understand the system.
Gather knowledge from internal engineering teams and apply it independently in the field.
Provide technical feedback from the field to improve system robustness and usability.
Document issues, procedures, and best practices.

Required Hardware/Electrical Engineering BS/MS Intern, 2027
Please complete your application before November 13, 2026. We encourage you to apply as early as possible as we review applications on a rolling basis.
About the job
The Cloud and AI Infrastructure team in Israel focuses on building our next-generation systems. The team's work is grounded in creating custom hardware, and as an Intern, you'll get to collaborate with engineers from various parts of the organization to influence the future of Cloud and the AI infrastructure by working on the foundational technology that makes it all possible. This is the hardware that powers everything, from Cloud to our most advanced models like Gemini.
As an Electrical Engineering Intern in the domain of Very Large-Scale Integration (VLSI), you will work on designing, developing and verifying next generation chips for our Cloud Compute Infrastructure. You will have the opportunity to collaborate with engineers from various parts of the organisation to help develop our next generation systems on chip (SOC).
Responsibilities:
Responsibilities and detailed projects will be determined based on your educational background, interest and skills.

We are seeking a passionate QA Engineer to join our FW testing team. This position will be part of our growing team, helping NVIDIA products meet industry-leading benchmarks for efficiency and quality. As a Firmware QA Engineer, you will be immersed in the latest advancements and actively contribute to developing world-class products. Your efforts will directly impact the performance and quality of our offerings, ensuring they consistently meet industry-leading standards.


We are looking for ideal candidates who will actively test industry-leading features in the FW sector, quickly learn new features, conduct both manual and automated testing, and contribute to the development of automation systems.


What you'll be doing:
Review arch design and requirements documents for new features introduced in the Nvlink program.
Join the effort of QA shift left towards simulation for NVL7 generation.
Design, develop, and perform tests for the new features, as part of FW GA or update releases.
Automate newly added tests in the existing automation framework, and add new capabilities and features to the framework.
Report bugs found during execution, assist with reproduction and debugs to understand root cause, verify bug fixes provided by R&D team, and raise if not fixed.
Fully collaborate with different external teams like : :product marketing, R&D, and verification.
Define and build setups topologies for appropriate product coverage.

Join the Amazon family and take part in developing the next generation of products that will define the future of the cloud domain. As part of our team, you'll work on cutting-edge products built on disruptive system architecture, and have the opportunity to work with the technologies that power the world's largest cloud provider.
We offer a dynamic, open, and collaborative team environment that operates at a fast pace.
Annapurna Labs is looking for a talented Operations Shift Manager, Electrical Practical Engineer to join our test laboratory and help develop the semiconductor platform support that is based on revolutionary architecture.


Key job responsibilities
Work in a rotating shift pattern - morning, noon, evening, and night - according to operational requirements.
Perform setup of complex operational machinery.
Operate machinery and make adjustments to enhance performance.
Operate equipment in accordance with specific process flows.
Own troubleshooting management and debug sessions.
Support testing and automation processes for silicon products.
Perform routine lab equipment maintenance.
Conduct quality control based on performance reports, and maintain recording procedures and documentation.
Manage inventory, including stocktaking.
Identify opportunities to streamline lab operations, and define and build tools and processes as needed to improve efficiency for the lab and the team
Strong verbal and written communication skills.
Ability to perform hands-on manual tasks.
Good coaching and mentoring skills.
Organized and methodical.

We are seeking a high-driven, results-oriented multidisciplinary orchestrator to act as the primary catalyst for our development infrastructure. In this role, you will operate at the critical intersection of product strategy, hardware engineering, and lab operations, serving as the connective tissue that aligns disparate teams under a unified goal. You will be responsible for driving cross-functional alignment across the organization, effectively managing stakeholders with differing ownership to ensure infrastructure roadmaps scale alongside product milestones. This position requires a self-starter comfortable pushing for success in ambiguous environments, where you will translate high-level strategy into the tactical execution of the physical and virtual ecosystems that power our development lifecycle.

Your Impact

You will own the end-to-end lifecycle of infrastructure projects, ensuring that our Sanity Test Beds and development environments are optimized to meet aggressive product launch timelines. By bridging the gap between engineering roadmaps and infrastructure requirements, you will serve as the engine that ensures our teams have the right resources at the right time, regardless of technical or organizational complexity.

Key Responsibilities

Strategic Orchestration & Alignment

Unified Roadmap Integration: Translate complex product development roadmaps into long-term infrastructure requirements, driving cross-functional alignment between silicon milestones and lab availability.
Stakeholder Management: Act as the primary liaison between hardware engineering, software development, procurement, and lab operations; navigate competing priorities among stakeholders with differing ownership to keep teams synchronized.
Ambiguity Management: Proactively identify project roadblocks and navigate ambiguous environments to push critical-path dependencies to resolution.
Operational Velocity: Drive continuous improvement in infrastructure processes, identifying and removing friction to increase overall engineering velocity.
Operational Oversight & Execution

Strategic Capacity Planning: Lead high-stakes capacity management efforts, forecasting needs for power, rack space, and compute resources to proactively eliminate infrastructure bottlenecks.
Lifecycle Ownership: Oversee the full lifecycle of infrastructure projects-from initial procurement and technical specification through deployment, validation, and transition to operational readiness.
Visibility & Reporting: Drive the development of dashboards and reporting mechanisms to provide real-time visibility into infrastructure health, ensuring data-driven decision-making across the organization.
Vendor & Asset Optimization: Partner with cross-functional leadership to manage technical specifications, equipment lead times, and hardware lifecycles, ensuring a high-performance, cost-effective infrastructure footprint.

In this role, you will contribute to the development of complex ASIC package designs from early planning and exploration through implementation and tapeout. You will collaborate across package design, layout, SI/PI, and silicon teams to help deliver high‑speed, robust, and manufacturable package solutions.

You will participate in package architecture activities, design tradeoff discussions, and technical problem solving while growing your expertise in advanced packaging technologies and system-level integration. This role provides an opportunity to work on some of the most advanced networking silicon products in the industry within a highly collaborative engineering environment.

Responsibilities:
As a member of the Package Design team, you will:

Lead the package design activities including planning, floorplanning, pinout optimization, stack‑up definition, and high‑speed routing support.

Collaborate with SI/PI, silicon floorplanning, layout, and manufacturing teams to ensure high‑quality package solutions.

Support package implementation activities and work closely with layout designers to ensure alignment between design intent and physical implementation.

Participate in technical investigations, design reviews, and tradeoff discussions involving performance, manufacturability, and schedule considerations.

Assist in developing and improving package design methodologies, flows, and best practices.

Contribute to debugging, issue resolution, and package bring‑up activities as needed.

Required Signal/Power Integrity Engineer, PhD Graduate
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities:
Simulate high speed interface electrical behavior using HSPICE or other circuit simulators.
Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.
Collaborate extensively with cross-functional teams, including ASIC architects, digital/analog designers, physical design/layout engineers, and system engineers, to define specifications and resolve integration challenges.
Execute lab measurements utilizing test equipment like oscilloscopes, Vector Network Analyzers (VNA), Time Domain Reflectometers (TDR) , Spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.
Establish robust design rules and guidelines for optimal signal/power integrity during PCB and package layout, ensuring high production yield and reliability.

At our company, we work every single day to craft products that enrich peoples lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for an exceptionally talented Design Verification Engineer. As a member of our dynamic group, you will have the rare and rewarding opportunity to craft upcoming products that will delight and encourage millions of our customers every single day.

The position is relevant to all our sites: Herzliya, Haifa and Jerusalem

In this role, you'll participate in the architecture of next-generation PHY, conduct RTL implementation of the micro-architecture, and participate in clearly defining specification, testing, and verification of the PHY design.
Work in collaboration with CAD, PD teams to implement RTL design into GDS, run various design verification flows and provide guidelines to other designers, and participate in establishing CAD and design methodologies for correct-by-construction designs