We are looking for a highly experienced a hands-on Compiler Engineer who embodies ambition and positivity.
Someone who can passionately take ownership of their responsibilities, collaborating effectively with remote teams to not only meet but exceed our objectives and fulfill the evolving needs of our expanding customer base.
Responsibilities:
Develop QM's compiler from a proprietary quantum language to a proprietary processor tailored to realize and accelerate quantum computing.
Take on complex optimization challenges at the core of our unique compiler, focusing on real-time applications, hybrid quantum/classical algorithms, and parallel processing.
Conduct rigorous testing, debugging, and profiling to ensure the performance and correctness of compiler outputs.
Hands-on development and debugging of software to optimize the utilization of limited hardware resources, enabling the scaling of quantum computing systems and improving quantum algorithm performance on our cutting-edge quantum orchestration platform.
Collaborate closely with hardware, software and architecture teams to ensure seamless software-hardware integration, directly enhancing system capabilities and performance.

We are looking for a highly experienced a hands-on Compiler Engineer who embodies ambition and positivity.

Someone who can passionately take ownership of their responsibilities, collaborating effectively with remote teams to not only meet but exceed our objectives and fulfill the evolving needs of our expanding customer base.

Requirements
Responsibilities:

Develop compiler from a proprietary quantum language to a proprietary processor tailored to realize and accelerate quantum computing.
Take on complex optimization challenges at the core of our unique compiler, focusing on real-time applications, hybrid quantum/classical algorithms, and parallel processing.
Conduct rigorous testing, debugging, and profiling to ensure the performance and correctness of compiler outputs.
Hands-on development and debugging of software to optimize the utilization of limited hardware resources, enabling the scaling of quantum computing systems and improving quantum algorithm performance on our cutting-edge quantum orchestration platform.
Collaborate closely with hardware, software and architecture teams to ensure seamless software-hardware integration, directly enhancing system capabilities and performance.

We are looking for a highly experienced Quantum Control Systems Engineer (Application Validation Team) who embodies ambition and positivity. Someone who can passionately take ownership of their responsibilities, collaborating effectively with remote teams to not only meet but exceed our objectives and fulfill the evolving needs of our expanding customer base.
As a Quantum Control Systems Engineer on the Application Validation Team, you will be responsible for validating the software and hardware systems that drive quantum computing operations, ensuring that programs ranging from calibrations to error correction procedures perform as expected on all our quantum controller hardware. This includes designing, implementing, and testing scalable software and hardware frameworks across various qubit types, as well as developing tools that support the validation and execution of control software across different configurations and execution platforms.
Your role will also involve developing a robust software infrastructure that automates the validation process, integrates with real hardware systems, and supports continuous integration (CI) and continuous deployment (CD) pipelines.
This is an exciting opportunity to work at the forefront of quantum computing technology while ensuring the performance, reliability, and scalability of cutting-edge control systems.
Join us in this exciting journey to redefine the future of quantum computing.
Responsibilities:
Quantum Computing Routine Validation: Validate quantum computing programs on our quantum controllers, including calibration procedures, error correction routines, and other algorithms, ensuring they meet the required performance standards.
Scalable Routine Design: Design and implement scalable quantum routines in Qua and other quantum computing languages, optimizing various qubit types and quantum computing architectures.
Framework Development: Develop tools and frameworks that support validation, ensuring scalability and integration into our hardware and software development process.
Automated Testing and CI/CD Integration: Build and maintain automated testing systems, incorporating CI/CD processes to ensure seamless integration and validation of quantum control software on real hardware.
Data Analysis: Analyze measurement data from quantum controllers, using this data to improve implementations across the whole software stack.
Cross-Functional Collaboration: Work closely with quantum physicists, customers software engineers, and hardware engineers to troubleshoot issues, refine quantum routines, and ensure the overall system's performance.

We are now expanding into a significant new market, and we're looking for an exceptional individual to lead the product definition and architecture of this effort. This is a rare opportunity to operate with the resources and credibility of an established, well-funded quantum technology company with hundreds of customers, while being part of the core team that builds something from the ground up. This role sits within a nascent, fast-growing initiative - early enough that there is still real room to shape the roadmap, the architecture, and the team itself. You will lead both the product definition and the technical architecture for a new capability, working closely with QM's broader organization (Product, Architecture, R&D) to turn a clear technical direction into a shipped solution
We are seeking an enthusiastic individual with product management experience and a strong grasp of evolving quantum technologies, fabrication processes and solutions. The ideal candidate will provide market insights, define requirements for the product, shape the solution architecture and collaborate closely with QM product, architecture and R&D teams, as well as with QM partners, customers and prospects.
Key Responsibilities:
Product Ownership: Define and manage product requirements, launch plans, and roadmap for a new capability.
Architecture & Technical Direction: Own the technical architecture end-to-end, from core building blocks through to a complete, customer-ready solution, and make the build-vs-buy-vs-integrate calls that shape it.
Domain Expertise: Leverage deep expertise in quantum computing and quantum computing fabrication processes to inform decision-making and roadmap planning.
Cross-Functional Leadership: Lead cross-functional teams across hardware, software, and packaging, and influence stakeholders to ensure successful delivery.
Customer & Market Engagement: Act as a technical point of contact externally, translating customer and market insight directly into product and architecture decisions.
Partner Engagement: Build and own relationships with external hardware and equipment partners to track and help shape emerging capability relevant to the initiative.

Required Micro-Architect
Description
We are a global leader in control systems for quantum computing, a field on the verge of exponential growth.
Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands.
At the core of QM lies a passionate and ambitious team committed to reshaping the construction and operation of quantum computers.
Our work is fueled by a deep understanding of customer needs, driving us to deliver unparalleled solutions in this revolutionary field.
Join our cutting-edge hardware development team as Micro-Architect and play a key role in defining and implementing the micro-architecture of advanced digital logic components.
What You'll Do:
Define and develop micro-architecture for complex logic blocks - from concept through high-quality RTL implementation
Collaborate closely with architecture, verification, design and software design teams
Write clear and detailed design specifications and drive architectural trade-off analysis
Optimize for performance and area
Contribute to innovation, methodology improvements, and technical leadership within the team.

As a quantum researcher, your main role will be to develop algorithmic and error-reduction tools to help our partners and customers achieve quantum advantage for their applications. You will develop our error reduction methods, including mitigation and correction, and apply them to different use cases by optimizing existing methods, developing new algorithms, and adapting these tools to the realities of running on quantum hardware. This includes taking into account application requirements, noise characteristics, device constraints, and performance on real quantum devices.

Responsibilities
Developing new error reduction methods, including mitigation and correction, for quantum algorithms.
Optimizing error reduction methods for different algorithms, applications, and hardware settings.
Developing new quantum algorithms to enhance performance on real quantum hardware with error mitigation.
Conducting research on applications of quantum computing with our partners, including implementing and running proof-of-concept demonstrations of these applications on real quantum hardware. 

We are seeking an AI Networking Architect to join the Networking Research Group. This role bridges the gap between emerging AI workloads and the data center infrastructure that powers them, working at the intersection of AI applications, distributed systems, networking hardware, and software architecture. You will join a focused team of multidisciplinary engineers driving AI workload optimization through deep application understanding, network analysis, and end-to-end systems thinking. Your insights will directly shape our products across the full stack - from applications and software libraries to hardware architecture and physical design.


What you'll be doing:
Model the performance of complex AI workloads to identify bottlenecks and recommend system-level optimizations.
Analyze new AI models, distributed training techniques, and inference workloads to understand their infrastructure requirements.
Build simulation and hardware platforms, run real AI workloads on them, and develop analytical tools to evaluate trade-offs across compute, memory, storage, and network behavior.
Translate research insights and workload behavior into actionable software, xhardware, and networking architecture requirements.
Partner with architecture, software, and product teams to influence our future networking and AI infrastructure roadmaps.
Drive architectural innovation by applying deep workload analysis to production machine learning frameworks.

We are seeking a sharp, innovative, and hands-on Architect to help shape the future of LLM inference at scale. Join our dynamic E2E Architecture group, where we build ground breaking systems powering the next generation of generative AI workloads. In this role, you will work across software and hardware domains to design and optimize inference infrastructure for large language models running on some of the most sophisticated GPU clusters in the world. Youll help define how AI models are deployed and scaled in production, driving decisions on everything from memory orchestration and compute scheduling to inter-node communication and system-level optimizations. This is an opportunity to work with top engineers, researchers, and partners across us and leave a mark on the way generative AI reaches real-world applications.

What Youll Be Doing:

Design and evolve scalable architectures for multi-node LLM inference across GPU clusters.

Develop infrastructure to optimize latency, throughput, and cost-efficiency of serving large models in production.

Collaborate with model, systems, compiler, and networking teams to ensure complete, high-performance solutions.

Prototype novel approaches to KV cache handling, tensor/pipeline parallel execution, and dynamic batching.

Evaluate and integrate new software and hardware technologies relevant to Core Spectrum-X technologies, such as load balancing, telemetry, congestion control, vertical application integration.

Work closely with internal teams and external partners to translate high-level architecture into reliable, high-performance systems.

Author design documents, internal specs, and technical blog posts and contribute to open-source efforts when appropriate.

We are seeking a skilled and adaptable Solution Architect to manage deep technical engagements during both pre-sales and post-sales activities. This role focuses on ensuring smooth deployment, addressing post-sales technical challenges, and delivering long-term value to customers by leveraging our advanced cybersecurity solutions.
Responsibilities
Build and maintain strong relationships with customers, serving as their trusted technical advisor to understand and address their needs, challenges, and goals.
Collaborate with internal teams, including Research and Development (R&D) and Product, to align solutions with customer needs.
Assist in the technical aspects of Proof of Concepts (PoCs) and lead pre-deployment readiness.
Drive post-sales success by solving complex technical issues, and implementing solutions in collaboration with customer and internal teams.
Proactively identify and communicate opportunities for improving customer security posture through solution enhancements and integrations.
Conduct technical training sessions for customer teams to ensure seamless adoption and effective use of our platform.
Stay informed about the latest trends and technologies in cybersecurity, networking, and AI to provide cutting-edge solutions to customers.

We are is looking for a strong technical senior architect to join us in shaping the future. Senior Architects are innovators who can translate business needs into workable technology solutions. Their expertise is deep and broad. They are hands on, producing both detailed technical work and high-level architectural designs.

As a Senior architect in the AI Networking Research team, you will explore technological challenges on accelerate networking and building AI data centers. Research new transport functions and semantics for optimizing AI workloads, AI systems communication and accelerations and much more. You will also be leading architectural and development efforts across numerous technological fields, related to the modern AI data center, such as distributed AI and deep learning solutions, data analytics, High Performance Computing (HPC), Software Defined Networking (SDN), virtualization, storage, and more.

What youll be doing:

Enhance our GPU Networking offerings for accelerating AI workloads, such as our Dynamo, our NIXL and our UCX, tailored to the unique requirements of AI workloads.

Co-design hardware features (e.g., in GPUs, DPUs, or interconnects) that accelerate data movement and enable new capabilities for inference and model serving.

Identify and evaluate new technologies, innovations and partner relationships for alignment with our technology roadmap and business value.

Lead architecture and design of new technologies and innovations such as runtime systems, communication libraries, AI-specific technologies.

Lead proof-of-concept development to evaluate and drive such technologies.