דרושים » תוכנה » Endpoint Research & Protection Team Leader REF74C

Required Silicon Test and DFT Engineer, Cloud
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.The AI and Infrastructure team is redefining whats possible. We empower customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity.
We're behind groundbreaking innovations, empowering the development of AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Collaborate with Architecture, Design and Verification teams to develop new product bring-up, validation, characterization, and qualification strategies and manufacturing test solutions for new High Performance Computing (HPC) products in advanced process technologies.
Verify test solutions on pre-silicon models (simulation or emulation) and develop Automated Test Equipment (ATE) test modules and binning flows.
Develop and validate test programs on Automated Test Equipment (ATE) platforms for new product integration (NPI) in preparation for high-volume manufacturing (HVM), working with ATE vendors and internal cross-functional teams.
Manage product sustainment support, including analyzing volume data, improving test time and yield, assessing test escapees and return merchandise authorizations (RMAs), localizing failures, implementing containment measures, and partnering with design, manufacturing, and quality and reliability teams to identify root causes and implement corrective actions.
Build tools, flows and methodologies to continuously improve and automate the testing life-cycle.

Required Senior Software Engineer, CPU, Cloud
About the job
In this role, you will work at the center of our most strategic infrastructure investments. You will join a high-impact team operating on the critical path of our hardware and software evolution, bridging the gap between compute infrastructure and the massive scale of our software stack. You will be responsible for defining the methods and technologies required to model, simulate, and analyze complex hardware systems, with a core focus on security, performance, and correctness analytics, ensuring the efficiency of our future compute platforms. As a software engineer in this group, you will act as an architect, designer, and coder taking ownership of your goal and working in close partnership with cross-functional teams to make it a reality.
You will be at the intersection of hardware design and software optimization for our next-generation high-performance compute cores. You will not just support existing infrastructure; but will be helping build the foundation of our future hardware. Because this work is on the "most critical path" for our future, you will have visibility into and influence over the core technology that powers our most intensive services. You will bridge the gap between silicon-level security research and massive-scale software implementation, working with experimental AI tools that are shaping how we verify and optimize future hardware. You will be building the foundation of our future hardware.
Responsibilities
Drive performance modeling and analysis for next-generation CPUs, while identifying architectural bottlenecks, ensure system correctness, and implement optimization strategies across hardware-software stack to maximize efficiency for compute workloads.
Design, develop, and maintain software modeling tools and simulation environments, leverage C++, Python, and AI-driven methodologies to perform studies and automate analytical workflows.
Conduct security analysis and threat modeling for hardware-software interfaces, while developing and implementing methodologies for detecting, mitigating, and analyzing side-channel and micro-architectural vulnerabilities, ensuring systems meet safety and privacy.
Explore, deploy, and scale experimental AI-driven tooling to automate verification workflows, enhance predictive modeling, and accelerate development cycles, actively contribute to expanding the team's suite of AI-assisted capabilities.
Provide technical leadership in system integration projects, guide cross-functional teams to resolve large-scale compute bottlenecks, influence architectural designs, and facilitate the successful deployment of hardware-software solutions.

Were currently seeking a Senior Developer Technology Engineer, Artificial Intelligence. Would you enjoy researching parallel algorithms to accelerate AI workloads on advanced computer architectures? Do you find it rewarding to identify and eliminate system bottlenecks to achieve the best possible performance on pioneering computer hardware? Could you be thrilled about an opportunity to partner with the developer community, working at the forefront of technology breakthroughs that contribute to the success of an industry leader like us? If so, the Developer Technology Team invites you to consider this role.

What you will be doing:

In this position, you will research and develop techniques to GPU accelerate workloads in deep learning, machine learning or other AI domains.

Work directly with other technical experts in their fields (industry and academia) to perform in-depth analysis and optimization of complex AI and HPC algorithms to ensure optimal AI solutions on modern CPU and GPU architectures.

Publish and/or present discovered optimization techniques in developer blogs or relevant conferences to engage and educate the developer community.

Influence the design of next-generation hardware architectures, software, and programming models in collaboration with research, hardware, system software, libraries, and tools for our teams.

We are seeking a highly motivated High-Performance System Architect to join our team of experts and help shape the future of high-performance and ML / AI computing. Our next-generation NVL systems will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used at almost every industry today, such as car and Pharmaceutical. As a high-performance system architect, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation networks that will be used by top researchers and engineers around the world.

What youll be doing:

Define the NVL system architecture end-to-end, by internal requirements and customers requirements through all product life cycles (post/pre silicon, on deployments).

Research of various solutions to enable the next large-scale-high-performance computing clusters. The position spans over various layers from algorithms, software, firmware, and HW.

Developing models for simulations and performance testing, analysing the results and development of future HW and SW.

Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and research teams, to ensure the successful execution of the project.

we are looking for a AI Applied Scientist - Insights & Recommendations.
As AI Applied Scientist, youll be at the intersection of advanced technology and meaningful impact with clear business cases. You will have access to real-time (RT) big data from multiple Sensors & Data sources, and a chance to discover, explore research, and develop cutting-edge models that directly impact industrial manufacturers around the globe. As part of the Applied AI/ML Science team , you will have the opportunity to continuously grow and learn while building and deploying advanced models directly into our products, and stay at the forefront of the world's technologies, witnessing firsthand their impact on our customers.
A Day In Your Life:
Own the algorithm lifecycle from problem definition and data analysis to prototyping and delivering production-ready models.
Combine classic methods with inference techniques: statistics, Time series, Deep learning, anomaly detection, Recommendation Systems, Transformers, and Inference to extract data-driven insights.
Research, design, and build Agentic applications on top of sensor time-series data, textual data, images, ML applications, and other various data sources.
Engage with customers and collaborate with our product team to develop innovative solutions utilizing new types of data.
Leverage modern technologies: work with cloud-based big data platforms for storage, distributed processing, LLMs and agents (GPT, Claude, Gemini), defining & building Gurdrails, reasoning chain as function call, planning, ML-based vectorization and embeddings, and stream analysis.

Required Power and Signal Integrity Engineer
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
As a Power and Signal Integrity Engineer, you will be responsible for the design and characterization of signal and power integrity of our IC designs. You will design the external electrical interfaces of the device, from their Signal/Power-integrity and electrical usage perspectives.
You'll set up methodologies, perform simulations, silicon characterization and correlations to ensure our IC designs meet systems design budgets and achieve the highest performance. You will work with systems architects, ASIC design, systems engineers, and partner cross-functionally with teams and external vendors/partners.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.
Design and optimize power distribution networks (PDN) across chip, package, and board levels.
Manage power/ground planes, decoupling capacitors, and power gating strategies.
Conduct both pre-layout and post-layout power integrity simulations to analyze power and ground noise (SSN/SSO), voltage drops (IR drop), and electromagnetic interference (EMI).

We are seeking a highly skilled Data Platform SW Engineer to join the Applied Networking AI group. In this role you will help develop advanced data acquisition solutions for the fields of predictive-maintenance, root-cause analysis and AIOPS. You'll collaborate closely with subject-matter-experts (SMEs), applied-researchers, architects, data-engineers and other stakeholders to push the envelope forward in using cutting-edge technologies and data-driven insights to improve our products.

As a key contributor you will develop and own metric-extraction, measurement and telemetry tools that enable a high resolution viewpoint into the hardware. You will experiment and iterate fast and in collaboration with applied-researchers to improve our ML diagnostic and prediction toolkit.

What you'll be doing:

Lead the development of advanced metric and measurement tools for real-time data collection and processing, to enable a high resolution viewpoint into the full set of HW components that compose our AI factory solutions (GPUs, networking interfaces, etc).

Work alongside applied-researchers to experiment and iterate on the bridge between metrics and ML.

Partner with architects and product managers to gain a deep understanding of our hardware and roadmap.

Collaborate with data-engineers to enable high resolution tools at scale.

The Networking Advanced Development Software team develops new groundbreaking technologies to enable new market shares for the company and tighten customer relationships. These are emerging technologies in networking and distributed computing for the booming AI factories and data centers. They span areas such as AI neural networks, Deep Learning, High Performance Computing (HPC), Storage, Cloud, SW Defined Network, Network Function Virtualization, 5G NR and more. We develop the solutions top-down, all the way from application behavioral analysis, to architecture definition and down to the implementation, using the world-leading our devices. The development traverses any needed component - application SW, middleware SW, OS kernel subsystems, device drivers, embedded SW (Firmware) and CUDA GPU. We collaborate with partners and key customers in the analysis processes and engage with open source communities introducing our leading features.

What youll be doing:

Lead a team of 5 engineers in the advanced technologies development.

Design and implement solutions throughout all layers from high level application, OS and driver subsystem to firmware.

Work on impactful projects involving state-of-the-art high-performance computing hardware and software.

Provide insight and technical guidance and collaborate with peers from across the company - including software architecture, chip architecture, and engineering departments to improve our future technology.

Collaborate with our partners and customers.

Required Senior Silicon DFT Lead
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As the Design for Test (DFT) Engineer Lead, you will play a crucial role in DFT Architecture and DFT design, and support devices to production. You will be responsible for providing technical leadership in DFT, developing flows, automation, and methodology, planning DFT activities, tracking the DFT quality throughout the project life-cycle, and providing sign-off DFT to tapeout.
The AI and Infrastructure team is redefining whats possible. We empower customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity.
We're the driving force behind our groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Lead and execute DFT activities in the design, implementation, and verification solutions for Application-Specific Integrated Circuits (ASIC).
Develop DFT strategy and architecture, including hierarchical DFT, Memory Built-In Self Test (MBIST), and Automatic Test Pattern Generation (ATPG).
Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT requirements are met and mutual dependencies are managed.
Manage a DFT team planning, deliverables, and provide technical mentoring and guidance.
Lead DFT execution of a silicon project, planning, execution, tracking, quality, and signoff.

We are seeking a Senior System Management Architect to lead the management architecture for our advanced SmartNIC cards. You will be the resident expert for SmartNIC system management, ensuring that NIC ASICs, Baseboard Management Controllers (BMCs), MCUs, CPUs, and CPLDs operate in perfect unison. You will own the lifecycle management specifications for SmartNIC platforms-from factory provisioning and day-one deployment to complex orchestrated reset flows and secure recovery. If you are someone who enjoys looking at a high-level system diagram and then immediately diving into the I2C/I3C bus topologies and PLDM command structures required to make it work, this role is for you.

What you'll be doing:

System Architecture & Flow Definition: Define and document comprehensive production, provisioning, update, recovery and reset flows for SmartNIC cards. Crucially, you will ensure that these board-level architectural decisions perfectly align with and support overarching platform-level needs, orchestrating seamless coordination between the NIC ASIC, BMC, CPU, and peripheral components.

Security & Provisioning: Specify security provisioning flows including OTP fusing, secure boot enablement, attestation key injection, certificate chain management, RPMC key derivation, and PQC (Post-Quantum Cryptography) requirements. Define IPN-to-OPN transition and component locking procedures.

Protocol Implementation & Guidance: Specify the use of standard management protocols (MCTP, PLDM, SPDM, NC-SI) across internal board interfaces to achieve secure boot, firmware updates, and telemetry gathering.

Hardware/Software Intersect: Dive deep into device-level hardware and software behaviour. Define CPLD logic requirements, power-sequencing dependencies, and reset orchestration (e.g., handling PCIe PERST#, SBR, and forced resets) for multi-host and standalone SmartNIC environments.

Interface Management: Architect intra-board communication pathways using PCIe, I2C/I3C, USB, and SPI, ensuring robust out-of-band (OOB) and in-band management connectivity.

Cross-Functional Leadership: Collaborate tightly with Production teams, Hardware and Firmware Engineering, NIC FW/Driver teams, and QA to translate your architectural specifications into implementable, testable realities.

Technical Documentation: Author rigorous technical specifications, test plans, and architectural design documents to guide both development and factory production.