דרושים » תוכנה » Performance Architect

Join our architecture team, the core of silicon development .
Our architects manage all aspects of system chip development and provide specifications to various development teams. In this role you will:
Define the features and specifications of future devices.
Utilize a data-driven approach to model and analyze networks of tomorrow, providing optimal solutions for our customers.
Model, analyze, and present simulation results for cutting-edge networking solutions across various use cases.
Apply strong networking research skills and a robust theoretical background to your work.

We are looking for a Junior SW Development Engineer to join our team.
You will be based in Caesarea, Israel.



Location
Hybrid - Working at least 3 times a week from the office



What you will be doing:

As a member of one of our global Agile SW Scrum teams, you will contribute to the development of cutting-edge, cable industry-leading products and services.
Your work will involve:

C/C++ Software Development: Design and implement features within the MAC and upper layer protocol domains, leveraging the latest advancements in C++ technology.
Advanced Networking Solutions: Contribute to solutions running on Linux servers using containerized environments (Kubernetes), employing state-of-the-art technologies and methodologies.
Troubleshooting & Debugging: Investigate and resolve complex issues from internal QA teams and external customer reports.
Agile Methodologies: Plan, develop, and deliver features in an Agile development environment.

AI scale-out communication is a critical element in modern data centers, and emerging standards such as Ultra Ethernet aim to address this challenge. This role focuses on defining a high-performance Smart NIC architecture optimized for GPU-centric AI workloads, with emphasis on low-latency, high-bandwidth data movement.

You will work across hardware and software domains, collaborating closely with AI, platform, driver, and VLSI teams to design a competitive scale-out networking solution.

Responsibilities

Lead the software architecture and technical roadmap for or next-generation ultra low-latency AI-SuperNIC software stack, including drivers, firmware, libfabric, and libibverbs.
Define the partitioning and interfaces between hardware, firmware, kernel drivers, user-space libraries, and AI frameworks.
Lead the design and implementation of high-performance networking, RDMA, and GPU-direct communication capabilities.
Drive software support for emerging technologies and standards such as UEC, UALink, MRC and RoCEv2 ecosystems.
Work closely with hardware, system architecture, and VLSI teams to optimize performance, scalability, and feature delivery.
Define performance goals and lead profiling, benchmarking, and optimization efforts for GenAI and distributed AI workloads.
Collaborate with customers, partners, and open-source communities to ensure ecosystem compatibility and adoption.
Mentor software engineers and provide technical leadership across firmware, driver, and networking software development

Youll be joining the post silicon validation team in PHY system group as part of the silicon development .
Our team deals with PHY and system aspects of the SerDes communication IP: PHY FW, calibrations, system definitions and operations and post-silicon validation including developing the automation infrastructure and tools.
We use latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.

Join the PHY system team, a pivotal part of silicon development. Our team focuses on the PHY and system aspects of our devices, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.
Key responsibilities include:
Working with the latest silicon technologies and processes to build large-scale, complex devices at the forefront of feasibility.
Contributing to the development of PHY firmware and system calibrations.
Participating in system definitions, operations, and post-silicon validation activities.

we are seeking a Lead System Architect to join our system architecture team and help define NR-NEXUS, our next-generation AI inference platform.

Responsibilities

Lead the software architecture and technical roadmap for NR-Nexus
Write system specifications for NR-Nexus product
Research AI infrastructure, SaaS platforms, model serving, and inference trends
Work with engineering to translate technical capabilities into product value
Work closely with engineering teams to optimize performance, scalability, and feature delivery.
Define performance goals and lead profiling, benchmarking, and optimization efforts for GenAI and distributed AI workloads.
Collaborate with customers, partners, and open-source communities to ensure ecosystem compatibility and adoption.
Mentor software engineers and provide technical leadership

We are looking for a Senior DevOps Engineer to join our team
You will report to the DevOps Sr. Manager


Location
Working at least 3 days a week from the office in Caesarea



What you will be doing:

Were looking for a Senior DevOps Engineer with strong Python skills, deep Linux (Debian based) experience, and hands-on expertise with AWS and Kubernetes. In this role, youll take ownership of automating, scaling, and maintaining our infrastructure and CI/CD systems which are critical components that power our next-gen broadband solutions. Youll work closely with senior engineers in a high-impact environment, developing internal tools and platforms that support both infrastructure and the full software delivery lifecycle. Your work will directly influence our development velocity, deployment reliability, and production artifacts quality.

Key Responsibilities

Operate and extend our Kubernetes-based and container-based platforms and orchestrate deployments on AWS.
Own and evolve our CI/CD pipelines, focused on Debian packaging, container orchestration, and cloud- native deployments.
Design and develop Python modules, tools and services to manage CI frameworks, packaging processes, and operational automation.
Work closely with development teams to diagnose and resolve complex issues across build systems, APIs, and development environments.
Maintain and improve automated build/test pipelines using Jenkins and Argo workflow.
Implement infrastructure-as-code practices using tools such as Terraform, ArgoCD, and Helm.

We are excited to announce that the Cisco Silicon One team is undergoing rapid growth, and we are looking for a C++ Software Developer.
Meet the Team:
Join the Cisco Silicon One team developing a unified silicon architecture for web-scale and service provider networks. Cisco's silicon team provides an outstanding, unique experience for ASIC and Software engineers by combining the resources offered by a sizable multi-geography silicon organization with the startup culture and breadth of growth opportunities that working in a smaller team can provide.
Your Impact:
Craft and develop software driving the world's most complex infrastructures
Gain intimate knowledge of world-class silicon and programming models
Work with architecture and design teams to define the next generation of ASIC products being developed