The Senior Software Engineer, Edge our company's growing engineering organization and help build the software that runs on the core device layer behind our platform. This role sits within a small, highly impactful team responsible for a hybrid edge system that powers core functionality across video, security, networking, storage, and AI deployment in production environments. You'll work on a resource-conscious, distributed device architecture that spans multiple hardware targets and brings together technologies more commonly seen across both embedded and cloud systems. This is a strong fit for an engineer who enjoys meaningful ownership, thrives in a fast-moving startup environment, and is comfortable building reliable software for systems customers depend on every day.
Location & Travel
Hybrid / Onsite Schedule: Based in Caesarea or Ramat Gan with 2 days a week working from home.
Responsibilities
Contributing to the development of our core edge platform, designed to run across diverse hardware environments as part of a hybrid edge-cloud architecture
Developing and integrating video management capabilities, including streaming, recording, and real-time AI processing
Designing and optimizing systems for low-latency, high-performance workloads at the edge
Building secure and efficient communication pipelines between edge devices and cloud systems
Working closely with AI/ML engineers to deploy and optimize models on-device
Participating in code reviews, debugging, and performance tuning across the stack
Collaborating with a talented team of engineers, AI experts, and leadership in a fast-moving environment
We dont do cookie-cutter. If you dont check every box but youve got the grit, the drive, and the track record-especially in security or AI-we encourage you to apply.

In this role, you will be leading all aspects of verification and will have a critical impact on the company's R&D path.



Responsibilities:

Lead the full verification lifecycle and methodologies. Plan, Design and Execute verification of SV/UVM Block level and Full chip environments , creating and execution test plans, tracking progress, and ensuring verification closure across diverse Mix-signals SoC simulation using Verilog, MATLAB, HW/SW Co-simulation and lab integration.
Work closely with Digital Design, Analog Design, Software, Back-end, SW and System teams to understand the functional, power and performance goals of the product and ensure its quality.

In this role, you will be leading all aspects of verification and will have a critical impact on the company's R&D path.



Responsibilities:

Define and implement robust SV/UVM verification solutions, including test benches and methodologies, to drive efficient verification closure across block-level and full-chip designs, integrating Mix-signals SoC simulation environment using Verilog, MATLAB, HW/SW Co-simulation and lab integration.
Work closely with Digital Design, Analog Design, Software, Back-end, SW and System teams to understand the functional, power and performance goals of the product and ensure its quality.