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חברה חסויה
Location: Haifa
Job Type: Full Time
Required Verification Engineer
Job Description Summary
Responsible for running various verification activities on PET medical products that covers multi-disciplinary aspects from SW/HW, electronics, mechanics, physics, image quality and radiation - which is safety for users and monitored by a tag all the time.
Job Description
Job Description:
Responsible for planning and implementing verification methodologies and ensuring proper fulfillment of system and sub-system requirements.
Responsible for reviewing various product designs, verifying its functionality in agile testing methods.
Responsible to determine the testing environments and tools.
Analyze and debug system failures and issue found during testing, while delivering detailed reports identifying these issues for further investigation.
Work closely with development teams
Non-hybrid, full-time position on site
Flexible on working hour, including 2-3 evening shifts (14:00-23:00) per week as needed
Working on global programs that required tight collaboration with global and Israel teams.
Requirements:
B.Sc. in Bio-Medical / Mechanical / Electronic Engineering / Or Equivalent Experience.
+3 years of experience in multi-disciplinary medical products manual/automation testing, with strong knowledge of software QA processes
Good documentation skills of test design and scripts for complete coverage of detailed system requirements
Quality focus, willingness to learn, versatility and adaptability.
Good organizational skills and strong written and verbal communication.
Excellent English communication skills, both written and verbal.
Advantages:
Experience >5 years as verification engineer in medical device (PET/SPECT) companies
Experience with Agile methodology
Experience with Linux and MATLAB
Experience with Python & automation development
Experience with test tools and frameworks (such as: ALM, Rally, Doors & Compass).
This position is open to all candidates.
 
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01/07/2026
Location: Haifa
Job Type: Full Time
we are looking for a Senior VLSI Verification Engineer to join the ride as we spearhead the next revolution in electronics!
Position location: in our Haifa or TLV offices, at least 2 working days at Haifa site (
Responsibilities
Develop and maintain advanced verification environments using SystemVerilog and UVM, ensuring scalability, configurability, and reusability across multiple IPs.
Design, implement, and execute comprehensive testbenches and random test suites to validate functional correctness, robustness, and corner-case behavior of complex IP within various SoC integration environments.
Drive coverage closure by defining, collecting, and analyzing code and functional coverage metrics; identify verification gaps and ensure complete validation of feature sets prior to sign-off.
Lead debug and root-cause analysis efforts in collaboration with senior verification and design engineers, leveraging carefully crafted logs, waveform analysis and assertions to isolate and resolve design or environment issues.
Collaborate closely with architecture, design, and firmware teams to ensure verification completeness, alignment with design intent, and seamless integration at the system level.
Contribute to methodology and infrastructure improvements, including reusable UVM components, automation scripts, and best practices that enhance team efficiency and verification quality.Hybrid model).
Requirements:
B.Sc. in Electrical/Computer Engineering or equivalent.
5+ years of experience as a VLSI Verification Engineer.
Expertise in System-Verilog and UVM.
Strong software development skills and the ability to develop reusable verification components and utilities.
Strong organizational and planning skills, with the ability to prioritize and drive verification projects to completion.
Effective communicator with a structured, detail-oriented approach to problem-solving and collaboration.
Advantages:
Experience with Git, Python, code templating methods, and open-source verification workflows.
Familiarity with full-chip level aspects of VLSI verification (reset architecture and sequences, power domains and modes, etc.).
Experience in firmware verification, including emulation-based verification on FPGA.
Experience with formal verification or mixed-signal simulation.
This position is open to all candidates.
 
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05/07/2026
חברה חסויה
Location: Haifa
Job Type: Full Time
We are looking for a System Engineer to join our CT (Computed Tomography) R&D team within the department. You will be responsible for gathering, analyzing, and reviewing system-level and sub-system requirements, coordinating system partitioning and total system integration using systems engineering practices.
Your role:
Contribute to system architecture, design, and integration of a complex CT subsystem.
Perform hands-on lab work, including system bring-up, debugging and root-cause analysis.
Own and maintain system-level documentation (requirements, specifications, interfaces, design rationales).
Support verification and integration activities across multiple CT platforms.
Lead technical topics and collaborate closely with HW, SW, Mechanics, Physics, Manufacturing, Quality, and Service teams.
Support field and production issue investigations and lifecycle improvements.
Requirements:
BSc or MSc in Electrical, Mechanical, Biomedical or Systems Engineering (or related field).
+3 years of experience in system engineering or complex product development.
Strong hands-on technical experience with complex HW/SW systems.
Experience writing and maintaining clear, structured technical documentation (medical devices preferred).
Knowledge of system integration, V&V, and design control processes.
Strong communication and cross-functional collaboration skills.
Fluent in English (written and spoken).
Advantages :
Experience with CT or medical imaging systems.
Experience with field issue analysis, reliability investigations, or lifecycle support.
Experience working in a regulated environment (medical devices preferred)
Familiarity with requirements, risk management, or PLM tools.
Matlab skills
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required AI SoC Design Verification Engineer, Cloud

About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a System on a Chip (SoC) Design Verification Engineer, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure.
As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers on projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
The AI and Infrastructure team is redefining what’s possible. We empower our customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. 
We're the driving team behind our groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertion (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
4 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital systems using standard IP components/interconnects (microprocessor cores, hierarchical memory subsystems).
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience with verification techniques, and the full verification life-cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with ASIC standard interfaces and memory system architecture.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Design Verification Engineer, Networking, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Senior Design Verification Engineer, you will be a part of Research and Development team to verify digital designs, develop constrained-random test environments and drive system testing to closure. You will collaborate with design and verification teams, manage the verification life-cycle and uncover bugs through corner-case testing.
Responsibilities
Plan and execute the verification of digital design blocks by understanding specifications and working with design engineers to define key verification scenarios.
Develop and refine random verification environments using SystemVerilog/UVM or Specman to ensure effective test coverage.
Define and implement various coverage measures to capture stimulus and corner-case scenarios.
Collaborate with design engineers to debug tests and ensure functional correctness of design blocks.
Drive coverage analysis to identify verification gaps and demonstrate progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
8 years of experience verifying digital logic at Register-Transfer Level (RTL) using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or Application-specific integrated circuit (ASICs).
Experience with Central Processing Unit (CPU ) implementation, assembly language, or compute System on a Chip (SOC).
Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
Experience creating and using verification components and environments in standard verification methodology.
Preferred qualifications:
Masters degree in Electrical Engineering or Computer Science.
2 years of experience verifying digital logic at Register-Transfer Level (RTL) using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or Application-specific integrated circuit (ASICs).
Experience with UVM, SystemVerilog, or other scripting languages (e.g., Python, Perl, Shell, Bash, etc.).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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05/07/2026
Location: Haifa
Job Type: Full Time and English Speakers
We are seeking an experienced and self-driven Systems Engineering Functional Manager to lead our systems engineering team for Philips CT/AMI detection platform . This team is responsible for the full lifecycle of system-level development from systems design, requirements management , architecture design, execution of technical reviews, setting the integration plan to verification, validation, and regulatory compliance.
Your role:
Lead and mentor a multidisciplinary systems engineering team, fostering growth, collaboration, and technical excellence.
Provide strategic and hands-on technical guidance in the development of CT/AMI detection platforms.
Oversee engineering planning and execution to support complex project ensuring timelines and quality standards are met.
Resource assignment and prioritization including headcount and budget management.
Working across functions and team boundaries to define, design, and implement the next generation of products.
Decision making in cross-disciplinary and architectural aspects.
Drive continuous improvement in engineering and systems engineering processes and tools.
Support audits and regulatory inspections as a subject matter expert.
Represent System Design in global engineering forums and initiatives.
Requirements:
Bachelors degree in mechanical, electrical, Physics, or closely related discipline.
7+ years experience as a system engineer leading cross-disciplinary engineering teams in design and development of multi-disciplinary systems, of which 5+ years in direct people leadership. Previous experience as a designer in one of the engineering fields quoted above.
Proven ability to develop timely and effective solutions for challenging design problems
Experience with requirements management and traceability tools and methodologies.
Familiarity with Quality Management System, design controls and risk management in regulated environments.
Able to identify and report any quality or compliance concerns and take immediate actions.
Experience with Verification and validation processes.
Excellent communication and stakeholder management skills.
Fluent in English.
This position is open to all candidates.
 
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חברה חסויה
Location: Haifa
Job Type: Full Time
Required V&V Engineer
Job Description Summary
Activities contributing to the design and development of products, solutions and systems. Includes activities linked to technical improvement of existing products and components Impacts quality of own work and the work of others on the team. Executes standard operational/technical tasks typically subject to instructions and work routines. There is latitude to rearrange the sequence to complete task/duties based on changing work situations.
Roles and Responsibilities:
Responsible for execution of laboratory and field validation testing, inspection and data acquisition for use in the design and validation of products and services. Responsible for design and construction of test facilities, instrumentation systems and the development of test software
Broadening knowledge of own technical discipline to execute policy/strategy. May include support roles with specialized technical field of knowledge; still acquiring higher level knowledge and skills.
Basic understanding of key business drivers; uses this understanding to accomplish own work. Good understanding of how work of own team integrates with other teams and contributes to the area.
May have some autonomy to make decisions within a defined framework. Resolves issues in situations that require good technical knowledge and judgment within established procedures. Consults more senior team members for issues outside of defined instructions/parameters.
A job at this level requires good interpersonal skills and may be required to lead a junior team. For customer facing roles, develops strong customer relationships and serves as the interface between customer and GE. Explains technical information to others.
Requirements:
For roles outside of the USA- This role requires basic experience in the Engineering/Technology & Testing. Knowledge level is comparable to a Bachelor's degree from an accredited university or college ( or a high school diploma with relevant experience).
Desired Characteristics:
Strong oral and written communication skills. Ability to document, plan, market, and execute programs.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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חברה חסויה
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Junior SoC DFT Engineer, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Haifa, Israel; Tel Aviv, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a System on a Chip (SoC) Design for Testing (DFT) Engineer, you will be responsible for defining, implementing and deploying advanced DFT methodologies for highly digital or mixed-signal chips or IPs. You will define silicon test strategies, DFT architecture, and create DFT specifications for a CPU. You will design, insert and verify the DFT logic.You will prepare for post silicon and co-work/debug with test engineers. You will be responsible for reducing test cost, increasing production quality and enhancing yield.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our platforms, we make our product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Develop DFT strategy and architecture (e.g., hierarchical DFT, Memory Built-In Self Test (MBIST), Automatic Test Pattern Generation (ATPG).
Complete all Test Design Rule Checks (TDRC) and design changes to fix TDRC violations to achieve high-test quality.
Insert DFT logic, boundary scan, scan chains, DFT Compression, Logic BIST, TAP controller, clock control block, and other DFT IP blocks.
Insert and hook up MBIST logic including test collar around memories, MBIST controllers, eFuse logic, and connect to core and TAP interfaces.
Document DFT architecture, test sequences, and boot-up sequences associated with test pins.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, a related field, or equivalent practical experience.
1 year of experience with Design For Test (DFT) methodologies, DFT verification, and industry-standard DFT tools.
Preferred qualifications:
Master's degree in Electrical Engineering, or a related field.
Experience in fault modeling.
Experience in IP integration (e.g., Memories, Test Controllers, Test Access Point (TAP), and Memory Built-In Self Test (MBIST)).
Experience working with ATE engineers (e.g., silicon bring-up, patterns generation, debug, validation on automatic test equipment, debug of silicon issues).
Experience in SoC cycles, including silicon bring-up and silicon debug activities.
Experience with ASIC DFT synthesis, simulation, and verification flow.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior CPU Design Verification Engineer, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, and system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning and test execution to collecting and closing coverage.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
8 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, or a related field.
3 years of experience creating and using verification components and environments in standard verification methodology.
Experience with verification techniques, and the full verification life cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with Application-Specific Integrated Circuit (ASIC) standard interfaces and memory system architecture.
Knowledge of CPU/Processor architectures (e.g., pipeline, cache, memory subsystem, instruction sets, exceptions) like ARM, X86 or RISC-V, is highly beneficial for verifying processor cores or IP blocks.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8717535
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required CPU Design Verification Engineer, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, and system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning and test execution to collecting and closing coverage.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
4 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, or a related field.
3 years of experience creating and using verification components and environments in standard verification methodology.
Experience with Application-Specific Integrated Circuit (ASIC) standard interfaces and memory system architecture.
Experience with verification techniques, and the full verification life cycle.
Experience with performance verification of ASICs and ASIC components.
Knowledge of CPU/Processor architectures (e.g., pipeline, cache, memory subsystem, instruction sets, exceptions) like ARM, X86 or RISC-V, for verifying processor cores or IP blocks.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8717519
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תודה על שיתוף הפעולה
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חברה חסויה
Location: Haifa
Job Type: Full Time
Required Advanced Manufacturing Engineer
Role Summary
The Advanced Manufacturing Engineer (AME) is responsible for industrializing and sustaining complex PET and SPECT imaging products at a high‑complexity electromechanical manufacturing site. The AME ensures robust manufacturability of high‑level mechanical assemblies, electronics integration, wiring, detector modules, motion systems, and system‑level testing. The role drives process development, tooling, validation, DFM/DFA, quality improvement, and readiness for production and NPIs.
NPI Leadership for PET & SPECT Imaging Systems:
Lead manufacturing readiness for new PET/SPECT products, including process layout, tooling development, and new equipment introduction.
Participate in design reviews and influence DFM/DFA/DFT across mechanical assemblies, detector modules, power systems, wiring harnesses, and electromechanical subsystems.
Translate design intent into controlled, stable manufacturing processes.
Coordinate ECO implementation and ensure smooth manufacturing release.
Assembly Process Development & Optimization:
Develop robust assembly processes for mechanical and electronic integration, alignment, torque control, and detector installation.
Define and design manufacturing jigs, tools, fixtures, and lifting/handling solutions required for large subsystems.
Lead design/manufacture of equipment, tooling, and jigs internally or via suppliers to eliminate defects.
Drive LEAN manufacturing implementation and support continuous improvement.
Conduct PFMEA for existing and new processes.
Quality & Problem Solving:
Drive product quality improvements by identifying manufacturing issues and implementing cost‑effective solutions.
Work with Production Associates to resolve manufacturing and quality problems.
Oversee corrective action implementation in production or suppliers.
Support RCA through structured failure analysis.
System Integration & Testing Support:
Support integration/testing of assembled PET/SPECT systems including calibration, alignment, motion validation, detector gain calibration, and safety checks.
Work with System Engineering to define test protocols and acceptance criteria.
Troubleshoot system issues related to electromechanical assemblies.
Validation & Regulatory Compliance:
Own IQ/OQ/PQ for equipment, tools, and manufacturing processes.
Ensure compliance with ISO 13485, ISO 14971, 21 CFR 820, IEC 60601, and internal QMS requirements.
Maintain strong documentation practices including control plans, validation protocols, and DHR/DMR accuracy.
Ensure traceability for critical parameters, torques, and calibration data.
Supplier & Cross‑Functional Collaboration:
Collaborate with suppliers of mechanical assemblies, detector modules, wiring harnesses, and PCBs.
Lead technical discussions with suppliers for tooling, process capability, and quality issues.
Train and qualify production and supplier teams on processes and inspection/assembly methods.
EHS & Plant Compliance:
Lead and support Environment, Health & Safety efforts aligned with site goals.
Ensure safe handling of large assemblies, HV systems, and radiation‑related components.
דרישות:
Drive product quality improvements through systematic problem solving.
Lead design requirements for manufacturing processes, tools, and fixtures.
Design and manufacture jigs, fixtures, and tooling (internal or supplier‑managed).
Strong experience with LEAN manufacturing and PFMEA execution.
Ability to resolve complex manufacturing and quality issues.
Leadership of NPI activities including tool development and equipment introduction.
ECO coordination and controlled release management.
Strong understanding of compliance, EHS, and regulated manufacturing.
Ability to train and qualify production and supplier teams.
Mechanical/electromechanical assembly expertise.
Experience with HV/LV wiring, detector systems, and motion integration.
Strong analytic המשרה מיועדת לנשים ולגברים כאחד.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8745600
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