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7 ימים
חברה חסויה
Location: Caesarea
Job Type: Full Time
we are seeking a Lead System Architect to join our system architecture team and help define the next generation of our AI-SuperNIC scale-out chip.
AI scale-out communication is a critical element in modern data centers, and emerging standards such as Ultra Ethernet aim to address this challenge. This role focuses on defining a high-performance Smart NIC architecture optimized for GPU-centric AI workloads, with emphasis on low-latency, high-bandwidth data movement.
You will work across hardware and software domains, collaborating closely with AI, platform, driver, and VLSI teams to design a competitive scale-out networking solution.
Responsibilities:
Lead the software architecture and technical roadmap for or next-generation ultra low-latency AI-SuperNIC software stack, including drivers, firmware, libfabric, and libibverbs.
Define the partitioning and interfaces between hardware, firmware, kernel drivers, user-space libraries, and AI frameworks.
Lead the design and implementation of high-performance networking, RDMA, and GPU-direct communication capabilities.
Drive software support for emerging technologies and standards such as UEC, UALink, MRC and RoCEv2 ecosystems.
Work closely with hardware, system architecture, and VLSI teams to optimize performance, scalability, and feature delivery.
Define performance goals and lead profiling, benchmarking, and optimization efforts for GenAI and distributed AI workloads.
Collaborate with customers, partners, and open-source communities to ensure ecosystem compatibility and adoption.
Mentor software engineers and provide technical leadership across firmware, driver, and networking software development
Requirements:
BSc/MSc in Computer Science, Electrical Engineering, or a related field.
7+ years of experience in software architecture, networking software, or system software development.
Strong experience developing Linux kernel drivers, firmware, and user-space networking software.
Deep understanding of data center networking, including Ethernet, TCP/IP, routing, switching and congestion management
Proven experience defining software architectures that span hardware, firmware, kernel, and user-space components.
Strong programming skills in C/C++ and experience with Linux-based development environments.
Experience leading cross-functional technical initiatives and collaborating with hardware and system architecture teams.
Excellent analytical, debugging, and performance optimization skills.
Nice to Have:
Experience with RDMA technologies and low-latency networking architectures.
Experience with libfabric, libibverbs, RDMA-core, DPDK, SPDK, or similar infrastructure software.
Familiarity with GPU communication technologies such as GPUDirect RDMA, NCCL, NVLink, or UALink.
Experience optimizing communication for distributed AI/ML workloads.
Contributions to open-source networking or Linux kernel projects.
Experience working on SmartNICs, DPUs, NICs, or networking ASICs.
Deep understanding of GenAI/ML infrastructure and distributed workloads
This position is open to all candidates.
 
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7 ימים
חברה חסויה
Location: Caesarea
Job Type: Full Time
we are seeking a Lead System Architect to join our system architecture team and help define NR-NEXUS, our next-generation AI inference platform.
Responsibilities:
Lead the software architecture and technical roadmap for NR-Nexus
Write system specifications for NR-Nexus product
Research AI infrastructure, SaaS platforms, model serving, and inference trends
Work with engineering to translate technical capabilities into product value
Work closely with engineering teams to optimize performance, scalability, and feature delivery.
Define performance goals and lead profiling, benchmarking, and optimization efforts for GenAI and distributed AI workloads.
Collaborate with customers, partners, and open-source communities to ensure ecosystem compatibility and adoption.
Mentor software engineers and provide technical leadership
Requirements:
7+ years of software engineering experience, including 3+ years in software architecture or technical leadership.
Strong experience with Kubernetes-based platforms and cloud-native architecture.
Deep understanding of Gen AI/LLM infrastructure and distributed workloads
Experience designing management software or SaaS platforms for production systems.
Strong background in distributed systems, microservices, APIs, and automation.
Hands-on experience with observability stacks, monitoring, logging, alerting, and SLA/SLO tracking.
Experience with CI/CD, deployment automation, upgrades, and rollback mechanisms.
Good understanding of security, authentication, authorization, and integration with customer data center environments.
Nice to have:
Deep understanding of GenAI / LLM inference infrastructure, including model serving, scaling, batching, latency, throughput, and resource utilization.
Experience with production AI inference clusters using GPUs, AI accelerators, or other specialized compute infrastructure.
Understanding of how distributed inference systems operate, including scheduling, load balancing, autoscaling, failover, and cluster-level observability.
Experience with LLM serving frameworks such as vLLM, Triton Inference Server, TensorRT-LLM, or similar.
Familiarity with GPU/accelerator orchestration, device plugins, resource scheduling, and cluster capacity planning.
Familiarity with GPU communication technologies such as GPUDirect RDMA, NCCL, NVLink, or UALink.
Experience optimizing communication for distributed AI/ML workloads.
Knowledge of Prometheus, Grafana, OpenTelemetry, Helm, Argo CD, Istio, KServe, Kubeflow, or similar tools.
Experience deploying software in on-prem, edge, private cloud, or hybrid environments.
This position is open to all candidates.
 
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חברה חסויה
Location: Caesarea
Job Type: Full Time and Hybrid work
Performance Architect
What You'll Do:
Join our Silicon One architecture team, the core of silicon development. Our architects manage all aspects of system chip development and provide specifications to various development teams. In this role you will:
Define the features and specifications of future devices.
Utilize a data-driven approach to model and analyze networks of tomorrow, providing optimal solutions for our customers.
Model, analyze, and present simulation results for cutting-edge networking solutions across various use cases.
Apply strong networking research skills and a robust theoretical background to your work.
Who You'll Work With
You will be part of our Silicon One architecture team, which is central to our ASIC group.
Our team, which operates with a startup mentality within a stable and leading corporation, drives the development of next-generation networking devices.
Our design center is unique, hosting all silicon hardware and software development disciplines at one site. We are revolutionizing the industry by building a new internet for AI networks and the 5G era, with a unified, programmable silicon architecture that will underpin all of our future routing and switching products.
Our devices are engineered to be adaptable across service providers and web-scale markets, designed for both fixed and modular platforms. They deliver high speed without sacrificing programmability, buffering, power efficiency, scale, or feature flexibility. We are set to be a transformative technology for decades to come.
Requirements:
Minimum Requirements
Software Development Skills: Proficiency in C++ and Python.
Research Skills: Experience researching networking solutions.
Self-Learning Ability: Capability to quickly grasp new concepts and technologies from papers and specifications.
Presentation Skills: Effective in communicating and presenting complex technical concepts.
Curiosity & Innovation: A passion for innovation, with strong analytical skills and meticulous attention to detail.
Team Player: Proven ability to collaborate and contribute to team goals.
Technical Documentation: Strong writing skills for creating technical documents.
Preferred/Advantageous Qualifications
Versatility: Adaptable to diverse tasks within the networking architecture domain.
Network Modeling Experience: Familiarity with tools like ns-3 or OMNeT++.
AI Knowledge: Familiarity with AI concepts.
This position is open to all candidates.
 
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לפני 2 שעות
חברה חסויה
Location: Caesarea
Job Type: Full Time
We are looking for a Junior SW Development Engineer to join our team.
You will be based in Caesarea, Israel.



Location
Hybrid - Working at least 3 times a week from the office



What you will be doing:

As a member of one of our global Agile SW Scrum teams, you will contribute to the development of cutting-edge, cable industry-leading products and services.
Your work will involve:

C/C++ Software Development: Design and implement features within the MAC and upper layer protocol domains, leveraging the latest advancements in C++ technology.
Advanced Networking Solutions: Contribute to solutions running on Linux servers using containerized environments (Kubernetes), employing state-of-the-art technologies and methodologies.
Troubleshooting & Debugging: Investigate and resolve complex issues from internal QA teams and external customer reports.
Agile Methodologies: Plan, develop, and deliver features in an Agile development environment.
Requirements:
What you should have:

B.Sc. in Computer Science, Software Engineering, Electrical Engineering, or a related field
1-3 years of experience in designing, developing, and maintaining software applications using C++.
Strong proficiency in C/C++ programming, with a focus on developing robust, efficient, and maintainable code.
Solid experience in multi-threading, object-oriented design (OOD), and leveraging design patterns to solve complex problems.
Comprehensive understanding of networking concepts and environments, with hands-on experience in developing and debugging networking-related applications.
Proven experience developing under Linux operating systems, including expertise in debugging and performance optimization in Linux environments.
Demonstrated ability to troubleshoot and resolve complex, system-wide issues, drive the development of high-complexity features in C++, and lead the design of multi-module, multi-package solutions with a strong system-wide perspective.
AI enthusiasm with a growth mindset, eagerness to adopt and utilize AI tools as part of the development process to improve efficiency, code quality, testing, and overall engineering excellence.
Experience with Python for scripting, automation, or supplementary feature development.
Familiarity with DOCSIS concepts and implementations - advantage
This position is open to all candidates.
 
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חברה חסויה
Location: Tel Aviv-Yafo and Caesarea
Job Type: Full Time and Hybrid work
Required PHY Firmware Technical Leader
Meet the Team:
Join the Silicon One PHY System team, part of our core silicon development group.
Our team is responsible for PHY and system-level aspects of some of the most advanced networking devices in the industry, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.
We work with the latest silicon technologies and processes to build large-scale, highly complex devices at the edge of feasibility. Youll be part of a unique design center that hosts all silicon HW and SW disciplines under one roof, operating in a startup-like environment within a stable, world-leading company.
We are transforming the industry with a unified, programmable silicon architecture that powers our future routing portfolio and helps shape the Internet for decades to come.
Your Impact:
Develop PHY firmware and system-level features for advanced networking ASICs
Participate in post-silicon validation, including lab bring-up, debugging, and performance analysis
Collaborate closely with PHY, system, firmware, and silicon design teams
Contribute to defining system operation modes and end-to-end device behavior
Help drive the development of next-generation, high-scale networking solutions using cutting-edge silicon technologies
Who Youll Work With:
The Silicon One group, the center of our ASIC design efforts
Cross-functional teams including silicon design, firmware, and system
Global teams working together to deliver game-changing networking devices.
Requirements:
Minimum Qualifications:
B.Sc. or M.Sc. in Electrical Engineering or Computer Science from a top university
8+ years of relevant experience in system and firmware.
Strong system-oriented mindset with a multi-disciplinary approach
Ability to work on complex problems while multitasking across domains
Preferred Qualifications:
Experience with C++, Python.
Familiarity with processor architecture
Experience working in cross-functional, fast-paced development environments.
This position is open to all candidates.
 
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חברה חסויה
Location: Caesarea
Job Type: Full Time
We are seeking a HW Board Design Engineer.
Meet the Team:
Youll collaborate with top industry engineers within the fast-growing Silicon One group worldwide.
You will be part of a team driving our groundbreaking next-generation network devices. Our team operates in a startup-like atmosphere within a stable and leading corporation.
Our design center is unique, hosting all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry and building a new internet for the 5G era, with a unified, programmable silicon architecture that will be the foundation of all our future routing products.
Our devices are designed to be adaptable across service providers and web-scale markets, crafted for both fixed and modular platforms. They deliver high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility. We are a transformative technology set to serve our customers and end-users for decades to come.
Your Impact:
Spearhead innovative silicon architecture for AI infrastructure, guiding board design from concept through to mass production.
Collaborate with cross-functional teams in areas such as board design, mechanics, thermal, PCB layout, production, software/firmware, RTL, and more.
Act as the technical focal point and decision-maker for the project.
Conduct hands-on testing in a lab environment and support production and qualification stages.
Define product specifications, develop electrical schematics, and guide component selection and layout processes.
Requirements:
Minimum Qualifications:
B.Sc. in Electrical Engineering from a leading academic institution.
3+ years of experience as a board design engineer, with a strong background in executing complex hardware projects.
Experience in high-speed designs and multi-layer PCB design.
Hardware-oriented, with experience in lab work (measurements/characterization, lab equipment).
Hands-on experience in PCB bring-up and debugging.
Preferred Qualifications:
Demonstrated success in leading multi-disciplinary projects.
Strong project management abilities, self-driven, with excellent interpersonal skills.
System orientation with a multi-disciplinary approach and multitasking capabilities.
This position is open to all candidates.
 
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חברה חסויה
Location: Caesarea
Job Type: Full Time
We are seeking a HW Board Design Engineer.
Meet the Team
Youll collaborate with top industry engineers within the fast-growing Silicon One group worldwide.
You will be part of a team driving our groundbreaking next-generation network devices. Our team operates in a startup-like atmosphere within a stable and leading corporation.
Our design center is unique, hosting all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry and building a new internet for the 5G era, with a unified, programmable silicon architecture that will be the foundation of all our future routing products.
Our devices are designed to be adaptable across service providers and web-scale markets, crafted for both fixed and modular platforms. They deliver high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility. Our Silicon One is a transformative technology set to serve our customers and end-users for decades to come.
Your Impact:
Spearhead innovative silicon architecture for AI infrastructure, guiding board design from concept through to mass production.
Collaborate with cross-functional teams in areas such as board design, mechanics, thermal, PCB layout, production, software/firmware, RTL, and more.
Act as the technical focal point and decision-maker for the project.
Conduct hands-on testing in a lab environment and support production and qualification stages.
Define product specifications, develop electrical schematics, and guide component selection and layout processes.
Requirements:
Minimum Qualifications:
B.Sc. in Electrical Engineering from a leading academic institution.
4 years of experience as a board design engineer, with a strong background in executing complex hardware projects.
Experience in high-speed designs and multi-layer PCB design.
Hardware-oriented, with experience in lab work (measurements/characterization, lab equipment).
Hands-on experience in PCB bring-up and debugging.
Preferred Qualifications:
Demonstrated success in leading multi-disciplinary projects.
Strong project management abilities, self-driven, with excellent interpersonal skills.
System orientation with a multi-disciplinary approach and multitasking capabilities.
This position is open to all candidates.
 
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חברה חסויה
Location: Caesarea
Job Type: Full Time and Hybrid work
We are seeking a Physical Design Engineer.
Meet the Team:
The Physical Design team within Silicon One owns backend methodology and flow development from RTL to GDS. The team plays a critical role in developing high-quality VLSI designs for some of our most advanced silicon products.
We work with the latest silicon technologies and processes to build large-scale, complex devices that push the boundaries of feasibility. You will collaborate with experienced engineers across architecture, design, verification, and implementation to deliver high-performance silicon.
Your Impact:
You will be part of the Silicon One team, which is at the heart of our software and ASIC design efforts. As a Physical Design Engineer, you will contribute to backend implementation work across key stages of chip design, helping move complex designs from RTL toward GDS.
You will work on physical synthesis, place and route, optimization, timing closure, and floor planning activities. Success in this role means delivering high-quality implementation results, learning quickly from senior engineers, and helping improve the flow and methodology used by the team.
Contribute to physical synthesis, place and route, optimization, and timing closure for complex VLSI designs.
Support design floor planning and implementation planning in collaboration with senior physical design engineers.
Analyze timing, congestion, power, area, and design-rule issues and help drive them toward closure.
Work with physical design verification flows, including LVS and DRC, to support clean implementation handoff.
Partner with cross-functional teams to debug implementation issues and improve backend flow quality.
Requirements:
Minimum Qualifications:
B.Sc. or M.Sc. in Electrical Engineering or a related field.
2+ years of hands-on experience in VLSI backend design or a relevant physical design domain.
Strong understanding of the Place & Route flow.
Hands-on experience with physical synthesis, place and route, optimization, timing closure, or design floor planning.
Preferred Qualifications:
Understanding of physical construction and integration concepts across backend implementation.
Knowledge of physical design verification methodology, including LVS and DRC.
Familiarity with physical design EDA tools such as Synopsys, Cadence, or similar platforms.
Ability to learn independently, take ownership of assigned tasks, and work effectively with teammates.
Strong problem-solving skills and attention to detail in complex technical environments.
This position is open to all candidates.
 
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לפני 2 שעות
חברה חסויה
Location: Caesarea
Job Type: Full Time
We are looking for an experienced Lab Support Technical Leader to lead our R&D lab operations.
This role combines technical leadership, operational management, hands-on work and strategic planning across worldwide labs. You will report to the Lab Manager.
Location

On-site - working 5 days a week from our office in Caesarea.

What you will be doing:

Lead R&D lab operations supporting large-scale broadband and networking environments.

Lead and mentor the Lab Support team, including goal setting, KPIs, SLA management, prioritization, and professional development.

Providing hands-on support for lab infrastructure installations and deployments when required.

Architect, design, and maintain advanced networking infrastructures, including switches, routers, servers, and virtualization platforms.

Lead deployment and support of new lab installations.

Establish and maintain documentation standards across Confluence, Jira, Visio, and related systems.

Lead automation and operational efficiency initiatives to improve scalability,

Provide regular executive-level reporting on lab operations, project status, risks, and roadmap progress.

Manage timelines, ETAs, and stakeholder expectations across multiple concurrent activities.
Requirements:
What you should have:

5+ years of experience working in lab environment including strong hands-on expertise with networking technologies, including routers, switches, VLANs, routing protocols.

3+ years of experience managing technical labs, data centers, or large-scale infrastructure environments.

Proven experience leading technical teams in complex networking and infrastructure environments.

Strong understanding of networking concepts at CCNA/CCNP level or equivalent.

B.Sc. / M.Sc. degree in Computer Science, Electrical Engineering, Networking, or a related technical field - Advantage.

High experience on RF Systems such as CMTS/vCMTS on Docsis protocols - Advantage.

High experience on PON infrastructure, XGS, GPON, EPON technologies - Advantage.

Experience with Linux systems, VMware virtualization platforms, and monitoring tools such as Zabbix - Advantage.

Ability to operate effectively in fast-paced R&D and production support environments.

Self-driven, highly organized, and capable of learning new technologies independently.
This position is open to all candidates.
 
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16/06/2026
חברה חסויה
Location: Caesarea
Job Type: Full Time
our company, a Sisram Medical company, is a global leader in medical-aesthetic technologies, with over 25 years of experience in energy-based devices (EBD). Over the years, our company has evolved into an integrated aesthetic and wellness ecosystem that combines medical devices, injectables, diagnostics, and personalized skincare. The company operates in a dynamic, innovation-driven environment, merging advanced technology with deep clinical understanding to create holistic solutions for aesthetic clinics. our companys headquarters are in Caesarea, Israel, with business operations in more than 100 countries worldwide.
* Establish, build, and lead the V&V team from the ground up, including defining methodologies, processes, and best practices
* Manage and mentor a small and growing team of V&V engineers
* Lead end to end, comprehensive verification and validation activities for multidisciplinary medical devices, combining technologies such as laser, RF, ultrasound, and physics-based systems
*  Define, author, and execute rigorous TEST strategies, validation plans, and protocols for complex systems
* Ensure full compliance with medical device regulatory standards, including documentation, traceability, and validation processes
* Partner closely with matrixed cross-functional teams including Mechanics, Hardware, Software, system Engineering, Regulatory, Clinical and Quality
* Drive continuous improvement of TEST methodologies, modern tools, and automation capabilities
* Support end-to-end product lifecycle activities including design verification, system validation, and post-market activities.
* Partner with Operations and NPI (New Product Introduction) groups to ensure seamless transfer from design verification to manufacturing line validation
* Manage relationships and scheduling with External Certified TEST Houses for safety, EMC, and environmental compliance testing
Requirements:
* B.Sc. in Biomedical Engineering, Electrical Engineering, Mechanical Engineering, Physics, or a related exact science discipline - Mandatory
* At least 5 years of hands-on experience leading V&V / QA, testing complex multidisciplinary systems - mandatory
* Proven experience working in medical device companies - mandatory
* Direct experience with systems integrating multiple technologies (e.g., laser, RF, ultrasound, or similar physical technologies)
* Previous experience as a lead / senior role or strong potential for leadership - must
* Prior experience in building or scaling testing activities / teams - strong advantage
* Strong understanding of V&V processes within regulated environments (FDA, CE, ISO13485, etc.) - mandatory
* Deep familiarity with medical device safety and software standards, specifically IEC 60601 (Medical electrical equipment safety) and IEC 62304 (Medical device software lifecycle) - Highly Preferred
*  Hands-on experience implementing or working with Application Lifecycle Management (ALM) platforms, defect tracking tools (e.g., Jira), and TEST automation frameworks or data analysis tools (e.g., MATLAB, PythongreenTxtBg!) - Strong Advantag
*  Strong leadership capabilities with the ability to build a team and drive it forward
* Deep, fundamental understanding of system -level methodologies for complex, multi-tiered / multidisciplinary products
* Hands-on, proactive, agile approach with the ability to operate in a rapidly growing, evolving development environment
* Strong cross-functional communication and stakeholder management skills to bridge design, quality and regulatory groups
* High level of personal ownership, structure organizational skills, and uncompromising attention to detail
* Ability to balance strategic thinking with hands-on execution
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8696209
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Location: Caesarea
Job Type: Full Time
We are seeking a HW Board Design Engineer.
Meet the Team:
Youll collaborate with top industry engineers within the fast-growing Silicon One group worldwide.
You will be part of a team driving our groundbreaking next-generation network devices. Our team operates in a startup-like atmosphere within a global, leading corporation.
Our design center is unique, hosting all silicon hardware and software development fields under one roof. Our Networking Chips deliver high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility. They are strategically placed in critical AI infrastructure, powering next-generation network devices and supporting advanced AI workloads. They deliver high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility.
Your Impact:
Spearhead innovative silicon architecture for AI infrastructure, guiding board design from concept through to mass production.
Act as the technical decision-maker for the project and collaborate with cross-functional teams in mechanics, thermal, PCB layout, and software/RTL.
Define product specifications, develop electrical schematics, and guide component selection.
Conduct hands-on testing in a lab environment and drive the PCB bring-up, characterization, and debugging stages.
Requirements:
Minimum Qualifications:
B.Sc. in Electrical Engineering or equivalent practical experience.
3+ years of experience as a hardware/board design engineer, with a strong background in executing complex hardware projects.
Experience in high-speed and multi-layer PCB design.
Hardware-oriented, with experience in measurements, characterization, and using lab equipment and hands-on experience in PCB bring-up and systematic debugging.
Preferred Qualifications:
Demonstrated success in leading multi-disciplinary projects.
Strong project management abilities, self-driven, with excellent interpersonal skills.
System orientation with a multi-disciplinary approach and multitasking capabilities.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8717122
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