דרושים » הנדסה » CAD & Infrastructure Team Leader

We are looking for a DevOps IT Engineer to join our dynamic IT team. This role blends hands-on system administration with modern DevOps practices, focusing on building, automating, and operating scalable hybrid environments across on-prem and cloud platforms.
If you are passionate about automation, cloud infrastructure, and improving developer productivity while maintaining robust and secure enterprise systems - we want to hear from you!
Responsibilities:
Design, build, and operate scalable infrastructure across on-prem environments and cloud platforms (AWS & Azure).
Manage and evolve virtualization platforms such as VMware and KVM (Proxmox).
Implement and maintain cloud infrastructure using Infrastructure as Code (IaC) and DevOps best practices.
Own identity and access management solutions including Azure Entra ID (Azure AD), SSO, MFA, Conditional Access, and directory synchronization.
Manage enterprise endpoint solutions such as Microsoft Intune and MobileIron/IVANTI.
Automate infrastructure provisioning, configuration, monitoring, and operational workflows.
Build and maintain internal tools to improve developer experience and engineering productivity.
Ensure system reliability, performance, and cost optimization across cloud and on-prem environments.
Maintain high security standards, compliance, and operational best practices.
Collaborate closely with DevOps, R&D, Security, and IT teams to support development and production environments.
Develop and maintain clear technical documentation.

We are seeking a highly skilled and motivated Electrical Validation (EV) Team and System Testing / ATE Team Leader to join our team. This position is crucial in supporting the design, development, and implementation of Automated Test Equipment (ATE) and production test systems.
The Electrical Validation team Lead manages the electrical validation function across our company hardware platforms. This role owns the validation strategy, methodology, lab infrastructure, and execution across all high-speed and control interfaces. The manager ensures robust electrical performance from early prototypes through production release and drives cross-functional alignment between design, SI, firmware, and manufacturing.
The role involves close collaboration with the HW R&D team, Quality, DevOps, and Contract Manufacturing (CM) teams to ensure the delivery of high-quality, reliable products.
This group is part of the HW R&D group.
Key Responsibilities
Define the electrical validation strategy for our company hardware platforms.
Own validation methodology for: High-speed Ethernet (100M-1600G), PCIe Gen1 to Gen5+, SerDes architectures (NRZ/PAM4), Control and management buses (I2C, SPI, RS-232, MDIO, etc.)
Establish structured validation plans aligned with hardware release milestones.
Build and manage a high-performance validation team.
Define lab architecture, including: Equipment selection (oscilloscopes, BERTs, analyzers), Compliance platforms, Automation frameworks, Signal integrity validation environments
Drive early engagement with board design and SI teams to ensure design-for-validation.
Oversee: Compliance (IEEE, PCI-SIG, OIF), Interoperability testing, Stress and margin testing
Lead root cause analysis of electrical failures and systemic issues.
Support NPI, manufacturing bring-up, and yield improvement.
Develop automation and scalable validation methodologies.
Define validation documentation standards and sign-off criteria.
Collaborate with system architecture and software teams to ensure HW-SW integration robustness.
Manage external labs and certification processes where required.
Drive continuous improvement of validation coverage and efficiency.
Lead the full ATE development lifecycle from requirements definition to execution in production, including GUI design and Python scripting.
Develop and maintain boundary scan applications using JTAG Technologies.
Define and maintain test fixtures, including JIGs/Bed-of-Nails, etc., in collaboration with mechanical vendors.
Implement full test traceability systems for production yield and stability monitoring.
Collaborate with R&D and Quality teams to drive product quality and reliability improvements.
Provide onsite support at CM sites, including station setup, installation, training, maintenance, and debugging.
Perform in-depth failure analysis and troubleshooting at the system and component level.
Utilize and maintain a range of test equipment, including:
Work with various communication protocols: TCP/IP, Telnet, SSH, HTTP, SNMP, SFTP, SCP, FTP, RS232, GPIB, I2C, and NI-VISA.
Support testing of embedded systems running on Linux platforms.

We are looking for an excellent DevOps engineer to join the Switch and Firmware DevOps team and make a wide impact on the company products and teams worldwide. The role includes the development of cutting-edge design automation tools, build systems, and continuous integration systems. With your help, our supportive and friendly team will be able to focus on more exciting programming tasks, better serving the needs of our customers through new and improved CI processes. We work in a dynamic environment where multiple projects will be active at once and priorities may shift frequently.
We are looking for hardworking engineers who arent afraid of taking up new technologies, processes, and tools to make constant improvement in the automation infrastructure. The engineer will collaborate closely with our software developers as well as performance analysts to build and improve the world-class automation infrastructure.
What youll be doing:
Develop and support CI processes of various products.
Coordinate with various teams across the globe to promote and improve CI practices.
Build infrastructure for effective, high-quality development and release efforts.
Be a part of an experienced team with a great atmosphere.

We are looking for a DevTest Group Manager with strong expertise in AI-driven testing and a proven ability to lead teams through the adoption of AI tools and methodologies. This role combines leadership, quality engineering, and innovation, with a focus on transforming traditional testing into a scalable, AI-enabled practice. You will lead multiple DevTest teams, drive strategy, and implement AI-based solutions to significantly improve efficiency, productivity, and quality across the organization.
Key Responsibilities
Lead and manage multiple DevTest teams, including team leads and engineers
Define and execute the AI adoption strategy within DevTest
Drive the transition from manual/automation testing to AI-assisted and AI-driven testing
Identify and implement AI-based testing solutions (e.g., test generation, self-healing tests, intelligent execution)
Build and scale AI-enabled frameworks and tools for E2E testing
Collaborate with R&D and Product managers to integrate AI into the development lifecycle
Ensure high standards of quality, coverage, and reliability across all testing activities
Analyze metrics and KPIs to continuously improve DevTest efficiency and effectiveness
Mentor and develop team members in both technical (with extra attention to AI capabilities) and managerial path
Promote a culture of innovation, learning, and continuous improvement
What Success Looks Like
DevTest teams effectively using AI in daily workflows
Significant improvement in testing efficiency/quality and productivity
Increased test coverage and faster feedback cycles
Successful rollout of AI tools and frameworks across teams
Teams upskilled and confident in working with AI.

We are seeking a highly skilled and motivated Electrical Validation (EV) and System Testing Engineer to join our team. This position is crucial in supporting the design, development and full testing.
The Electrical Validation team Lead manages the electrical validation function across our company hardware platforms. This role owns the validation strategy, methodology, lab infrastructure, and execution across all high-speed and control interfaces. The manager ensures robust electrical performance from early prototypes through production release and drives cross-functional alignment between design, SI, firmware, and manufacturing.
The role involves close collaboration with the HW R&D team, Quality, DevOps, and Contract Manufacturing (CM) teams to ensure the delivery of high-quality, reliable products.
This group is part of the HW R&D group.
Key Responsibilities
Define the electrical validation strategy for our company hardware platforms.
Own validation methodology for: High-speed Ethernet (100M-1600G), PCIe Gen1 to Gen5+, SerDes architectures (NRZ/PAM4), Control and management buses (I2C, SPI, RS-232, MDIO, etc.)
Build and manage a high-performance validation team.
Define lab architecture, including: Equipment selection (oscilloscopes, BERTs, analyzers), Compliance platforms, Automation frameworks, Signal integrity validation environments
Drive early engagement with board design and SI teams to ensure design-for-validation.
Oversee: Compliance (IEEE, PCI-SIG, OIF), Interoperability testing, Stress and margin testing
Lead root cause analysis of electrical failures and systemic issues.
Define validation documentation standards and sign-off criteria.
Implement full test traceability systems for production yield and stability monitoring.
Collaborate with R&D and Quality teams to drive product quality and reliability improvements.
Utilize and maintain a range of test equipment, including:
Work with various communication protocols: TCP/IP, Telnet, SSH, HTTP, SNMP, SFTP, SCP, FTP, RS232, GPIB, I2C, and NI-VISA.
Support testing of embedded systems running on Linux platforms.

This is a high-impact technical leadership role designed for a "star" engineer who can own the entire hardware lifecycle. You will be responsible for stabilizing products from the first prototype through mass production, defining validation strategies, and managing the technical deployment of test stations at global Contract Manufacturers (CMs). You will bridge the gap between R&D, manufacturing, and field reliability to ensure world-class product quality.
Core Responsibilities
Outsourced Station & Vendor Management: Lead the design, setup, and qualification and scale-up of test stations (ICT/JTAG/FT) and debug infrastructure at CM/Outsource partners.
End-to-End Product Stabilization: Own the hardware stabilization process from the first build unit through ramp-up and transition to high-volume production.
Validation & Automation Strategy: Build comprehensive validation plans, review hardware designs for testability (DFT), and integrate automated software tests into production lines.
Advanced System Debugging: Develop hardware debug tools and methodologies to perform deep-dive failure analysis and root cause investigations on systemic issues.
Yield & Data Intelligence: Monitor and optimize yield performance using data analysis techniques to identify trends and failure modes during the NPI lifecycle.
Field & RMA Ownership: Lead technical investigations into field-deployed systems, analyzing diagnostics and telemetry to evaluate RMA claims and provide actionable engineering recommendations.
Cross-Functional Leadership: Collaborate with Mechanical NPI, Test Development, R&D, and manufacturing partners to align test requirements with business needs.
Statistical Process Control (SPC) Implementation: Establish and monitor SPC for critical manufacturing parameters to identify process "drifts" before they result in actual product failures.
Root Cause Corrective Action (RCCA): Lead the formal RCCA process for any manufacturing escapes, ensuring that the "fix" is implemented both in the hardware design and the test software.
Vendor Quality Engineering (VQE): Act as the technical quality lead for CMs and outsourced station builders, defining the "Golden Unit" standards and qualification protocols for all production lines.

We are looking for a dedicated SoC Clocks Design Automation Engineer to join our Networking Silicon team. In this role, youll focus on developing and supporting clock-related design flows and methodologies for SoC and networking chips, ensuring efficient and high-quality design implementation. Youll also chip in to SoC top-level automation and integration activities, building on existing flow infrastructure to improve efficiency and consistency across projects. Introduction
What you'll be doing:
Develop and maintain design automation and methodologies for SoC and networking clock flows.
Collaborate with design, STA, and project teams to ensure timely and high-quality design closure.
Develop and improve SoC top-level automation scripts and flows built upon existing infrastructure and tools.
Support SoC integration and construction flow activities across multiple projects.
Assist in timing, power, and noise analysis to ensure efficient performance.

We are looking for an excellent SW Engineer to join the InfiniBand Switch and NVLink Core FW group in Tel-Aviv / Raanana. As the team member, you will be part of a major development effort for the next-generation networking products. The verification team develops cutting-edge networking features for cloud, HPC and storage. We drive the data growth of the worlds biggest companies. With talented engineers around the globe, the work environment is dynamic, meaningful, and fast-paced. Are you ready for the challenge?
What you will be doing:
As a SW Engineer, you will part of a group of firmware verification engineers, using your expertise in C++ and Python in an Agile methodology.
Develop the verification process, aligning with quality standards and project timelines.
Design and implement new features in the core of Switch and GPUs
Drive and facilitate the planning, scheduling, and execution of the project and activities of the team
Collaborate with architecture and different software design teams as part of the software development lifecycle.
Work in pre and post-silicon development environments of next-generation networking products.
Gain a deep understanding of networking technology, system debugging and stacks, as well as the HW/FW/SW relationship.
Innovate! Bring our FW switching products to shine in customers view.

Lead a team of compiler engineers responsible for our company's open source based toolchain and graph compiler. You will be a hands-on team leader - driving architecture decisions, guiding engineers, and delivering compiler capabilities across all our company hardware targets. Our team embraces an AI-agentic development flow, leveraging AI coding agents to accelerate engineering productivity, and we are looking for a leader who champions this approach.
Responsibilities
Lead development of our company's open source based toolchain targeting custom DSP and NPU architectures. Drive design and delivery of graph compilation flows: transformations, operator mapping, and code generation. Champion AI-agentic development practices within the team - integrating AI coding agents into day-to-day engineering workflows. Mentor engineers and conduct code reviews; build a high-quality engineering culture. Collaborate with hardware architecture, algorithms, and software teams globally. Own team planning, prioritization, and on-time delivery of toolchain features. Contribute hands-on to design, implementation, and performance tuning in C++ and Python.

We are looking for a motivated Principal FPGA Engineer to join our team in Raanana.
You will have the chance to develop your own skills in a flexible and energetic work atmosphere with friendly and experienced colleagues. You will have helpful supervision, opportunity to learn, modern tools and flexible work culture.
If you want to be a part of our growing company that is driven by innovation and is focused on building a future together with our employees, consider applying.
Principle duties and responsibilities :
Design and develop FPGA/ASIC solutions across the full product lifecycle, including feasibility studies, architecture definition, implementation, verification, and production support
Work independently to deliver high-quality engineering solutions with minimal supervision.
Operate at the system architecture level across multiple design domains.
Serve as a Subject Matter Expert (SME) in one or more technical areas and provide consulting to other teams.
Lead and contribute to complex, high-impact projects critical to the business.
Integrate AI tools in FPGA/ASIC development process.
Mentor and provide technical guidance to junior and senior engineers.