דרושים » מדעים מדוייקים » Verification Engineer

We are looking for highly motivated engineers who love the challenges and the opportunity of a small company.
Join us and be a part of a small and dynamic team, which revolutionizes the parallel processor architecture.

We are looking for a Senior VLSI Verification Engineer to join the ride as we spearhead the next revolution in electronics!
Position location: in our Haifa or TLV offices, at least 2 working days at Haifa site (Hybrid model)
Responsibilities:
Develop and maintain advanced verification environments using SystemVerilog and UVM, ensuring scalability, configurability, and reusability across multiple IPs.
Design, implement, and execute comprehensive testbenches and random test suites to validate functional correctness, robustness, and corner-case behavior of complex IP within various SoC integration environments.
Drive coverage closure by defining, collecting, and analyzing code and functional coverage metrics; identify verification gaps and ensure complete validation of feature sets prior to sign-off.
Lead debug and root-cause analysis efforts in collaboration with senior verification and design engineers, leveraging carefully crafted logs, waveform analysis and assertions to isolate and resolve design or environment issues.
Collaborate closely with architecture, design, and firmware teams to ensure verification completeness, alignment with design intent, and seamless integration at the system level.
Contribute to methodology and infrastructure improvements, including reusable UVM components, automation scripts, and best practices that enhance team efficiency and verification quality.

we are looking to hire a talented Verification Engineer to join our VLSI group in Tel Aviv.
You will work alongside other talented engineers to develop our cutting-edge AI chips. If you are motivated and skilled in VLSI and excited about AI, we want to meet you!
Responsibilities:
Collaborate with architecture and design teams to define and implement comprehensive testcases for NN processor and SoC blocks and flows.
Maintain, enhance, and scale the UVM‑based verification environment to support efficient and robust verification.
Own end‑to‑end verification of system flows to ensure the design is fully functional, correct, and meets performance expectations.
Drive root‑cause analysis and debug across RTL, testbench, and system layers to ensure high‑quality design closure.
Define, track, and close functional and performance coverage to guarantee verification completeness.
Continuously improve verification methodologies, automation, and workflows to increase productivity and coverage efficiency.

Required Senior Chip Design Verification Engineer
job requisition id
We have been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. Its a unique legacy of innovation thats fueled by great technology-and amazing people. Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. As an employee, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
Join us and become a pivotal part of our Networking Silicon engineering team in Tel Aviv, Israel. We are renowned for developing the industry's top high-speed communication devices, known for their outstanding efficiency and minimal latency. This role offers an outstanding opportunity to be involved in groundbreaking projects, collaborating with versatile experts to foster innovation and excellence. As a Senior Chip Design Verification Engineer, you will be immersed in a dynamic and encouraging environment where your efforts will have a meaningful impact.
What you'll be doing:
Play a crucial role in developing our next-generation chip controller.
Engage in building and verification tasks within a challenging, multi-disciplinary context.
Collaborate closely with cross-functional teams to advance our networking and GPU networking chips and systems.
Drive the implementation of sophisticated verification environments to ensure flawless functionality.
Mentor and guide junior engineers, encouraging a collaborative and inclusive team atmosphere.

We are looking for a talented and experienced engineer to take part in the verification efforts for the companys core product. This position involves building a complex verification environment from scratch, and defining and executing a test plan. In this role, you will be leading verification from A to Z and will have a critical impact on the company.

Responsibilities
Review specifications and develop attributes, tests, and coverage plans
Define methodology and test benches.
Work closely with the verification team to ensure the quality of the product.
Build and maintain a smart and scalable verification environment that ties into various systems.
Work with the software, design, and micro-architecture teams to understand the functional and performance goals of the products design.

We are looking for a Software Engineer or Computer Scientist for our Software Formal Verification team! This is an exciting opportunity to join a unique team dealing with cutting-edge Formal Verification technology for both software and hardware. Supporting our Switch, NIC, and GPU technologies, we research and use state-of-the-art formal verification tools and methodologies to mathematically prove the correctness of both software and hardware. You will be joining a growing team, using both in-house and third-party technologies that keep developing, and assist in defining new methodologies. As part of this team, you'll enjoy a versatile work environment that is educational, dynamic, and ambitious.
What you'll be doing:
In this position, you will use formal verification tools and methods to mathematically prove the correctness of complicated logic problems
Help develop our Software Formal Verification methodologies and tools
You will work on ambitious designs along with our Firmware and Software teams and take part in developing the next generation of our core technology.

Required ASIC Design & Verification Engineer
Job Description
Meet the Team
Join the Silicon One Front-End Design team, at the core of our silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation.
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
Silicon One is transforming the industry with a unified, programmable architecture powering our future routing portfolio and shaping the Internet for decades to come.
Your Impact:
Review micro-architecture specifications
Implement Verification environment UVM based
Collaborate with Design engineers to resolve bugs and achieve coverage closure
Work with the firmware/Lab teams to verify chip flows
Perform debug, root-cause analysis, and post-silicon validation in the lab.

our company's EyeQ Platform Group (EPG) is seeking a motivated Formal Verification Engineer to join our team and contribute to development of hardware verification environments.
This position offers an opportunity to apply formal methods to verify the correctness of various complex digital systems.
This is an exciting opportunity to join a team of talented engineers, working cutting edge technologies in the field of autonomous vehicle.
What will your job look like:
Be the owner of formal verification environment from first draft to sign-off stage
Apply formal methods to verify the correctness of various complex digital systems
Work with HW architects\designers to define assumptions, rules and cover properties
Help define the formal verification methodology and environment to be applied by the team
Explore new Formal methods and Tools
Work with tools like Cadence JasperGold, Verisium manager, Xcelium, Indago
Analyze verification results, identify bugs, and collaborate with engineers to resolve design issues
Develop generic formal blocks\functions of commonly used logic, to be later used off the shelf.

Our Chip Design group is looking for best-in-class Verification Engineers to join our outstanding Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovative chips, and enjoy working in a meaningful, growing, and highly professional environment where you make a huge impact in a technology-focused company.
What youll be doing:
Verification for chip blocks/entities according to specifications under challenging constraints and with high orientation to performance.
Daily work involves acquaintance with all aspects of chip development: Design, Micro- Architecture, Firmware, Production, and Verification.
Engage in cutting-edge PCIe generation working on latest PCIe gen7.

We are looking for best-in-class Chip Design Verification Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.
What youll be doing:
Work as a Chip Design Verification Engineer as part of a combined design and verification team that develops front-end design for the Switch silicon, GPU and HCA.
Plan and Design Verification units/blocks according to Arch & Micro arch specifications under challenging constraints with high orientation to power, area, and performance.
Work closely with multiple teams within organizations such as Architecture, Micro-Architecture, and FW-interaction with organization-wide groups.