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5 ימים
חברה חסויה
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
We are looking for a junior Embedded Software Engineer, to join us in building the next generation of networking products. Youll have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, fast-paced environment. Working for Annapurna Labs is thrilling and a constant learning experience. As an embedded SW development engineer, you will be responsible for developing features for Annapurna Labs next-generation hardware, to enable high network bandwidth and packets-per-seconds (PPS) performance, with consistently low latency. You will work to bring up a broad selection of instance types, optimized for various use cases, to suit each of our customers needs, such as varying combinations of CPU, memory, storage, and networking capabilities. As a SW development engineer, you will play a key role in shaping architecture definitions and SW system designs, and help to resolve complex customer issues. You will continuously evolve technically, while working to monitor our cloud health, maintain high quality standards, develop highly-optimized code, and provide exceptional customer satisfaction.

Key job responsibilities
We will be conducting a unique onboarding training program, where you will be studying the following with our technical experts and team leaders:
* Embedded systems basics.
* Annapurna technologies in EC2.
* Cloud compute development.
* Networking 101.
Requirements:
Basic Qualifications
- B.Sc. in Computer Science/Computer Engineering/Electrical Engineering or related field. Make sure to include a grade sheet with your CV in a single PDF.
- Knowledge of C programming language.

Preferred Qualifications
- Experience in embedded SW Development.
- Hands-on experience developing in a Linux environment.
- Experience with HW/SW interfaces at both the board and chip level.
- Understanding of computer architecture.
- Personal characteristics: team player, highly motivated, willing to work in a dynamic and demanding environment, creative, and a fast learner.
This position is open to all candidates.
 
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5 ימים
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
As a member of the UC organization, youll support the development and management of Compute, Database, Storage, Internet of Things (IoT), Platform, and Productivity Apps services in our company, including support for customers who require specialized security solutions for their cloud services.

Take part in the development of cutting-edge products within a disruptive system architecture. You will have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, and fast-paced environment. We provide a highly reliable, scalable, low-cost infrastructure platform in the cloud, which powers hundreds of thousands of businesses in 190 countries around the world. Annapurna Labs, as part of us, is looking for talented engineers to help us develop a semiconductor platform based on a revolutionary architecture.

Looking for exceptional senior engineers to join the top-tier team that is developing the next generation semiconductor platform, based on a revolutionary architecture. Engineers will participate in design activities, working on the next generation of our products.

You are invited to take part in developing, integrating and deploying cutting-edge technologies, starting with identification and definition of project requirements, architecture, feature development, and collaboration with the different groups.
Your design will be integrated into the nitro SoC, on millions of servers worldwide. This is an opportunity to have a large-scale impact.
As a VLSI engineer and a member of the Nitro project, you will have an impact over the device through its entire lifecycle, from the product definition stage to mass production. You will work in close collaboration with multiple groups, including Architecture, Software, Verification, Backend, and DFT.

Key job responsibilities
*Full ownership of one or more IPs within the product:
-Micro-architecture.
-RTL coding and debug.
-Synthesis and timing closure.
-Sign-off.
* Supporting the Verification and Emulation teams: Test plan, Coverage review.
* Ensuring that the chip meets quality and reliability standards.
* Collaborating with cross-functional teams, including Product Definition, Verification, Software, and Physical design.
Requirements:
Basic Qualifications
- 6+ years of experience in chip design.
- Hands-on experience in micro-architecture and RTL design (Verilog / System Verilog).
- Scripting expertise in C*, Perl, Python, or TCL.
- BSc in Computer/Electrical Engineering.
- Strong communication and collaboration skills.
- Strong leadership skills and ability to own complex units.

Preferred Qualifications
- Strong knowledge of protocols (AXI, CHI, DDR, Networking, PCIe).
- Experience with Network-on-Chip (NOC) architecture.
- knowledge with coherent and non-coherent fabric design.
- Comprehensive SoC development cycle expertise (Synthesis, STA, CDC, Lint).
- Knowledge of Design Automation tools and techniques.
- Advanced degree in related technical field.
This position is open to all candidates.
 
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13/04/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
Required Embedded User Space Engineer
Description
We are a leading high-tech company, developing top-performing AI processors for edge devices in various industries. We combine an extensive understanding of the way neural networks operate, with our teams expertise in SW and HW architecture, to develop products that transform the way we use machines to perceive and analyze the world around us.
Our company is led by a group of experts from a wide range of disciplines, combining experience from elite intelligence units as well as leading tech companies in Israel and abroad, with a track record of executing complex projects from the ground up. As an AI chip company, we believe that AI can help us create a better, safer, more productive, and more convenient world. For this to happen, AI needs to be available at scale and on the edge.
To this end, our team of hardware and software leaders is developing top-performing AI processors, dedicated to AI tasks on edge devices in a wide variety of applications and industries including smart cities, automotive, manufacturing, agriculture, retail, and many more. With hundreds of customer programs around the world, and a wide ecosystem of software and hardware partners, we are leading the edge AI revolution.
In this position:
As a team member in our Media Pipeline team, you will be responsible for developing a C++ open-source framework and applications for our top-of-the-line AI-Vision processor. You will be working on a production-grade framework that enables Vision pipelines for our customers in multiple industries, such as security, automotive, retail and more.
If you are passionate about working with a large-scale SW and youre excited about AI, we want to meet you!
In this role, you will have a direct impact on our products.
Responsibilities
Help build and develop our best-in-class Edge AI SoC, developing an open-source, production-grade framework for the media pipeline
Work in different SW environments: C++, Python, C
Work closely with Software architects and the Machine Learning group, integrating and debugging complex software systems while taking into account challenging requirements as part of managing a large-scale embedded system.
Requirements:
B.Sc in Computer Science from top Universities. (GPA above 85)
3+ years experience in C/ C ++ development
Experience in user space applications.
Hands-on experience with some of the following build systems: Yocto, Meson, CMake, Make, Builldroot
Hard-working, committed, and self-reliant
Great interpersonal skills and a team-player
Fluent English
Advantages:
Python programming, scripting on Linux
Knowledge with GStreamer
Knowledge in Open-source software
Familiarity with Docker.
This position is open to all candidates.
 
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5 ימים
Location: Haifa
Job Type: Full Time
We are looking for System Software Development Engineers to help define, shape, and integrate cutting-edge solutions for the next generation of our cloud platforms. As part of our innovative team, you'll be working at the forefront of semiconductor technology development using leading-edge manufacturing processes. We offer a dynamic, open environment where teamwork thrives and rapid innovation is the norm. This is a unique opportunity to join our elite early-stage team, where you'll help develop disruptive system architectures that will shape the future of cloud computing. As a key member of Annapurna Labs, you'll be part of Amazon's semiconductor division, working alongside industry veterans to create groundbreaking solutions that power tomorrow's cloud infrastructure.

Key job responsibilities
- Work in a Linux-based environment.
- Build and maintain Linux images integrated with testing software solutions.
- Design and develop automation infrastructure for executing hardware tests.
- Develop and maintain AWS self-service applications.
- Leverage Amazon Web Services (AWS) as part of software solutions.
- Collaborate closely with internal and external customers to gather requirements and deliver solutions.
- Participate in the full software development life cycle, from design to deployment and maintenance.
Requirements:
Basic Qualifications
- Bachelor's degree in Computer Science or related technical field.
- 1+ years of contributing to new and current systems architecture and design (architecture, design patterns, reliability and scaling) experience.
- 5+ years of professional software development experience with strong programming skills.
- Hands-on experience working and scripting in Linux environments (shell).
- Knowledge of professional software engineering practices across the full software development life cycle.

Preferred Qualifications
- Experience building test automation frameworks and tools.
- 2+ years of hands-on experience in Python.
- Strong Bash scripting skills.
- Proficiency in object-oriented programming (OOP).
- Solid understanding of Linux architecture and system structure.
- Hands-on experience in web development.
This position is open to all candidates.
 
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26/03/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
we are looking for a versatile senior software engineer to join our dpu platform team. this is an opportunity to make a significant impact in a technology-driven company that powers the worlds most advanced data centers. you will use your expertise in low-level Embedded Linux software and boot flows to work with global development teams, solving the complex challenges involved in delivering high-power computing platforms.
what you'll be doing:
designing and developing low-level system software with a primary focus on bootloaders (atf, uefi), firmware, and hardware initialization
working together with hardware and design teams to drive SOC bring-up and platform enablement
solving complex challenges related to boot sequences, system optimization, and hardware resource management
supporting various internal and customer dpu projects alongside our global teams
taking part in all stages of the product lifecycle, with a focus on high software quality and stability
collaborating within a global software environment to have a broad impact across the company
Requirements:
what we need to see:
bachelors degree in Computer Science /engineering or equivalent practical experience
5+ years of experience in Embedded Linux software development ( C is a must, C ++ advantage)
deep experience with bootloader development and board support packages (bsp)
strong understanding of the low-level software stack and hardware-software interaction, specifically regarding pre-os environments
deep knowledge of processor architecture, including cpu, cache coherency, and hardware accelerators
solid engineering skills in design, technical investigation, and agile processes
great communication skills, both written and oral
experience with development tools like git, gcc, make, bitbake, jenkins, etc.
ways to stand out from the crowd:
hands-on experience with armv8, atf (arm trusted firmware), and uefi standards
background in developing secure boot flows or trusted computing environments
experience with hardware debuggers (jtag) and low-level board analysis
background in developing security solutions or key management
nvidia is widely considered to be one of the technology's most desirable employers. if you strive for excellence, are self-motivated and enjoy having fun and learning, then don't wait-- apply today!
This position is open to all candidates.
 
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09/04/2026
Location: Haifa
Job Type: Full Time
we are looking for a Hardware Lead Engineer.
As HW Lead Engineer, in the Nitro team, you will be responsible for defining Annapurna Labs Smart Network Interface Card (NIC) design, leading development and validation cycles, and bringing the product to healthy mass production.
Youll provide leadership in new technologies, bringing them to large-scale deployment, in a continuous effort to deliver a world-class customer experience. We offer a fast-paced, intellectually challenging position, where youll work with technical experts, senior leaders, covering multiple technologies. We are changing the industry, and looking for individuals who are ready for this challenge and want to reach beyond what is possible today.
Key job responsibilities:
- Define the architecture and design specifications of next generation K2 Nitro Cards.
- Own full product life cycle, engage with design partners and manufacturing sites to enable high-yield mass production.
- Lead the analysis and debugging of complex design, manufacturing, and integration challenges.
- Continuously design for process optimization to improve product quality, simplify workflows, and accelerate the Nitro card development lifecycle.
Requirements:
- B.Sc. in Electrical/Computer Engineering or equivalent
- 8+ years design experience in Hardware Design
- At least 6 years of experience leading complex hardware products through the entire lifecycle, from initial concept to high-volume mass production.
- Experienced in managing hardware-software interfaces and implementing scalable production testing.
- Design and lab experience with at least one of the following interfaces: DDR4/5, PCIe Gen4/5/6, 100/25/10GbE; Practical experience with high-speed lab equipment.
Preferred Qualifications:
- HW/SW/FW Integration experience
- Computer architecture knowledge, experience with server design or architecture (x86/ARM/ and ML/GPU clusters)
- Experience with operating systems, boot flows, networking, and remote debugging
- Experience with mass production products
- Basic skills in scripting: Python/Bash etc.
This position is open to all candidates.
 
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26/03/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
we are looking for a versatile software engineer to join our dpu platform team. this is an opportunity to make a significant impact in a technology-driven company that powers the worlds most advanced data centers. you will use your expertise in low-level Embedded Linux software and boot flows to work with global development teams, solving the complex challenges involved in delivering high-power computing platforms.
what you'll be doing:
designing and developing low-level system software with a primary focus on bootloaders (atf, uefi), firmware, and hardware initialization
working together with hardware and design teams to drive SOC bring-up and platform enablement
solving complex challenges related to boot sequences, system optimization, and hardware resource management
supporting various internal and customer dpu projects alongside our global teams
taking part in all stages of the product lifecycle, with a focus on high software quality and stability
collaborating within a global software environment to have a broad impact across the company
Requirements:
what we need to see:
bachelors degree in Computer Science /engineering or equivalent practical experience
3+ years of experience in Embedded Linux software development ( C is a must, C ++ advantage
understanding of the low-level software stack and hardware-software interaction.
experience in device drivers like i2c/i3c, spi, pcie, smbus, mail-box etc. 
solid engineering skills in design, technical investigation, and agile processes
ways to stand out from the crowd:
hands-on experience with armv8, atf (arm trusted firmware), and uefi standards
experience with bootloader development and board support packages (bsp)
knowledge of processor architecture, including cpu, cache coherency, and hardware accelerators
background in developing secure boot flows or trusted computing environments
experience with hardware debuggers (jtag) and low-level board analysis
our company is widely considered to be one of the technology's most desirable employers. if you strive for excellence, are self-motivated and enjoy having fun and learning, then don't wait-- apply today!
This position is open to all candidates.
 
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חברה חסויה
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
In these roles, engineers will be responsible for the design, development, and bring-up of innovative silicon and system solutions across multiple specialized teams. Responsibilities include participating in SW design sessions, providing HLD and LLD documentation, and coding complex modules that serve as the foundation for our device ecosystem. You will lead HW-SW integrations, debug complicated system-wide bugs with limited visibility, and optimize designs for performance, power, and memory footprints while meeting hard-real-time latency requirements.
Requirements:
B.Sc / M.Sc. degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience.
3+ years of experience in low-level real-time/embedded programming and firmware architecture.
Strong hands-on software programming skills with a focus on embedded systems; proficiency in C programming is essential.
Strong embedded SW fundamentals, including knowledge of real-time constraints, concurrency, multi-processor systems, and memory management.
Excellent problem-solving and debugging skills to address technical issues during design, development, and silicon bring-up phases.
This position is open to all candidates.
 
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26/03/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
our company is looking for an excellent senior sdk engineer to join the infiniband switch and nvlink fw/sdk group in tel-aviv / raanana. as a senior engineer you will be taking part in designing, implementing and leading major development sdk features, delivering the next-generation networking products. the sdk team develops cutting-edge networking features for cloud, hpc and Storage. we drive the data growth of the worlds biggest companies. with talented engineers around the globe, the work environment is dynamic, meaningful, and fast-paced. are you ready for the challenge?
what you will be doing:
collaborate with architecture and different software/fw design teams as part of the software development lifecycle.
design and implement new features in the core of our switch sdk.
work in pre and post-silicon development environments of next-generation our networking products.
gain a deep understanding of system debugging, networking technology, and stacks, as well as the fw/sw relationship.
innovate! bring our sdk switching products to shine in customers view.
Requirements:
what we need to see:
b.sc. in Computer Science / computer engineering / electrical engineering.
5+ years of relevant professional experience..
proficient knowledge of C.
strong programming skills in Python.
excellent understanding of Embedded sw
strong analytical, creative, debugging and problem-solving skills.
detail-oriented and comfortable with multitasking in a dynamic environment with shifting priorities and changing requirements.
an excellent teammate with good social skills.
ways to stand out from the crowd:
knowledge of network protocols.
agile experience.
motivation to learn and constantly improve processes and tools.
background in Linux internals.
scripting abilities ( Python, bash) as well as strong C ++ and oop hands-on experience.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo
Job Type: Full Time
about the job
in this role, youll work to shape the future of ai/ml hardware acceleration. you will have an opportunity to drive cutting-edge tpu (tensor processing unit) technology that powers google's most demanding ai/ml applications. youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of google's tpu. you'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on tpu architecture and its integration within ai/ml-driven systems.
as a design technology co-optimization (dtco) engineer, you will bridge the gap between process technology and product architecture to define the next generation of datacenter-class silicon. you will be responsible for extracting maximum process entitlement by evaluating advanced logic nodes and emerging transistor architectures.in this role, you will conduct place and route experiments and sensitivity analyses to influence standard cell library architecture, metal stack definitions, and design rules. you will collaborate with foundry, ip, and architecture teams to identify power, performance, and area (ppa) bottlenecks and drive system technology co-optimization (stco) initiatives.your work will involve performing high-fidelity physical implementation sweeps, analyzing the impact of scaling boosters, and developing automated methodologies to quantify ppa gains. by navigating the trade-offs between process complexity and design performance, you will ensure googles hardware achieves efficiency and power density.the ai and infrastructure team is redefining whats possible. we empower google customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers include googlers, google cloud customers, and billions of google users worldwide. we're the driving force behind google's groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for google cloud, google global networking, data center operations, systems research, and much more.
responsibilities
execute high-fidelity place and route experiments to evaluate the ppa impact of advanced process features, library architectures, and design rule variations on datacenter-class ip.
drive design technology co-optimization by collaborating with foundries and internal technology teams to define optimal metal stacks, track he
דרישות:
minimum qualifications:
bachelor's degree in electrical engineering, computer engineering, Computer Science, or a related field, or equivalent practical experience.
2 years of experience in physical design (rtl-to-gds) or technology development, focusing on advanced nodes (e.g., 7nm, 5nm, or below).
experience with industry-standard place and route (p&r) tools and static timing analysis (sta) tools.
experience in cmos device physics, finfet/nanosheet architectures, and the impact of layout parasitics on ppa.
experience in scripting and automation using tcl and Python (or PERL ) to manage design sweeps and data extraction.
preferred qualifications:
master's degree or phd in electrical engineering, computer engineering or Computer Science, with an emphasis on computer architecture.
experience in design technology co-optimization (dtco), including standard cell library characterization, metal stack optimization, and evaluation of scaling boosters (e.g., backside power delivery).
experience working with major foundry technology files (pdks) and interpreting design rule manuals (drm) to guide physical im המשרה מיועדת לנשים ולגברים כאחד.
 
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Location: Haifa
Job Type: Full Time
about the job
be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
in this role, you will be part of a team developing application-specific integrated circuits (asics) used to accelerate networking in data centers. you will have multiple responsibilities in areas such as project definition, design, and implementation. you will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators.you will also be responsible for performance analysis for a networking stack using your knowledge.the ml, systems, & cloud ai (msca) organization at our company designs, implements, and manages the hardware, software, Machine Learning, and systems infrastructure for all our company services (search, youtube, etc.) and our company cloud. our end users, cloud customers and the billions of people who use our company services around the world. we prioritize security, efficiency, and reliability across everything we do - from developing our latest tpus to running a global network, while driving towards shaping the future of hyperscale computing. our global impact spans software and hardware, including our company clouds vertex ai, the leading ai platform for bringing gemini models to enterprise customers.
responsibilities
lead an asic subsystem.
understand how it interacts with software and other asic subsystems to implement data center networks.
define hardware/software interfaces. write micro architecture and design specifications.
define efficient micro-architecture and block partitioning/interfaces and flows.
collaborate closely with software, verification, and physical design stakeholders to ensure the designs are complete, correct, and performant.
Requirements:
minimum qualifications:
bachelor's degree in electrical engineering, computer engineering, Computer Science, or a related field, or equivalent practical experience.
10 years of experience architecting networking asics from specification to production.
experience developing register-transfer level (rtl) for asic subsystems.
experience with cross-functional engagement in micro-architecture, design, verification, logic synthesis, and timing closure.
preferred qualifications:
experience working with software teams optimizing the hardware/software interface.
experience working with design networking like: remote direct memory access (rdma) or packet processing and system design principles for low latency, high throughput, security, and reliability.
experience architecting networking switches, end points, and hardware offloads.
experience in transmission control protocol (tcp), ip, ethernet, peripheral component interconnect express (pcie) and dynamic random access memory (dram) including network on chip ( NOC ) principles and protocols (e.g., axi, ace, and chi).
understanding of packet classification, processing, queuing, scheduling, switching, traffic conditioning, and telemetry.
proficiency in procedural programming language (e.g., C ++, Python, go).
This position is open to all candidates.
 
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עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
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