דרושים » חשמל ואלקטרוניקה » Senior Chip Architect

As a member of the UC organization, youll support the development and management of Compute, Database, Storage, Internet of Things (IoT), Platform, and Productivity Apps services in our company, including support for customers who require specialized security solutions for their cloud services.

Take part in the development of cutting-edge products within a disruptive system architecture. You will have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, and fast-paced environment. We provide a highly reliable, scalable, low-cost infrastructure platform in the cloud, which powers hundreds of thousands of businesses in 190 countries around the world. Annapurna Labs, as part of us, is looking for talented engineers to help us develop a semiconductor platform based on a revolutionary architecture.

Looking for exceptional senior engineers to join the top-tier team that is developing the next generation semiconductor platform, based on a revolutionary architecture. Engineers will participate in design activities, working on the next generation of our products.

You are invited to take part in developing, integrating and deploying cutting-edge technologies, starting with identification and definition of project requirements, architecture, feature development, and collaboration with the different groups.
Your design will be integrated into the nitro SoC, on millions of servers worldwide. This is an opportunity to have a large-scale impact.
As a VLSI engineer and a member of the Nitro project, you will have an impact over the device through its entire lifecycle, from the product definition stage to mass production. You will work in close collaboration with multiple groups, including Architecture, Software, Verification, Backend, and DFT.

Key job responsibilities
*Full ownership of one or more IPs within the product:
-Micro-architecture.
-RTL coding and debug.
-Synthesis and timing closure.
-Sign-off.
* Supporting the Verification and Emulation teams: Test plan, Coverage review.
* Ensuring that the chip meets quality and reliability standards.
* Collaborating with cross-functional teams, including Product Definition, Verification, Software, and Physical design.

Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Architect will take charge of defining a processor on chip inter-connect and coherent fabric that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

We are looking for a junior Embedded Software Engineer, to join us in building the next generation of networking products. Youll have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, fast-paced environment. Working for Annapurna Labs is thrilling and a constant learning experience. As an embedded SW development engineer, you will be responsible for developing features for Annapurna Labs next-generation hardware, to enable high network bandwidth and packets-per-seconds (PPS) performance, with consistently low latency. You will work to bring up a broad selection of instance types, optimized for various use cases, to suit each of our customers needs, such as varying combinations of CPU, memory, storage, and networking capabilities. As a SW development engineer, you will play a key role in shaping architecture definitions and SW system designs, and help to resolve complex customer issues. You will continuously evolve technically, while working to monitor our cloud health, maintain high quality standards, develop highly-optimized code, and provide exceptional customer satisfaction.

Key job responsibilities
We will be conducting a unique onboarding training program, where you will be studying the following with our technical experts and team leaders:
* Embedded systems basics.
* Annapurna technologies in EC2.
* Cloud compute development.
* Networking 101.

As a Staff Physical STA Expert , you will hold the keys to silicon success. You will be leading the STA activities end-to-end from Chip partition, Time budgeting through signoff of all the chips we develop. You will build and lead the STA team to run several chips signoffs in parallel. In addition, You will define the sign-off methodology for chips that power the worlds most advanced AI clusters. You will act as the central nervous system of the design process, bridging the gap between Architecture, Design, DFT, and Physical Design to ensure our high-performance silicon meets the aggressive timing targets required for next-generation connectivity.

Key Responsibilities

Take full ownership of the STA flow and sign-off methodologies. You will establish the rigorous criteria that ensure our products succeed in the most demanding data center environments
Collaborate closely with Architecture, Design, DFT, and Backend teams. You will lead timing reviews and work closely with block owners to navigate the path to sign-off convergence
Develop, optimize, and manage complex SDC constraints from the ground up, ensuring they are robust across multi-scenario environments
Tackle the challenges of cross-chip clock distribution networks and sophisticated margining techniques, ensuring robust silicon across all process corners
Have a passion for better workflows? Youll participate in design methodology improvements and tool automation, utilizing both industry-standard EDA tools and in-house automation to make our sign-off process faster and smarter

we're seeking a highly skilled Chip Top Physical Design Engineer focusing on implementation to join our local engineering powerhouse from the ground up.
If you thrive on solving complex, unnamed challenges in deep-submicron processes, your place is with us.

As a Physical Design Engineer, you will be a key hands-on member of our PD Team in the Israel R&D center. You will execute the physical design of the SoC Top level for chips that drive the worlds largest AI clusters. You will be deeply involved in all PD disciplines of the chip, driving the tape-out (T.O.) GDS to meet strict signoff criteria (Timing, LVS, EMIR, DRC, PV, etc.), ensuring our silicon meets the extreme performance, power, and area (PPA) targets required for AI scale.

Key Responsibilities


Execute SoC Top-level physical design and actively drive full-chip convergence
Perform Top-Level physical implementation, including floor-planning, Place & Route (P&R), Clock Tree Synthesis (CTS), Power/Clock distribution, Power Integrity, and Timing/Physical signoff
Work closely with the Architecture, Design, DFT, and Product teams to achieve optimal Power, Performance, and Area (PPA). This involves participating in feasibility studies for new architectures and optimizing runs to ensure the best Quality of Results (QoR)
Resolve complex signal integrity, thermal, and power challenges inherent in high-speed connectivity silicon
Collaborate closely with the Package team on Bump-map-to-Ballout design, taking all signal integrity aspects into consideration

we are seeking an experienced Engineering Team Lead to head one of our three engineering teams. This team will comprise BE, FE and mobile developers, and a QA engineer. As the team lead, you will be responsible for guiding the team, ensuring successful delivery of projects, and fostering a culture of collaboration and continuous improvement.
As a Team Lead , youll tackle complex business logic, drive improvements in engineering processes, and guide your team through architectural and technical challenges. Youll build alignment, trust, and motivation across your team and R&D, shaping how we deliver software, collaborate as an organization, and provide an exceptional experience for travelers. This role is for someone seeking real impact, ownership, and the chance to lead talented engineers through meaningful technical and product challenges.
Responsibilities:
Lead, mentor, and manage a multidisciplinary team of backend, frontend, mobile developers, and QA engineers.
Oversee the design, development, testing, and deployment of high-quality software solutions that align with business goals.
Collaborate with product managers, designers, and other stakeholders to define technical requirements, set priorities, and establish project timelines.
Ensure adherence to best practices in software development, including code reviews, testing, and continuous integration and delivery (CI/CD).
Facilitate effective communication and collaboration within the team and across other departments.
Identify and address technical challenges, providing guidance and support to team members.
Monitor and improve team performance, productivity, and overall efficiency.
Stay updated with industry trends and emerging technologies, advocating for their adoption when appropriate.
Foster a positive and inclusive team culture that encourages innovation, learning, and personal growth.

We are looking for a talented Architect to join us. As a Data Architect, you will be the organizational point of contact for all things related to data persistence and architecture. You will work closely with engineering teams across the Product, Platform, and Data groups to design, govern, and evolve our data models, databases, and data-related systems. Your goal will be to ensure scalability, reliability, security, and efficiency for all data storage and retrieval across the organization.

A few of the things you will do:
Be the primary point of contact and subject matter expert for data persistence across the entire engineering organization.
Define and govern the data architecture strategy, standards, and best practices for relational, NoSQL, and data warehouse systems.
Partner with engineering teams from product, platform, and data groups to design and implement scalable and robust data models for new and existing services.
Lead the design and optimization of the organizations data flows. You will help to ensure that data moves efficiently, consistently, and with high quality across all systems and domains.
Evaluate and recommend new technologies and data solutions to meet evolving business needs.
Drive initiatives to improve data quality, consistency, and integrity across all production systems, from ideation to hands-on execution.
Establish, maintain, and communicate documentation for all data models and architectural decisions.

The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

This role has been designed as Hybrid with an expectation that you will work on average 2 days per week from an HPE office.

The Cloud Developer builds from the ground up to meet the needs of mission-critical applications, and is always looking for innovative approaches to deliver end-to-end technical solutions to solve customer problems.

Brings technical thinking to break down complex data and to engineer new ideas and methods for solving, prototyping, designing, and implementing cloud-based solutions.

Collaborates with project managers and development partners to ensure effective and efficient delivery, deployment, operation, monitoring, and support of Cloud engagements.

The Cloud Developer provides business value expertise to drive the development of innovative service offerings that enrich HPE's Cloud Services portfolio across multiple systems, platforms, and applications.

Responsibilities:

Leads the project team for design and development of complex products and platforms, including solution design, analysis, coding, testing, and integration for building efficient, scalable and robust cloud subsystems.
Reviews and evaluates designs, test plans, and develops code for compliance with cloud design and development guidelines and standards.
Provides tangible feedback to improve product quality and mitigate risks.
Represents the engineering team in various technical forums and provides guidance and mentoring to less-experienced team members.
Drives innovation and integration of new technologies into projects and activities in the software systems design organization.
Analyzes science, engineering, business, and other data processing problems to develop and implement solutions to complex application problems, system administration issues, or network concerns.

The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.