דרושים » מדעים מדוייקים » Verification Engineer

about the job
be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
in this role, you will work as part of a research and development team. you will build verification components, constrained-random testing, system testing, and drive verification closure. you will verify digital designs, collaborate closely with design and Verification engineers on projects, and perform direct verification. you will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. you will manage the full life-cycle of verification, which can range from verification planning, TEST execution, to collecting and closing coverage.the ai and infrastructure team is redefining whats possible. we empower our company customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers, our company cloud customers, and billions of our company users worldwide. we're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for our company cloud, our company global networking, data center operations, systems research, and much more.
responsibilities
plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
create and enhance constrained-random verification environments using systemverilog and uvm, or formally verify designs with sva and industry leading formal tools.
identify and write all types of coverage measures for corner-cases.
debug tests with design engineers to deliver functionally correct design blocks.
close coverage measures to identify verification holes and to show progress towards tape-out.

our company has been transforming computer graphics, pc gaming, and accelerated computing for more than 25 years. its a unique legacy of innovation thats fueled by great technology-and amazing people. today, were tapping into the unlimited potential of ai to define the next era of computing. an era in which our gpu acts as the brains of computers, robots, and self-driving cars that can understand the world. doing whats never been done before takes vision, innovation, and the worlds best talent. as a worker, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. come join the team and see how you can make a lasting impact on the world.
the complexity of the chip has greatly increased over the years. we are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. the company system -on-chip ( SOC ) group is seeking a top SOC Verification engineer to verify the design and implementation of the worlds leading networking socs. in this position, you will get the opportunity to craft complex networking chips and interact directly with architects, designers, and software engineers across sites. this is your chance to shape the future of computing with a world-class team!
what you'll be doing:
as a senior SOC Verification engineer at our company, you will technically lead a team of engineers and be responsible for verifying design, architecture, and micro-architecture using advanced verification methodologies.
define the verification scope and contribute to the development of the verification infrastructure for SOC clock networks.
verify firmware code, with a specific focus on hardware/firmware interactions.

we have been transforming computer graphics, pc gaming, and accelerated computing for more than 25 years. its a unique legacy of innovation thats fueled by great technology-and amazing people. today, were tapping into the unlimited potential of ai to define the next era of computing. an era in which our gpu acts as the brains of computers, robots, and self-driving cars that can understand the world.
the complexity of the chip has greatly increased over the years. we are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. thesystem -on-chip ( SOC ) group is seeking a top SOC Verification engineer to verify the design and implementation of the worlds leading networking socs. in this position, you will get the opportunity to craft complex networking chips and interact directly with architects, designers, and software engineers across sites. this is your chance to shape the future of computing with a world-class team! as an SOC Verification engineer, you will verify the design and implementation of our SOC technologies in various projects. this position offers the opportunity to have real impact in a dynamic, technology-focused company impacting switches and nic SOC product lines. we are working closely with a wide range of aspects - chip design, dft, backend, verification and production testing. we are working on the most advanced technologies and complex products. our SOC solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.
what you'll be doing:
in this position, you will be responsible for verification of the clock design elements, architecture and micro-architecture using sophisticated verification methodologies.
as a member of our SOC verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (testbenches, bfms, checkers, monitors), execute TEST /coverage plans, and verify the correctness of the design.
collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.

be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
in this role, you will work as part of a research and development team. you will build verification components, constrained-random testing, and system testing, and drive verification closure. you will verify digital designs, collaborate closely with design and Verification engineers on projects, and perform direct verification. you will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. you will manage the full life-cycle of verification, which can range from verification planning and TEST execution to collecting and closing coverage.the ai and infrastructure team is redefining whats possible. we empower our customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers include, cloud customers, and billions of our users worldwide. we're the driving team behind our groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for cloud, global networking, data center operations, systems research, and much more.
responsibilities
plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
create and enhance constrained-random verification environments using systemverilog and uvm, or formally verify designs with systemverilog assertions (sva) and industry leading formal tools.
identify and write all types of coverage measures for corner-cases.
debug tests with design engineers to deliver functionally correct design blocks.
close coverage measures to identify verification holes and to show progress towards tape-out.

as a cpu design Verification engineer, you will work as part of a research and development team building verification components, constrained-random testing, system testing, and verification closure.
as part of our server chip design team, you will verify complex digital designs. you will collaborate with design and Verification engineers in active projects and perform verification. you will be responsible for the full lifecycle of verification which can range from verification planning, TEST execution, or collecting and closing coverage.behind everything our users see online is the architecture built by the technical infrastructure team to keep it running. from developing and maintaining our data centers to building the next generation of google platforms, we make product portfolio possible. we're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. we keep our networks up and running, ensuring our users have the best and fastest experience possible.
responsibilities
plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
create and enhance constrained-random verification environments using systemverilog or formally verify designs with systemverilog assertions (sva) and industry leading formal tools.
identify and write all types of coverage measures for stimulus and corner-cases.
debug tests with design engineers to deliver functionally correct design blocks.
apply close coverage measures to identify verification holes and to show progress towards tape-out.

about the job
be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. as a senior design Verification engineer, you will be a part of research and development team to verify digital designs, develop constrained-random TEST environments and drive system testing to closure. you will collaborate with design and verification teams, manage the verification life-cycle and uncover bugs through corner-case testing.the ai and infrastructure team is redefining whats possible. we empower our company customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers, our company cloud customers, and billions of our company users worldwide. we're the driving team behind our company's groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for our company cloud, our company global networking, data center operations, systems research, and much more.
responsibilities
plan and execute the verification of digital design blocks by understanding specifications and working with design engineers to define key verification scenarios.
develop and refine random verification environments using systemverilog/uvm or Specman to ensure effective TEST coverage.
define and implement various coverage measures to capture stimulus and corner-case scenarios.
collaborate with design engineers to debug tests and ensure functional correctness of design blocks.
drive coverage analysis to identify verification gaps and demonstrate progress towards tape-out.

looking for outstanding chip design Verification engineers to join our networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
come and take a significant part in designing and verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.
what you will be doing:
work in a combined design and verification team which develops core units within the networking silicon.
build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.
work closely with multiple teams within organizations such as architecture, micro- architecture, full-chip, fw and post-silicon validation.
your daily work will involve all aspects of design verification: planning, coding, coverage and integration

we are looking for best-in-class chip design engineers to join our outstanding networking silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! come and take a significant part in designing and verifying our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.
what you will be doing:
join tel-aviv/beer-sheva group, working on verification in the field of encryption accelerators.
verification of chip blocks/entities according to specifications under challenging constraints and with high orientation to power, area and performance.
daily work will involve verification and might involve any or all aspects of chip development including micro-architecture.
work closely with firmware and other groups around the globe.
work mode: hybrid home-office.

seeking a dynamic and highly motivated senior Software manager to lead our software verification and automation for doca networking sdk. we are looking for a candidate who can excel in a sophisticated, multidisciplinary environment, take ownership, and drive high-quality verification and automation processes. this position offers the opportunity to have a real impact on sophisticated, groundbreaking products, delivered by nvidia and developed by our customers, empowering the most advanced data centers in the world. this role requires close collaboration with teams across various fields (sw, hw, QA ) to elevate our product to the next level.
what you'll be doing:
lead teams of software Verification engineers, providing technical direction, career development, and performance mentorship
define and continuously refine our software testing methodology and processes
engage in a hands-on approach, actively participating in the design, coding, and debugging of verification tests and infrastructure alongside your team
lead the verification process, ensuring the functionality, stability, and performance of our doca networking sdk and the solutions on top of it
work closely with internal and external customers to understand system use cases
analyze coverage measures to identify verification gaps and provide data -driven insights into product development and release readiness

seeking a visionary ai Verification engineer to join our chip design methodologies team. were expanding how we use ai across all our verification methods. in this role, youll help us figure out where ai fits best and build the 'brains' behind our tools. youll help us leverage ai, utilizing llms and Machine Learning -to help us debug complex chips faster and more efficiently
what youll be doing
ai ecosystem development: build and deploy an ai verification environment, moving from manual testbenches to automated stimulus generation and coverage closure.
next-gen tooling: develop and integrate ai agents and ml models directly within the verification toolchain to automate intent-to-testbench workflows.
intelligent debugging: create and refine ai-based debug assistants that can analyze simulation failures, categorize bugs, and suggest fixes autonomously.
methodology innovation: research and apply groundbreaking ai approaches (such as reinforcement learning or llms) to address the "state-space explosion" in chip verification.
collaborative intelligence: work with design automation teams and eda vendors to ensure our ai solutions provide end-to-end efficiency from rtl to gds.
leadership & training: act as the authority, training the broader team on how to bring to bear ai tools and "human-in-the-loop" methodologies.
nvidia houses the most forward-thinking minds in the world. are you a creative engineer ready to build the first truly self-verifying chip environment? come join our team and help us define the future of hardware powered by artificial intelligence.