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3 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
Space Systems Development Manager We are seeking an experienced Space Systems Development Manager to lead the development of advanced space systems from concept through delivery.
Responsibilities:
Lead multidisciplinary teams across systems, software, and hardware
Manage end-to-end development, including requirements, design, integration, and validation
Drive system architecture and ensure successful delivery.
Requirements:
Requirements:
B.Sc./M.Sc. in Aerospace Engineering, Electrical Engineering, Physics, or related field
Experience managing complex development projects
Strong background in space systems or similar domains
system -level thinking and hands-on approach
Advantages:
Experience with satellites, payloads, or ground systems
Familiarity with space standards and high-reliability systems
Location: Tel Aviv, Israel.
This position is open to all candidates.
 
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18/03/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
Satellite system Engineer We are looking for a Satellite system Engineer to lead the design and development of advanced space systems. This role covers system architecture, integration, and validation, working closely with multidisciplinary teams across the full project lifecycle.
Responsibilities Lead system engineering and architecture for satellite systems
Define and manage requirements, interfaces, and system trade-offs
Lead system reviews (SRR/PDR/CDR) and deliverables (ICD, V&V, ATP/ATR)
Manage design maturity, risks, and mitigation plans
Perform system modeling (SysML) and collaborate with cross-functional teams
Lead integration and testing, including TEST planning and analysis
Support proposals and technical marketing activities
Develop tools and analyses using MATLAB / Python / LabVIEW
Requirements:
Requirements B.Sc. in Aerospace, Electrical, Mechanical Engineering or Physics
5+ years of experience in system engineering or development of complex multidisciplinary satellite systems
Proven experience in system architecture definition, requirements management, and interface control
Experience managing system budgets (e.g., power, mass, data, propulsion)
Hands-on experience leading system reviews (SRR/PDR/CDR) and V&V / AIT activities
Experience working in matrix organizations and with cross-functional engineering teams
Strong analytical skills and experience with system modeling (e.g., SysML)
Proficiency in technical English (written and spoken) Location: Tel Aviv
This position is open to all candidates.
 
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חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
Skincare technology expert Pollogen is a dynamic subsidiary of our company, a global pioneer in energy-based technology for the aesthetics and vision domains with sales in nearly 100 countries, a large and growing installed-base, and strong presence in the US, Europe, and Asia. Pollogen offers a fresh approach to innovation, specializing in professional-grade and home-use devices that provide real results. Combined with our companys six decades of market leadership, 330+ patents, 500+ clinical publications, Pollogen and our company offer the perfect balance of scientific artistry and creative excellence.
Basic Job Purpose
The Project Manager is accountable for end-to-end delivery of multidisciplinary medical device development projects, ensuring alignment between business needs, technical execution, regulatory compliance, and product lifecycle objectives.
Key Responsibilities
Full ownership of product development projects from initiation through market release and lifecycle management
Planning and execution of project scope, budget, resources, milestones, and schedules
Close collaboration with Product, Business Development, and Marketing to translate market and customer needs into technical deliverables
Leadership of multidisciplinary teams, including R&D, software, regulatory, clinical, operations, and external subcontractors
Definition and control of system-level requirements, including hardware, software, and integration aspects
Continuous monitoring of execution, risks, dependencies, and mitigation plans, with proactive decision-making
Enforcement of medical device development processes, quality systems, and regulatory standards across all disciplines
Ownership of development documentation, including DHF, DMR, and software lifecycle documentation
Accountability for verification and validation activities at system, hardware, and software levels
Leadership of transition to manufacturing, including test strategies, production readiness, and change control
Support of regulatory submissions, safety testing, root cause analysis, and implementation of corrective actions.
Requirements:
Bachelors degree in Electrical Engineering, Mechanical Engineering, or equivalent engineering discipline (mandatory)
3-5 years of proven experience managing multidisciplinary medical device development projects (mandatory)
Solid knowledge of medical device development processes, including design controls, V&V, documentation, and regulatory compliance
Strong system-level engineering mindset with ability to manage complex technical trade-offs
Practical, working understanding of software development lifecycle processes, including requirements management, architecture, implementation, testing, integration, configuration management, and change control
Experience working with software development tools and environments, including JIRA and Linux-based systems
High professional credibility, accountability, and data-driven decision-making capability
Excellent communication skills with experience working directly with senior leadership and multiple stakeholders
Advantage
Familiarity with IEC 62304 and regulated software development for medical devices
Experience with aesthetic or energy-based medical systems
Proven involvement in full product lifecycle and roadmap execution.
This position is open to all candidates.
 
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22/03/2026
חברה חסויה
Location: Tel Aviv-Yafo and Ra'anana
Job Type: Full Time
We are seeking an excellent Firmware Manager to join to GPU networking (NVLink) FW group in Tel-Aviv / Raanana. You will have the opportunity to lead development team responsible for the firmware of the next-generation networking products while being hands-on with development activities. We drive the data growth of the worlds biggest companies. With dedicated engineers around the globe, the work environment is dynamic, exciting, and fast-paced. Are you ready for the challenge?

What you will be doing:

Lead a team of engineers and provide technical guidance to the team of highly skilled engineers. Empower the team members to excel and increase team productivity.

Lead the design and implementation of new features in the core of our GPU Networking firmware.

Drive and facilitate the planning, scheduling, and execution of the project and activities of the team.

Collaborate with architecture and different software design teams as part of the software development lifecycle.

Work in pre and post-silicon development environments of next-generation our GPU networking products.

Gain a deep understanding of networking technology, system debugging, and stacks, as well as the HW/FW/SW relationship.

Innovate! Bring our Networking products to shine in customers view.
Requirements:
What we need to see:

B.Sc. in Computer Science/ Computer Engineering / Electrical Engineering.

2+ years of managerial experience.

6+ overall years of relevant overall professional experience.

Proficient knowledge of C (Real-time).

In-depth understanding of firmware and real-time programming, working closely with HW.

Strong analytical, creative, debugging, and problem-solving skills.

Detail-oriented and comfortable with multitasking in a dynamic environment with shifting priorities and changing requirements.

An excellent teammate with good social skills.

Strong programming skills in Python.

Ways to stand out from the crowd:

Knowledge of network protocols.

Experience with Agile/Scrum.

Background in Linux internals.

Experience in operating systems concepts like memory management, and user-space vs Kernel space.

Practical OOP hands-on design experience (Python / C++).
This position is open to all candidates.
 
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19/03/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
seeking a dynamic and highly motivated Software Senior Manager to lead our BlueField DPU Platform software team. We are looking for a candidate who can excel in a sophisticated, multidisciplinary environment, take ownership, and drive high-quality software development including low-level device initialization, Linux OS drivers and kernel configuration, boards bring-up and system management. This position offers the opportunity to have a real impact on sophisticated, groundbreaking products, delivered by us and developed by our customers, empowering the most advanced data centers in the world. We believe our most valuable asset is our people and seek the very best to lead our outstanding team. This role requires close collaboration with teams across various fields (SW, HW, QA) to elevate our product to the next level.

What you will be doing:

Mentor and expand your engineering team in the planning and execution of initiatives and projects with top quality and timely results.

Coordinate feature design and implementation as well issue resolution, as this is a technical leadership role.

Interact with internal and external partners to understand their use cases and requirements. Collaborate with engineering teams, program and product management across the product roadmap.

Continuously review and identify improvement opportunities in established processes, infrastructure, and practices to ensure the teams are implementing in the most efficient and open manner.

Develop a team of engineers who understand the bigger picture, value collaboration, and can take ownership of and implement designs from beginning to end.

Be familiar with the open-source community process to advance industry-standard programming models and platform support while upstreaming and maintaining software into standard software distributions.
Requirements:
What we need to see:

B.Sc. degree or equivalent experience in Computer Science, Computer Engineering, or Electrical Engineering.

12+ overall years of experience in the software industry with specialization in embedded Linux system software stack and Arm preboot development.

4+ years of experience managing managers or senior engineers.

Proven track record of taking several complex software features or products through the full product life cycle.

Strong understanding of computer system architecture, operating systems principles, HW-SW interactions, and performance analysis/optimizations.

Proficient in C, C++ with the technical depth to guide and mentor the team

Experience balancing multiple projects with conflicting priorities.

Flexibility to work and communicate effectively across different teams and time zones.

Ways to stand out from the crowd:

Demonstrated leadership of engineering teams doing embedded Linux and preboot Arm work.

Experience with ARMv8 microarchitecture, ATF, and/or UEFI software.

Knowledge of secure boot flows and/or trusted computing environments is a strong plus.

A good sense of humor is key. We like to have a positive team environment.
This position is open to all candidates.
 
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26/03/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
seeking a dynamic and highly motivated senior Software manager to lead our software verification and automation for doca networking sdk. we are looking for a candidate who can excel in a sophisticated, multidisciplinary environment, take ownership, and drive high-quality verification and automation processes. this position offers the opportunity to have a real impact on sophisticated, groundbreaking products, delivered by nvidia and developed by our customers, empowering the most advanced data centers in the world. this role requires close collaboration with teams across various fields (sw, hw, QA ) to elevate our product to the next level.
what you'll be doing:
lead teams of software Verification engineers, providing technical direction, career development, and performance mentorship
define and continuously refine our software testing methodology and processes
engage in a hands-on approach, actively participating in the design, coding, and debugging of verification tests and infrastructure alongside your team
lead the verification process, ensuring the functionality, stability, and performance of our doca networking sdk and the solutions on top of it
work closely with internal and external customers to understand system use cases
analyze coverage measures to identify verification gaps and provide data -driven insights into product development and release readiness
Requirements:
what we need to see:
b.sc degree or equivalent experience in Computer Science, computer engineering, or electrical engineering
10+ years of overall professional experience and 4+ years of experience managing managers or senior engineers.
proficient in Python, C, C ++ with the technical depth to guide and mentor the team
experience with regression systems and their optimizations
experience with networking protocols, mainly ethernet
experience with virtualization technologies
strong analytical, debugging, and problem-solving skills with meticulous attention to detail
experience with Embedded sw development
excellent interpersonal skills and the ability to multitask in a dynamic environment with shifting priorities
self-motivated and well-organized
ways to stand out from the crowd:
advanced understanding in ethernet protocols and rdma
experience with cloud and ai workload optimization
proficiency in continuous integration (ci) methodologies and tools such as gerrit, jenkins, and gitlab
experienced in TEST generation and coverage methods and metrics
background in Linux Kernel, security protocols
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo
Job Type: Full Time
about the job
in this role, youll work to shape the future of ai/ml hardware acceleration. you will have an opportunity to drive cutting-edge tpu (tensor processing unit) technology that powers google's most demanding ai/ml applications. youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of google's tpu. you'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on tpu architecture and its integration within ai/ml-driven systems.
as a design technology co-optimization (dtco) engineer, you will bridge the gap between process technology and product architecture to define the next generation of datacenter-class silicon. you will be responsible for extracting maximum process entitlement by evaluating advanced logic nodes and emerging transistor architectures.in this role, you will conduct place and route experiments and sensitivity analyses to influence standard cell library architecture, metal stack definitions, and design rules. you will collaborate with foundry, ip, and architecture teams to identify power, performance, and area (ppa) bottlenecks and drive system technology co-optimization (stco) initiatives.your work will involve performing high-fidelity physical implementation sweeps, analyzing the impact of scaling boosters, and developing automated methodologies to quantify ppa gains. by navigating the trade-offs between process complexity and design performance, you will ensure googles hardware achieves efficiency and power density.the ai and infrastructure team is redefining whats possible. we empower google customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers include googlers, google cloud customers, and billions of google users worldwide. we're the driving force behind google's groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for google cloud, google global networking, data center operations, systems research, and much more.
responsibilities
execute high-fidelity place and route experiments to evaluate the ppa impact of advanced process features, library architectures, and design rule variations on datacenter-class ip.
drive design technology co-optimization by collaborating with foundries and internal technology teams to define optimal metal stacks, track he
דרישות:
minimum qualifications:
bachelor's degree in electrical engineering, computer engineering, Computer Science, or a related field, or equivalent practical experience.
2 years of experience in physical design (rtl-to-gds) or technology development, focusing on advanced nodes (e.g., 7nm, 5nm, or below).
experience with industry-standard place and route (p&r) tools and static timing analysis (sta) tools.
experience in cmos device physics, finfet/nanosheet architectures, and the impact of layout parasitics on ppa.
experience in scripting and automation using tcl and Python (or PERL ) to manage design sweeps and data extraction.
preferred qualifications:
master's degree or phd in electrical engineering, computer engineering or Computer Science, with an emphasis on computer architecture.
experience in design technology co-optimization (dtco), including standard cell library characterization, metal stack optimization, and evaluation of scaling boosters (e.g., backside power delivery).
experience working with major foundry technology files (pdks) and interpreting design rule manuals (drm) to guide physical im המשרה מיועדת לנשים ולגברים כאחד.
 
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26/03/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
we are seeking a highly motivated senior architect for high speed optical systems to join our team of experts and help build the future of high-performance computing. our next-generation infiniband, nvl and ethernet switches will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in ai research to high-performance clusters used in vast industries. you will work on some of the most groundbreaking technology as an architect for high-speed optical networks at nvidia. you will help develop next-generation switches and optic engine. the products you'll develop will be coordinated in many groundbreaking compute clusters, and supercomputers, and you'll be part of a team with a strong track record of success.
what you'll be doing:
collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and hardware teams, to ensure the successful execution of the project optimizing rack-to-rack connectivity and fiber routing.
crafting and architecting advanced ultra-fast fiber optic connectivity solutions for nvidia systems.
leading the development and implementation of optic systems to ensure world-class performance and reliability.
analyzing and determining the best approaches for integrating complex optic systems within our infrastructure.
define the optics engine architecture with taking into consideration the system requirement and limitation influencing on the optical engine feature set and technology.
successfully implementing and managing projects to meet ambitious deadlines and performance targets.
Requirements:
what we need to see:
bsc or msc in electrical engineering / Computer Science or equivalent experience.
a proven track record with a minimum of 8 years of experience in high-speed optic
deep understanding of how to build and integrate systems with various technology components.
proficiency in advanced system -level high-speed optic connectivity.
excellent communication skills to effectively work with diverse teams and collaborators.
can-do attitude and high energy with leadership and excellent interpersonal skills and possess the ability to learn sophisticated concepts in a fast-paced environment.
possess strong managerial, problem solving and critical thinking skills.
attention to details on design and high focus on design quality.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
in this role, you will help build socs by driving quality and reliability processes from the integrated circuit (ic) perspective. working with various cross-functional teams, you will develop quality and reliability specifications, develop and deploy design guidelines, and develop and execute TEST plans. within the larger organization, you will collaborate with global hardware quality and reliability, silicon design, validation, and engineering teams. you will have an understanding of ic flows, wafer processing, testing, qualification, yield, reliability, and failure analysis.the ml, systems, & cloud ai (msca) organization at google designs, implements, and manages the hardware, software, Machine Learning, and systems infrastructure for all google services (search, youtube, etc.) and google cloud. our end users are googlers, cloud customers and the billions of people who use google services around the world. we prioritize security, efficiency, and reliability across everything we do - from developing our latest tpus to running a global network, while driving towards shaping the future of hyperscale computing. our global impact spans software and hardware, including google clouds vertex ai, the leading ai platform for bringing gemini models to enterprise customers.
responsibilities
define and lead qualification hardware and TEST developments in front of internal teams and external vendors.
define and execute silicon and package qualification activities (e.g., htol, elfr, esd/lu, b/hast, thb, etc.).
extract, manipulate, and analyze large volumes of data from silicon and package qualification programs (e.g., htol, elfr, esd, lu, uhast, tct, etc.), high volume mfg, and field returns to identify failure mechanisms, reliability trends, and opportunities for yield, quality, and reliability improvement.
own cross-functional investigation of ic quality and reliability issues to identify root causes and develop solutions (e.g., rma triage, analytics, failure analysis, etc.).
develop and implement physics-based statistical quality and reliability models (e.g., elf, tddb, nbti, hci, time zero failures, etc.) to predict silicon device failure mechanisms, degradation patterns, and lifetime behaviors.
Requirements:
minimum qualifications:
bachelor's degree in electrical engineering, materials science, a related technical field, or equivalent practical experience.
2 years of experience in ic silicon quality or reliability.
experience in semiconductor cmos technology, device physics, failure mechanisms, and accelerated TEST methodologies.
experience in reliability modeling, data analytics, and statistics.
preferred qualifications:
experience in semiconductor reliability, manufacturing processes (e.g., fab, assembly, TEST ), or ic and packaging failure mechanisms and related failure analysis.
experience in data analytics, especially to identify commonalities and abnormalities.
knowledge of design-for-reliability guidelines and implementation techniques.
familiarity with TEST methods and hardware for silicon qualification (e.g., htol chambers, esd, lu, etc.).
This position is open to all candidates.
 
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30/03/2026
Location: Tel Aviv-Yafo
Job Type: Full Time and Hybrid work
We are seeking a Technical Project Manager with proven expertise in High-Speed Board Design and hardware project management to join our Firewall Core Group.
Job Id: 22794
This role involves leading complex, cross-functional projects that combine hardware and software, driving innovation for our Security Gateways.
Key Responsibilities
Lead hardware/software projects from planning through delivery.
Manage board design, hardware development, and prototype builds (EVT, DVT, PVT) with contract manufacturers.
Coordinate across R&D, QA, PMO, and Product Management teams.
Oversee software release processes and infrastructure changes.
Maintain schedules, mitigate risks, and manage external vendors.
Requirements:
Bachelors degree in Electrical Engineering, Software Engineering, or similar technical field.
Proven experience in High-Speed Board Design - mandatory.
Knowledge of hardware design techniques and schematic principles.
2-5 years of experience managing hardware projects.
Familiarity with software engineering and project management.
Strong technical background with a hands-on approach.
Excellent communication, organizational, and leadership skills.
Experience with project planning tools (Jira, MS Project).
Nice to have:
PMP Certification.
Knowledge of network protocols.
Experience with C/C++ programming.
Background in cloud services, cybersecurity, and networking.
Management of overseas subcontractors.
Understanding of production and manufacturing processes.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
be part of a team that pushes boundaries, developing custom silicon solutions that power the future of direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
as a SOC physical design engineer, you will collaborate with functional design, design for testing (dft), architecture, and packaging engineers. additionally, you will solve technical problems with micro-architecture and logic circuits solutions, while evaluating design options with optimized performance, power, and area in mind.the ai and infrastructure team is redefining whats possible. we empower customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers include , cloud customers, and billions of our  users worldwide. we're the driving team behind our groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for cloud, global networking, data center operations, systems research, and much more.
responsibilities
define and drive the implementation of physical design methodologies.
take ownership of one or more physical design partitions or top level.
drive to the closure of timing and power consumption of the design.
contribute to design methodology, libraries, and code review.
define the physical design related rule sets for the functional design engineers.
Requirements:
minimum qualifications:
bachelors degree in electrical engineering or equivalent practical experience.
4 years of experience with system on a chip ( SOC ) cycles.
experience with advanced design, including clock/voltage domain crossing, dft, and low power designs.
experience in high-performance, high-frequency, and low-power designs.
preferred qualifications:
masters degree in electrical engineering, or a related field.
experience coding with system verilog and scripting with transaction control language (tcl).
experience with very large scale integration (vlsi) design in SOC.
experience with multiple-cycles of SOC in asic design.
experience with layout verification and design rules.
This position is open to all candidates.
 
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עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
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