our networking system product engineering team is looking for an excellent TEST design and Validation engineer.the position requires an understanding of hw and sw to provide stable, efficient, smoothly running production tests, to enable high availability, while ensuring the quality of the products being shipped to customers. the position combines design and hands-on infrastructure development, implementing and maintenance of sophisticated tools that improves development workflow and overall productivity.
what youll be doing: 
design and develop automated tests for networking switches and adapters while working closely with the hw, asic, and sw engineering teams to achieve a reliable TEST with high coverage
exposed to various aspects of design, dft, and TEST of next-generation network products
take a significant part in the definition and development of tests from the development level to the final TEST of network-systems
utilize TEST suites to find, debug and resolve problems with production process
ability to drive projects to full execution in time and working under pressure of schedule and multi project environment
supporting and fix bugs of existing code. supporting production lines for: deployments, patches, maintenance
TEST verification and validation (both hw and sw). troubleshooting and streamlining/optimizing our testing procedures
execute tests in different scopes such: regression, performance degradation, functional, and security; report the progress of testing and provide summary reports of the activity

seeking a hardware & system development manager to join our system product engineering organization. in this role, youll own the creation and optimization of advanced TEST and validation platforms for nvidias high-performance networking products. these platforms power both r&d-level validation and mass production testing, ensuring exceptional product quality, reliability, and scalability.
at nvidia, we push the boundaries of whats possible in computing and networking. we believe that innovation thrives in an environment of teamwork, ownership, and technical excellence. we value ambitious thinking, thorough execution, and a shared commitment to creating exceptional products.
were looking for a board design leader with deep technical expertise and a passion for leading teams, driving end-to-end solutions, and fostering multidisciplinary collaboration. join us and be part of a team thats shaping the future of networking technologies!
what youll be doing:
lead the development of TEST hardware platforms, including customized TEST boards and system -level infrastructure.
own the full hardware lifecycle - from definition and schematic design to bring-up and production deployment.
deliver hardware used across r&d and manufacturing for functional, performance, and reliability testing.
collaborate with mechanics, signal integrity, layout, dft, firmware, and production teams to achieve seamless integration.
drive technical execution, project schedules, and cross-site coordination with precision and clarity.

We are expanding our System Validation Group and invite you to explore with us!

Outstanding opportunity to be part of a super-cutting-edge team working on systems above and beyond the globe.



What you will be doing​



Writing system validation Test plans , Design and develop Test programs to validated embedded system features and performance.

Conducting System Validation Test cycles to verify systems based on HW (analog and Digital), RF, SW, FW

Experience with Python or C programing, Git or other programming languages & source control.

Strong technical troubleshooting.

Develop tools and utilities for Lab & field testing, feature analysis

High debug capabilities when work with the Software, systems, HW teams on complex issues.

Ability to move fast and decisiveness.

Building development environment.

Designing automate tests.

E2E ownership product from kickoff to production.

be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.as a power and signal integrity engineer, you will be responsible for the design and characterization of signal and power integrity of our ic designs. you will design the external electrical interfaces of the device, from their signal/power-integrity and electrical usage perspectives and set up methodologies, perform simulations, silicon characterization and correlations to ensure our ic designs meet systems design budgets and achieve the highest performance. you will work with systems architects, asic design, systems engineers, and partner cross-functionally with teams and external vendors/partners.the ml, systems, and cloud ai (msca) organization at our designs, implements, and manages the hardware, software, Machine Learning, and systems infrastructure for all our services (search, youtube, etc.) and our cloud. our end users are cloud customers and the billions of people who use our services around the world. we prioritize security, efficiency, and reliability across everything we do - from developing our latest tpus to running a global network, while driving towards shaping the future of hyperscale computing. our global impact spans software and hardware, including our clouds vertex ai, the leading ai platform for bringing gemini models to enterprise customers.
responsibilities
generate precise electrical models (e.g., s-parameters, spice models) for components such as packages, pcbs, and connectors for use in simulations.
simulate high speed interface electrical behavior using hspice or other circuit simulators.
execute lab measurements utilizing TEST equipment like oscilloscopes, vector network analyzers (vna), time domain reflectometers (tdr), spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.
establish design rules and guidelines for optimal signal/power integrity during pcb and package layout, ensuring high production yield and reliability.
document design specifications, analysis results, and validation reports to ensure compliance with standards and for future reference, while collaborating extensively with cross-functional teams, including asic architects, digital/analog designers, physical design/layout engineers, and system engineers

be part of a team that pushes boundaries, developing custom silicon solutions that power the future of direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
our mission is to organize the world's information and make it universally accessible and useful. our team combines the best of ai, software, and hardware to create radically helpful experiences. we research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. we aim to make people's lives better through technology.as a power and signal integrity engineer, you will be responsible for the design and characterization of signal and power integrity of our ic designs. you will design the external electrical interfaces of the device, from their signal/power-integrity and electrical usage perspectives.you'll set up methodologies, perform simulations, silicon characterization and correlations to ensure our ic designs meet systems design budgets and achieve the highest performance. you will work with systems architects, asic design, systems engineers, and partner cross-functionally with teams and external vendors/partners.the ml, systems, & cloud ai (msca) organization at designs, implements, and manages the hardware, software, Machine Learning, and systems infrastructure for all services (search, youtube, etc.) and cloud. our end users are, cloud customers and the billions of people who use services around the world. we prioritize security, efficiency, and reliability across everything we do - from developing our latest tpus to running a global network, while driving towards shaping the future of hyperscale computing. our global impact spans software and hardware, including clouds vertex ai, the leading ai platform for bringing gemini models to enterprise customers.
responsibilities
design and optimize power distribution networks (pdn) across chip, package, and board levels. this includes managing power/ground planes, decoupling capacitors, and power gating strategies.
conduct both pre-layout and post-layout power integrity simulations to analyze power and ground noise (ssn/sso), voltage drops (ir drop), and electromagnetic interference (emi).
implement and verify low-power design methodologies, such as multi-voltage designs and clock gating, using power intent formats like upf/cpf.
generate precise electrical models (e.g., s-parameters, spice models) for components such as packages, pcbs, and connectors for use in simulations.
execute lab measurements utilizing TEST equipment like oscilloscopes, vector network analyzers (vna), time domain reflectometers (tdr), spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.

our networking product engineering team is looking for an excellent TEST development engineer. the position requires an understanding of both hw and sw to provide stable, efficient, and smoothly running production tests that enable high availability while ensuring the quality of the products being shipped to customers.
 
what youll be doing:
design and develop automated tests for networking switches and dpu adapters while working closely with the hw, asic, and sw engineering teams to achieve reliable tests with high coverage.
be exposed to various aspects of design, dft, and TEST of nvidia's next-generation network products.
take a significant part in the definition and development of tests, from early development level to the final TEST of network-systems in mass production.
work with overseas manufacturing mass production teams to increase yields, TEST coverage and capacity, and to reduce production costs.
lead TEST solution innovations to reduce TEST time and improve overall product quality.
utilize TEST suites to find, debug, and resolve problems in the production process, and drive issues to closure.
support and fix bugs in existing TEST code; support production lines for deployments, patches, and ongoing maintenance.

our networking product engineering team is looking for an excellent TEST development engineer. the position requires an understanding of both hw and sw to provide stable, efficient, and smoothly running production tests that enable high availability while ensuring the quality of the products being shipped to customers.
what youll be doing:
design and develop automated tests for networking switches and dpu adapters while working closely with the hw, asic, and sw engineering teams to achieve reliable tests with high coverage.
be exposed to various aspects of design, dft, and TEST of nvidia's next-generation network products.
take a significant part in the definition and development of tests, from early development level to the final TEST of network-systems in mass production.
work with overseas manufacturing mass production teams to increase yields, TEST coverage and capacity, and to reduce production costs.
lead TEST solution innovations to reduce TEST time and improve overall product quality.
utilize TEST suites to find, debug, and resolve problems in the production process, and drive issues to closure.
support and fix bugs in existing TEST code; support production lines for deployments, patches, and ongoing maintenance.

as a quality and reliability (q&r) engineer, you will lead the qualification and long-term reliability of advanced system -on-chip ( SOC ) and RF semiconductor products for automotive applications. youll work across digital and RF domains to ensure robust performance and compliance with industry standards.
what will your job look like:
define and manage quality and reliability specifications, simulations, and qualification plans for SOC and RF die and package.
plan and execute automotive-grade qualifications per standards such as aec-q100, jedec jesd22, and iatf 16949.
design and implement die-level and package-level stress tests.
select and prepare electrical, environmental, and mechanical TEST platforms for reliability testing.
define requirements for pre-si q&r (e.g. esd, lu, em, ir drop), design-for- TEST (dft), electrical characterization, and post-si q&r testing of digital, mixed-signal and RF socs.
collaborate extensively with internal design teams, external subcontractors, and outsourcing partners (osats).
lead failure analysis, reliability modeling, and corrective action processes (e.g., 8d, fmea, fmeda).
document and certify automotive standards compliance, including ppap/apqp deliverables.

Our Networking team in Israel is looking for an expert system/board designer to join the Hardware NVLINK Group. The team leads the development of GPU networking infrastructure for our next-generation servers focusing on accelerated performance while enabling optimized end to end GPU connectivity.

Our NVLINK HW team designs innovative end-to-end connectivity solutions for GPU servers. Our products optimize data center performance and deliver industry-leading bandwidth and scalability. Our products are focused on delivering the most optimized power - performance communication solutions for industries like AI, ML, Cloud, Media and Entertainment as well as any other industry that can benefit from our Datastream acceleration.

What you'll be doing:

Lead Pioneering Switch System design from concept to mass production.

Collaborate and integrate with all HW project fields: Board Design, Mechanics, Thermal, PCB Layout, Production, Software/Firmware, RTL and more.

Project decision maker - Technical focal point.

The position consists of product specification definitions, electrical schematics, component selection, layout guidance, hands-on testing in a lab environment, accompanying production and qualification processes.