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לפני 17 שעות
Location: Tel Aviv-Yafo
Job Type: Full Time
we are seeking a highly motivated high-performance system architect to join our team of experts and help shape the future of high-performance and ml / ai computing. our next-generation nvl systems will be at the forefront of connecting and powering the world's most advanced compute clusters, which would be used to train the most advanced ai models such as gpt and deepseek. as a high-performance system architect at nvidia, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation networks that will be used by top researchers and engineers around the world.
what youll be doing:
define the nvl system architecture end-to-end, by internal requirements and customers requirements through all product life cycles (post/pre silicon, on deployments).
research various of solutions to enable the next large-scale-high-performance computing clusters. the position spans over various layers from algorithms, software, firmware, and hw.
collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and research teams, to ensure the successful execution of the project.
Requirements:
what we need to see:
b.sc, m.sc, or ph.d degree in Computer Science, Computer Engineer, or electrical engineer.
at least 5 years of industry or research experience in computer networks.
excellent understanding of large-scale networks behavior and the effect of distributed computing workloads effect on the network.
experience in developing models for simulations, analyzing simulation results and development of optimization algorithms.
possess strong managerial, problem solving and critical thinking skills.
ability to work and operate in a highly dynamic environment.
partner with multiple groups in the organization.
ways to stand out from the crowd:
good knowledge in network protocols - such as infiniband, ip, tcp and roce and network topologies.
good knowledge in Python, C ++.
familiarity with hpc environments, routing algorithms, omnet++ and ns3 simulation environments.
This position is open to all candidates.
 
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לפני 16 שעות
Location: Tel Aviv-Yafo
Job Type: Full Time
we are seeking a highly motivated senior architect for high speed optical systems to join our team of experts and help build the future of high-performance computing. our next-generation infiniband, nvl and ethernet switches will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in ai research to high-performance clusters used in vast industries. you will work on some of the most groundbreaking technology as an architect for high-speed optical networks at nvidia. you will help develop next-generation switches and optic engine. the products you'll develop will be coordinated in many groundbreaking compute clusters, and supercomputers, and you'll be part of a team with a strong track record of success.
what you'll be doing:
collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and hardware teams, to ensure the successful execution of the project optimizing rack-to-rack connectivity and fiber routing.
crafting and architecting advanced ultra-fast fiber optic connectivity solutions for nvidia systems.
leading the development and implementation of optic systems to ensure world-class performance and reliability.
analyzing and determining the best approaches for integrating complex optic systems within our infrastructure.
define the optics engine architecture with taking into consideration the system requirement and limitation influencing on the optical engine feature set and technology.
successfully implementing and managing projects to meet ambitious deadlines and performance targets.
Requirements:
what we need to see:
bsc or msc in electrical engineering / Computer Science or equivalent experience.
a proven track record with a minimum of 8 years of experience in high-speed optic
deep understanding of how to build and integrate systems with various technology components.
proficiency in advanced system -level high-speed optic connectivity.
excellent communication skills to effectively work with diverse teams and collaborators.
can-do attitude and high energy with leadership and excellent interpersonal skills and possess the ability to learn sophisticated concepts in a fast-paced environment.
possess strong managerial, problem solving and critical thinking skills.
attention to details on design and high focus on design quality.
This position is open to all candidates.
 
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לפני 23 שעות
Location: Tel Aviv-Yafo
Job Type: Full Time
about the job
in this role, youll work to shape the future of ai/ml hardware acceleration. you will have an opportunity to drive cutting-edge tpu (tensor processing unit) technology that powers google's most demanding ai/ml applications. youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of google's tpu. you'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on tpu architecture and its integration within ai/ml-driven systems.
as a design technology co-optimization (dtco) engineer, you will bridge the gap between process technology and product architecture to define the next generation of datacenter-class silicon. you will be responsible for extracting maximum process entitlement by evaluating advanced logic nodes and emerging transistor architectures.in this role, you will conduct place and route experiments and sensitivity analyses to influence standard cell library architecture, metal stack definitions, and design rules. you will collaborate with foundry, ip, and architecture teams to identify power, performance, and area (ppa) bottlenecks and drive system technology co-optimization (stco) initiatives.your work will involve performing high-fidelity physical implementation sweeps, analyzing the impact of scaling boosters, and developing automated methodologies to quantify ppa gains. by navigating the trade-offs between process complexity and design performance, you will ensure googles hardware achieves efficiency and power density.the ai and infrastructure team is redefining whats possible. we empower google customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers include googlers, google cloud customers, and billions of google users worldwide. we're the driving force behind google's groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for google cloud, google global networking, data center operations, systems research, and much more.
responsibilities
execute high-fidelity place and route experiments to evaluate the ppa impact of advanced process features, library architectures, and design rule variations on datacenter-class ip.
drive design technology co-optimization by collaborating with foundries and internal technology teams to define optimal metal stacks, track he
דרישות:
minimum qualifications:
bachelor's degree in electrical engineering, computer engineering, Computer Science, or a related field, or equivalent practical experience.
2 years of experience in physical design (rtl-to-gds) or technology development, focusing on advanced nodes (e.g., 7nm, 5nm, or below).
experience with industry-standard place and route (p&r) tools and static timing analysis (sta) tools.
experience in cmos device physics, finfet/nanosheet architectures, and the impact of layout parasitics on ppa.
experience in scripting and automation using tcl and Python (or PERL ) to manage design sweeps and data extraction.
preferred qualifications:
master's degree or phd in electrical engineering, computer engineering or Computer Science, with an emphasis on computer architecture.
experience in design technology co-optimization (dtco), including standard cell library characterization, metal stack optimization, and evaluation of scaling boosters (e.g., backside power delivery).
experience working with major foundry technology files (pdks) and interpreting design rule manuals (drm) to guide physical im המשרה מיועדת לנשים ולגברים כאחד.
 
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לפני 16 שעות
Location: Tel Aviv-Yafo
Job Type: Full Time
seeking a dynamic and highly motivated senior Software manager to lead our software verification and automation for doca networking sdk. we are looking for a candidate who can excel in a sophisticated, multidisciplinary environment, take ownership, and drive high-quality verification and automation processes. this position offers the opportunity to have a real impact on sophisticated, groundbreaking products, delivered by nvidia and developed by our customers, empowering the most advanced data centers in the world. this role requires close collaboration with teams across various fields (sw, hw, QA ) to elevate our product to the next level.
what you'll be doing:
lead teams of software Verification engineers, providing technical direction, career development, and performance mentorship
define and continuously refine our software testing methodology and processes
engage in a hands-on approach, actively participating in the design, coding, and debugging of verification tests and infrastructure alongside your team
lead the verification process, ensuring the functionality, stability, and performance of our doca networking sdk and the solutions on top of it
work closely with internal and external customers to understand system use cases
analyze coverage measures to identify verification gaps and provide data -driven insights into product development and release readiness
Requirements:
what we need to see:
b.sc degree or equivalent experience in Computer Science, computer engineering, or electrical engineering
10+ years of overall professional experience and 4+ years of experience managing managers or senior engineers.
proficient in Python, C, C ++ with the technical depth to guide and mentor the team
experience with regression systems and their optimizations
experience with networking protocols, mainly ethernet
experience with virtualization technologies
strong analytical, debugging, and problem-solving skills with meticulous attention to detail
experience with Embedded sw development
excellent interpersonal skills and the ability to multitask in a dynamic environment with shifting priorities
self-motivated and well-organized
ways to stand out from the crowd:
advanced understanding in ethernet protocols and rdma
experience with cloud and ai workload optimization
proficiency in continuous integration (ci) methodologies and tools such as gerrit, jenkins, and gitlab
experienced in TEST generation and coverage methods and metrics
background in Linux Kernel, security protocols
This position is open to all candidates.
 
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18/03/2026
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a creative and experienced Senior Firmware Engineer to join our PCIe Firmware team-someone passionate about using artificial intelligence to engineer the foundational hardware of the AI revolution.

As an integral part of our team, you'll architect and implement the core of our next-generation devices. This senior role places you at the center of innovation, where you will have a direct impact on our business and technology by solving sophisticated technical challenges. Its a unique opportunity to shape our technology and empower customers to build the supercomputers and AI fabrics of tomorrow.

What You'll Be Doing:

Lead the architectural design, development, and optimization of cutting-edge PCIe firmware, using AI-driven modeling and insights to deliver exceptional performance.

Serve as a trusted technical expert by investigating, debugging, and resolving challenging PCIe firmware issues for our most important customers.

Collaborate closely with our Chip Design, Verification, Software, and Architecture engineers to find root causes and develop robust, long-term solutions.

Champion the integration of AI-assisted diagnostics and generative AI tools across the entire development lifecycle to boost team productivity and innovation.

Translate customer needs and field data into actionable feedback that directly shapes the future of our products.
Requirements:
What We Need to See:

A degree in Electrical Engineering, Computer Science, Computer Engineering, or equivalent practical experience.

8+ years of significant professional experience in embedded firmware development, with a deep understanding of PCIe.

A strong foundation in computer architecture, operating systems, and object-oriented programming.

Proficiency in scripting languages like Python to automate tasks and workflows.

An innovative approach with a genuine desire to apply AI and machine learning to accelerate firmware development.

Ways to Stand Out from the Crowd:

Track record of applying AI-powered tools like Cursor to accelerate the development lifecycle.

Previous experience in a customer-facing or application engineering role.

Direct, hands-on experience with PCIe switch architecture and its firmware in high-performance applications.

Deep knowledge of hardware verification concepts and tools (e.g., C++, Python, Jenkins).

Extensive knowledge of networking protocols and the Linux operating system.
This position is open to all candidates.
 
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4 ימים
חברה חסויה
Location: Tel Aviv-Yafo and Ra'anana
Job Type: Full Time
We are seeking an excellent Firmware Manager to join to GPU networking (NVLink) FW group in Tel-Aviv / Raanana. You will have the opportunity to lead development team responsible for the firmware of the next-generation networking products while being hands-on with development activities. We drive the data growth of the worlds biggest companies. With dedicated engineers around the globe, the work environment is dynamic, exciting, and fast-paced. Are you ready for the challenge?

What you will be doing:

Lead a team of engineers and provide technical guidance to the team of highly skilled engineers. Empower the team members to excel and increase team productivity.

Lead the design and implementation of new features in the core of our GPU Networking firmware.

Drive and facilitate the planning, scheduling, and execution of the project and activities of the team.

Collaborate with architecture and different software design teams as part of the software development lifecycle.

Work in pre and post-silicon development environments of next-generation our GPU networking products.

Gain a deep understanding of networking technology, system debugging, and stacks, as well as the HW/FW/SW relationship.

Innovate! Bring our Networking products to shine in customers view.
Requirements:
What we need to see:

B.Sc. in Computer Science/ Computer Engineering / Electrical Engineering.

2+ years of managerial experience.

6+ overall years of relevant overall professional experience.

Proficient knowledge of C (Real-time).

In-depth understanding of firmware and real-time programming, working closely with HW.

Strong analytical, creative, debugging, and problem-solving skills.

Detail-oriented and comfortable with multitasking in a dynamic environment with shifting priorities and changing requirements.

An excellent teammate with good social skills.

Strong programming skills in Python.

Ways to stand out from the crowd:

Knowledge of network protocols.

Experience with Agile/Scrum.

Background in Linux internals.

Experience in operating systems concepts like memory management, and user-space vs Kernel space.

Practical OOP hands-on design experience (Python / C++).
This position is open to all candidates.
 
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7 ימים
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
seeking a dynamic and highly motivated Software Senior Manager to lead our BlueField DPU Platform software team. We are looking for a candidate who can excel in a sophisticated, multidisciplinary environment, take ownership, and drive high-quality software development including low-level device initialization, Linux OS drivers and kernel configuration, boards bring-up and system management. This position offers the opportunity to have a real impact on sophisticated, groundbreaking products, delivered by us and developed by our customers, empowering the most advanced data centers in the world. We believe our most valuable asset is our people and seek the very best to lead our outstanding team. This role requires close collaboration with teams across various fields (SW, HW, QA) to elevate our product to the next level.

What you will be doing:

Mentor and expand your engineering team in the planning and execution of initiatives and projects with top quality and timely results.

Coordinate feature design and implementation as well issue resolution, as this is a technical leadership role.

Interact with internal and external partners to understand their use cases and requirements. Collaborate with engineering teams, program and product management across the product roadmap.

Continuously review and identify improvement opportunities in established processes, infrastructure, and practices to ensure the teams are implementing in the most efficient and open manner.

Develop a team of engineers who understand the bigger picture, value collaboration, and can take ownership of and implement designs from beginning to end.

Be familiar with the open-source community process to advance industry-standard programming models and platform support while upstreaming and maintaining software into standard software distributions.
Requirements:
What we need to see:

B.Sc. degree or equivalent experience in Computer Science, Computer Engineering, or Electrical Engineering.

12+ overall years of experience in the software industry with specialization in embedded Linux system software stack and Arm preboot development.

4+ years of experience managing managers or senior engineers.

Proven track record of taking several complex software features or products through the full product life cycle.

Strong understanding of computer system architecture, operating systems principles, HW-SW interactions, and performance analysis/optimizations.

Proficient in C, C++ with the technical depth to guide and mentor the team

Experience balancing multiple projects with conflicting priorities.

Flexibility to work and communicate effectively across different teams and time zones.

Ways to stand out from the crowd:

Demonstrated leadership of engineering teams doing embedded Linux and preboot Arm work.

Experience with ARMv8 microarchitecture, ATF, and/or UEFI software.

Knowledge of secure boot flows and/or trusted computing environments is a strong plus.

A good sense of humor is key. We like to have a positive team environment.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will be part of a team developing Application-specific integrated circuits (ASICs) used to accelerate networking in data centers. You will have multiple responsibilities in areas such as project definition, design, and implementation. You will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators.You will also be responsible for performance analysis for a networking stack.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Lead an ASIC subsystem.
Understand how ASIC subsystem interacts with software and other ASIC subsystems to implement data center networks.
Define hardware/software interfaces. Write micro architecture and design specifications.
Define efficient micro-architecture and block partitioning/interfaces and flows.
Collaborate with software, verification, and physical design stakeholders to ensure the designs are complete, correct, and performant.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
10 years of experience architecting networking ASICs from specification to production.
Experience developing Register-Transfer Level (RTL) for ASIC subsystems.
Experience with cross-functional engagement in micro-architecture, design, verification, logic synthesis, and timing closure.
Preferred qualifications:
Experience working with software teams optimizing the hardware/software interface.
Experience working with design networking like: Remote Direct Memory Access (RDMA) or packet processing and system design principles for low latency, high throughput, security, and reliability.
Experience in Transmission Control Protocol (TCP), IP, Ethernet, Peripheral Component Interconnect Express (PCIE) and Dynamic Random Access Memory (DRAM) including Network on Chip (NoC) principles and protocols (AXI, ACE, and CHI).
Experience architecting networking switches, end points, and hardware offloads.
Understanding of packet classification, processing, queuing, scheduling, switching, routing, traffic conditioning, and telemetry.
Proficiency in procedural programming language (e.g., C++, Python, Go).
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a SoC Physical Design Engineer, you will collaborate with functional design, Design for Testing (DFT), architecture, and packaging engineers. In this role, you will solve technical problems with innovative micro-architecture and practical logic circuits solutions, while evaluating design options with optimized performance, power, and area in mind.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Use problem-solving and simulation techniques to ensure performance, power, and area (PPA) are within defined requirements.
Collaborate with cross-functional teams to debug failures or performance shortfalls and meet program goals in lab or simulation.
Design chips, chip-subsystems, or partitions within subsystems from synthesis through place and route, and sign off convergence, ensuring that the design meets the architecture goals of power, performance, and area.
Develop, validate, and improve Electronic Design Automation (EDA) methodology for a specialized sign off or implementation domain to enable cross-functional teams to build and deliver blocks that are correct by construction and ease convergence efforts.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
5 years of experience with System on a Chip (SoC) cycles.
Experience with advanced design, including clock/voltage domain crossing, DFT, and low power designs.
Experience in high-performance, high-frequency, and low-power designs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience with scripting languages such as Perl, Python, or Tcl.
This position is open to all candidates.
 
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לפני 3 שעות
Location: Tel Aviv-Yafo
Job Type: Full Time
we are seeking a networking software engineer to join our rdma transport software team, driving the development of next-generation rdma solutions for ai, cloud, hpc, and Storage. you will research and develop innovative transport algorithms that push the limits of performance and scalability. you will work in a fast-paced, collaborative environment alongside talented engineers from around the world, supporting the data needs of the worlds largest enterprises 
what you'll be doing:
take part in research, design, and development of advanced rdma transport mechanisms and algorithms, enhancing performance, reliability, and scalability.
collaborate closely with hardware engineers, software developers, and system architects to align on project objectives and requirements.
keep up with industry trends and emerging technologies, integrating new ideas and innovations into the development process
Requirements:
what we need to see:
bachelor's or master's degree in electrical engineering or Computer Science fields from a known institute.
2+ years of development experience
knowledge with roce and/or infiniband, along with a background in rdma development across software, firmware, or hardware.
strong problem-solving skills with a hands-on approach, able to dive deep into the rdma stack and solve complex issues.
proficiency in C / C ++ and Embedded systems programming.
fast learner possessing the ability to learn complex concepts in a fast-paced environment.
a can-do attitude and high energy with excellent collaboration, and social skills.
ways to stand out from the crowd:
background with data centers networking & Storage workloads (advantage).
familiar with rdma, infiniband, or ethernet technologies
experience designing or tuning congestion control, flow control, or loss recovery mechanisms in high-performance networks.
This position is open to all candidates.
 
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עדכון קורות החיים לפני שליחה
8594050
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לפני 23 שעות
Location: Tel Aviv-Yafo
Job Type: Full Time
about the job
be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
as a cpu workload analysis researcher within our company cloud's msca organization, you will be integral to developing silicon solutions powering our company's direct-to-consumer products. you will join a research and development team focused on analyzing and profiling workloads requirements within the company cloud environment. your role will involve conducting in-depth research on cpu optimization, feature development, and ml usages over compute platforms, contributing to identifying key areas of investment and future opportunities. this role offers a unique opportunity to perform groundbreaking research with a significant impact on both research methodologies and industry products, within the server chip architecture team. your work will directly influence the next generation of hardware experiences for millions of our company users and cloud customers.the ai and infrastructure team is redefining whats possible. we empower our company customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers, our company cloud customers, and billions of our company users worldwide. we're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for our company cloud, our company global networking, data center operations, systems research, and much more.
responsibilities
plan and execute detailed analysis of cpu workloads within the company cloud infrastructure, analyze trends and map future requirements.
collaborate closely with architecture and modeling owners to understand design specifications and identify critical scenarios related to cpu performance and efficiency.
develop and implement custom workload generation tools and methodologies to simulate real-world usage patterns on our company cloud platforms.
analyze the impact of Machine Learning applications on cpu usage, identifying opportunities for optimization and feature enhancements.
lead the investigation and development of metrics to measure cpu performance and efficiency, presenting findings to stakeholders and contributing to strategic decisions.
Requirements:
minimum qualifications:
phd in electrical and electronics engineering, or equivalent practical experience.
2 years of experience with software development in C ++ programming language.
1 years of experience with data structures or algorithms.
preferred qualifications:
experience in performance modeling, performance analysis, and workload characterization.
experience applying Machine Learning techniques and inference usage models on hardware.
expertise in cpu architecture disciplines such as branch prediction, prefetching, value prediction, and caching policies.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8592791
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