דרושים » תוכנה » SOC input output architect, silicon, cloud

משרות על המפה
 
בדיקת קורות חיים
VIP
הפוך ללקוח VIP
רגע, משהו חסר!
נשאר לך להשלים רק עוד פרט אחד:
 
שירות זה פתוח ללקוחות VIP בלבד
AllJObs VIP
כל החברות >
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
in this role, youll work to shape the future of ai/ml hardware acceleration. you will have an opportunity to drive tpu (tensor processing unit) technology that powers our most demanding ai/ml applications. youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our tpu. you'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on tpu architecture and its integration within ai/ml-driven systems.
our silicon team is driving the future of cloud data center computing. as a system on chip input output ( SOC io) architect, you will help define a new generation of our products. you will have pivotal responsibilities and serve as the organization mobile industry processor interface (mipi) focal point.the ai and infrastructure team is redefining whats possible. we empower our customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers include, cloud customers, and billions of our users worldwide. we're the driving team behind our groundbreaking innovations, empowering the development of our ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for our cloud, global networking, data center operations, systems research, and much more.
responsibilities
evaluate different silicon solutions for executing mipi and other io peripheries: off-the-shelf components, vendor co-developments and custom designs.
drive vendor execution in various engagements: standard component, build to specification, and co-developments.
collaborate closely with software, design, verification, physical design, packaging, and silicon validation stakeholders to ensure that designs are complete, correct, and performant.
create high performance hardware/software interfaces.
collaborate in developing a new SOC.
Requirements:
minimum qualifications:
bachelor's degree in electrical engineering, computer engineering, or equivalent practical experience.
15 years of experience working with mobile industry processor interface ( C -phy and d-phy) architecture.
6 years of experience in people management and developing employees.
experience with system design principles for low latency, low power, throughput, security, and reliability.
cross-functional experience in micro-architecture, design, verification, logic synthesis, and timing closure.
experience with signal integrity and power integrity.
preferred qualifications:
masters degree or phd in electrical engineering or computer engineering.
experience with usb, multi-gigabit ethernet (mgbe), pcie and display port ips.
experience with post-silicon bring-up and lab work.
familiarity with gigabit multimedia serial link (gmsl).
This position is open to all candidates.
 
Hide
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8592839
סגור
שירות זה פתוח ללקוחות VIP בלבד
משרות דומות שיכולות לעניין אותך
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo
Job Type: Full Time
about the job
in this role, youll work to shape the future of ai/ml hardware acceleration. you will have an opportunity to drive cutting-edge tpu (tensor processing unit) technology that powers our company's most demanding ai/ml applications. youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's tpu. you'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on tpu architecture and its integration within ai/ml-driven systems.
as a SOC vision architect in our companys silicon team, you will be at the heart of defining the hardware that powers the next-generation of our companys products. you will bridge the gap between ai research and physical silicon, architecting the image signal processor (isp), codecs and the pixel data path. you will deliver unparalleled image quality while staying within the tight power, performance, and area (ppa) constraints. you will participate in the concept, architecture, documentation, and implementation of a new product.the ai and infrastructure team is redefining whats possible. we empower our company customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity.our companycloud customers, and billions of our company users worldwide.we're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for our company cloud, our company global networking, data center operations, systems research, and much more.
responsibilities
define a flexible imaging pipeline hardware architecture, from the sensor interface (e.g., mobile industry processor interface (mipi)) through the isp, the encoder/decoder, scaling and memory output.
partner with our company research to transform advanced computational imaging algorithms into high-efficiency hardware logic.
conduct trade-off analyses between power, performance, and silicon area to meet thermal envelopes and current limitations.
influence external executive vendor roadmaps, ensuring deep co-optimization between their future products and our company's custom silicon.
lead collaboration across architecture, register-transfer level (rtl), physical design and validation teams.
Requirements:
minimum qualifications:
bachelor's degree in electrical engineering, computer engineering, or equivalent practical experience.
15 years of experience in SOC architecture, specifically focusing on imaging (jpeg), video (h.264, h.265, av1) and image signal processor (isp).
experience in complementary metal oxide semiconductor (cmos) image sensor architecture.
experience in writing architecture specifications.
preferred qualifications:
masters degree or phd in electrical engineering, computer engineering, or a related field.
experience working with various software driver teams.
familiarity with deploying neural networks on specialized hardware (e.g., neural processing units (npus)/tpus) for imaging tasks (e.g., ai-based denoising or super-resolution).
knowledge of mipi interfaces ( C -phy/d-phy) and memory subsystem interactions (dram/lpddr).
knowledge of hardware/software interfaces.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8592765
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo
Job Type: Full Time
about the job
be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
in this role, you will work as part of a research and development team. you will build verification components, constrained-random testing, system testing, and drive verification closure. you will verify digital designs, collaborate closely with design and Verification engineers on projects, and perform direct verification. you will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. you will manage the full life-cycle of verification, which can range from verification planning, TEST execution, to collecting and closing coverage.the ai and infrastructure team is redefining whats possible. we empower our company customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers, our company cloud customers, and billions of our company users worldwide. we're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for our company cloud, our company global networking, data center operations, systems research, and much more.
responsibilities
plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
create and enhance constrained-random verification environments using systemverilog and uvm, or formally verify designs with sva and industry leading formal tools.
identify and write all types of coverage measures for corner-cases.
debug tests with design engineers to deliver functionally correct design blocks.
close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
minimum qualifications:
bachelor's degree in electrical engineering or equivalent practical experience.
8 years of experience with creating and using verification components and environments in standard verification methodology.
experience verifying digital logic at rtl level using systemverilog or Specman /e for fpgas or asics.
preferred qualifications:
master's degree or phd in electrical engineering, or a related field.
3 years of experience with creating and using verification components and environments in standard verification methodology.
experience with verification techniques, and the full verification life cycle.
experience with performance verification of asics and asic components.
experience with application-specific integrated circuit (asic) standard interfaces and memory system architecture.
experience in four or more system on a chip ( SOC ) cycles.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8592833
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo
Job Type: Full Time
about the job
be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
the ai and infrastructure team is redefining whats possible. we empower our company customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers, our company cloud customers, and billions of our company users worldwide. we're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for our company cloud, our company global networking, data center operations, systems research, and much more.
responsibilities
define the block-level design document (e.g., interface protocol, block diagram, transaction flow, pipeline, etc.).
perform register-transfer level (rtl) coding (coding and debug in verilog, systemverilog), function/performance simulation debug, and lint/cdc/fv/upf checks.
participate in synthesis, timing/power closure activities.
participate in TEST plan and coverage analysis of the block and SOC -level verification.
communicate and work with multi-disciplined and multi-site teams.
Requirements:
minimum qualifications:
bachelor's degree in electrical engineering, computer engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience with digital logic design principles, rtl design concepts, and languages, such as verilog or systemverilog.
experience with logic synthesis techniques to optimize rtl code, performance and power, as well as low-power design techniques.
experience with design sign-off and quality tools (e.g., lint, cdc, etc.).
experience with SOC or ip architecture.
preferred qualifications:
master's degree or phd in electrical engineering, computer engineering, Computer Science, or a related field.
knowledge of high-performance and low-power design techniques, assertion-based formal verification, field-programmable gate array (fpga) and emulation platforms, and SOC architecture.
knowledge in one of the following areas such as double data rate (ddr)/low power double data rate (lpddr), high-bandwidth memory (hbm).
excellent problem-solving and debugging skills.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8592851
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
we're the driving team behind groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for google cloud, google global networking, data center operations, systems research, and much more.
responsibilities
define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
perform rtl development (e.g., coding and debug in verilog, systemverilog, vhsic hardware description language (vhdl)), function/performance simulation debug, and lint/cdc/fv/upf checks.
participate in synthesis, timing/power, and fpga/silicon bring-up.
participate in TEST plan and coverage analysis of the block and SOC -level verification.
communicate and work with multi-disciplined and multi-site teams.
Requirements:
minimum qualifications:
bachelor's degree in electrical engineering, computer engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience architecting networking asics from specification to production or equivalent experience.
experience developing rtl for asic subsystems.
experience in micro-architecture, design, verification, logic synthesis, and timing closure.
preferred qualifications:
experience working with design networking: remote direct memory access (rdma) or packet processing and system design principles for low latency, high throughput, security, and reliability.
experience architecting networking switches, end points, and hardware offloads.
experience working with software teams optimizing the hardware/software interface.
experience in a procedural programming language (e.g., C ++, Python, go).
knowledge of tcp, ip, ethernet, pcie and dram.
familiarity with network on chip ( NOC ) principles and protocols (axi, ace, and chi).
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8592780
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
the ml, systems, & cloud ai (msca) organization at our designs, implements, and manages the hardware, software, Machine Learning, and systems infrastructure for all our services (search, youtube, etc.) and our cloud. our end users are , cloud customers and the billions of people who use our services around the world. we prioritize security, efficiency, and reliability across everything we do - from developing our latest tpus to running a global network, while driving towards shaping the future of hyperscale computing. our global impact spans software and hardware, including our clouds vertex ai, the leading ai platform for bringing gemini models to enterprise customers.
responsibilities
utilize performance and power models from the architecture team, as well as lab measurements, to validate and tune performance against established goals.
design and build tests to verify that the SOC design meets those goals.
develop and implement advanced technologies for running benchmark representations on pre-silicon environments.
analyze complex problems, identify core design weaknesses, and drive the resolution of performance issues in both pre- and post-silicon environments.
develop performance measurement frameworks, including key performance indicators (kpis), to produce regular reports and dashboards that support stakeholder decision-making.
Requirements:
minimum qualifications:
bachelor's degree in Computer Science, computer engineering, or electrical engineering, or equivalent experience.
8 years of experience in SOC or central processing unit (cpu) performance and power modeling, analysis, and debugging.
experience with computer architecture, focusing in the areas like interconnects, traffic quality of service (qos), distributed caches, and i/o flows.
experience in programming languages such as C, C ++, or similar.
experience in identifying, troubleshooting, and solving performance problems.
preferred qualifications:
experience with hardware description languages like verilog or systemverilog.
experience in one or more functional areas, such as coherent fabrics (e.g., amba chi/axi), memory controllers (e.g., lpddr5, ddr5), or i/o controllers (e.g., pcie, cxl).
experience in productizing features that enhance the performance or power characteristics of a design.
experience in building fast, accurate SOC /cpu performance models in C ++.
experience in pre-silicon and post-silicon analysis and debugging.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8592868
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
24/02/2026
חברה חסויה
Location: Haifa
Job Type: Full Time
Chips Talk, We Listen
we are a game-changing startup that's giving advanced electronics the power to report on their own health. In a digital world built for autonomous driving, cloud computing, and AI, we depend on computing systems daily. But how can we guarantee their safety, reliability and functionality? we are the first-ever company to provide visibility into next-gen chips while they are operating, based on the power of on-chip monitoring, machine learning, and data analytics.
Here at our company, you'll be part of a team that's unlocking deep insights to make electronics more reliable, efficient, and high-quality. We're trusted by industry leaders in data centers, automotive, communications, and consumer devices - we work with the world's largest and most notable companies in tech.
Why our company is a great place to work:
Fast-paced and impactful: We're a mission-driven startup, so you'll tackle new challenges daily, wear many hats, and see your work directly influence the future of electronics.
Supportive company culture: Learn from the best. Our 200+ team members are experts in their field with a proven track record of success, and they're committed to fostering a collaborative and supportive work environment.
International presence: We're a multinational company with a diverse team across multiple locations around the globe. You'll collaborate on projects with international impact, gaining a global perspective of the tech industry.
Work with industry leaders: Our solutions are used by the biggest names in tech. You'll be part of the team creating the next generation of groundbreaking products.
Cutting-edge playground: We use the latest machine learning, platforms, and tools to push boundaries and achieve breakthroughs.
Real-world impact: Our work keeps data centers, cars, and other critical systems running smoothly. Your work will directly contribute to safer, more reliable electronics.
We are here for the win: Backed by industry veterans and leading investors, we offer a stable and secure work environment with plenty of room for growth.
we are looking for a SoC / IP Architect to shape the next revolution in electronics!
Responsibilities
Define and design architecture: Create the overall SoC/IP architecture based on product and customer requirements and define detailed technical specifications.
Collaborate with cross-functional teams: Work with a variety of teams, including logic design, verification, firmware architecture and development teams, and physical design, to ensure successful execution.
Lead technical discussions and architectural reviews, guiding design and verification teams to deliver scalable, high-quality implementations.
System-level integration: Ensure seamless hardware-software co-design by working on aspects like control paths, interrupt schemes, and debug infrastructure.
Drive architectural decisions that optimize scalability, and future readiness for next-generation applications.
Act as Functional Safety manager, leading the definition,
דרישות:
B.Sc. or M.Sc. in Electrical or Computer Engineering (or related field).
3+ years experience in SOC architectural roles
Technical knowledge: Strong understanding of SoC design flows, and system requirements.
Power and performance analysis: Ability to analyze and balance performance, power, and area trade-offs.
Strong system thinking - ability to move between micro-architecture depth and system-level abstraction.
Hardware and software collaboration: Proven experience working across hardware and software teams to achieve system goals.
Experience defining and documenting architecture specifications, interfaces, and integration flows.
Excellent communication and collaboration skills, with the ability to lead cross-functional discussions and influence stakeholders.
Experienc המשרה מיועדת לנשים ולגברים כאחד.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8559738
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo
Job Type: Full Time
our software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. our products need to manage information at a massive scale, and extend well beyond web search. we're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data Storage, security, artificial intelligence, Natural Language Processing, UI design and mobile; the list goes on and is growing every day. as a software engineer, you will work on a specific project critical to our needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. we need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the Full-Stack as we continue to push technology forward. as a part of the Storage ai/ml organization, you will build the ai/ml specialized Storage infrastructure that supports our clouds most significant business priorities. you will focus on developing high-scale systems designed to meet the emerging requirements of ai and Machine Learning workloads.as part of a new incubation in tel aviv, this team serves as a specialized unit dedicated to exploring and developing new solutions within the ai/ml Storage infrastructure and ecosystem. your goal is to bridge foundational Storage technologies like gcs, rapid and lustre with emerging ai/ml workload needs, operating as a small, focused team to establish technical excellence and provide high value for this critical business pillar.our cloud accelerates every organizations ability to digitally transform its business and industry. we deliver enterprise-grade solutions that leverage our technology, and tools that help developers build more sustainably. customers in more than 200 countries and territories turn to our cloud as their trusted partner to enable growth and solve their most critical business problems.
responsibilities
write and TEST product or system development code.
participate in, or lead design reviews with peers and stakeholders to decide amongst available technologies.
review code developed by other developers and provide feedback to ensure best practices (e.g., style guidelines, checking code in, accuracy, testability, and efficiency).
contribute to existing documentation or educational content and adapt content based on product/program updates and user feedback.
triage product or system issues and debug/track/resolve by analyzing the sources of issues and the impact on hardware, network, or service operations and quality.
Requirements:
minimum qualifications:
bachelors degree or equivalent practical experience.
5 years of experience with software development in one or more programming languages.
3 years of experience testing, maintaining, or launching software products, and 1 year of experience with software design and architecture.
preferred qualifications:
master's degree or phd in Computer Science or related technical field.
5 years of experience with data structures and algorithms.
1 year of experience in a technical leadership role.
experience with file systems and Linux Kernel internals.
experience with ai/ml workloads.
familiarity with cloud computing platforms (e.g., our cloud platform, cloud computing platform).
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8592830
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
2 ימים
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
we have been transforming computer graphics, pc gaming, and accelerated computing for more than 25 years. its a unique legacy of innovation thats fueled by great technology-and amazing people. today, were tapping into the unlimited potential of ai to define the next era of computing. an era in which our gpu acts as the brains of computers, robots, and self-driving cars that can understand the world.
the complexity of the chip has greatly increased over the years. we are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. thesystem -on-chip ( SOC ) group is seeking a top SOC Verification engineer to verify the design and implementation of the worlds leading networking socs. in this position, you will get the opportunity to craft complex networking chips and interact directly with architects, designers, and software engineers across sites. this is your chance to shape the future of computing with a world-class team! as an SOC Verification engineer, you will verify the design and implementation of our SOC technologies in various projects. this position offers the opportunity to have real impact in a dynamic, technology-focused company impacting switches and nic SOC product lines. we are working closely with a wide range of aspects - chip design, dft, backend, verification and production testing. we are working on the most advanced technologies and complex products. our SOC solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.
what you'll be doing:
in this position, you will be responsible for verification of the clock design elements, architecture and micro-architecture using sophisticated verification methodologies.
as a member of our SOC verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (testbenches, bfms, checkers, monitors), execute TEST /coverage plans, and verify the correctness of the design.
collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.
Requirements:
bsc. in electrical engineering or computer engineering.
2+ years of relevant experience.
good understanding of rtl design (verilog)
experience of uvm methodology.
strong debugging, problem solving and analytical skills.
excellent communication and social skills.
ability to work in a geographically diverse team environment.
self motivated, independent and target oriented.
way to stand out from the crowd:
previous experience in SOC and/or verification
experience in developing verification environments and random based verification for unit level and system level using verification tools (simulation tools, verilog, debug tools like simvision/debussy)
background with sv/uvm and Python
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8593268
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Hod Hasharon and Haifa
Job Type: Full Time
With the explosive growth of AI technologies and the Internet industry, data centers have become digital hubs and infrastructures of the Internet industry in the digital economy era. Computing networks, as core components of data centers, have features such as topology, scalability, throughput, reliability, and latency that directly affect data center functionality and performance. The computing cluster networking lab explores architecture and technological innovation for meeting the challenges of future large-scale AI & HPC data centers. .. The labs mission is to lead our company to achieve differentiated competitiveness in high-performance computing cluster network infrastructure, and to support Huawei's industry-leading computing cluster.
Position Overview
In this role, you will be responsible for several teams of architects, engineers and software developers, all working together to conduct state-of-the-art R&D in system and network architecture. As the group lead, you will guide and mentor the individual team leads, and also conduct hands-on work leading architecture, technology innovation and technical planning and of high-performance computing cluster network, which oriented at AI, HPC, and big data.
Responsibilities
You will perform a wide range of duties including:
Architecture Innovation:
Deeply analyzing the advantages and disadvantages of mainstream network systems, to find opportunities for network architecture innovation;
Insight into the technology developing trend of the high-performance computing network field, and leading the corresponding technology planning.
Exploring new architectures of high-performance computing network systems and efficiently integrating communication library, topology, and network protocol to solve performance bottlenecks.
Technical breakthroughs in networking and cluster routing algorithm:
Analyzes computing cluster network performance and leads the development of computing cluster network technologies
Research and optimize the heterogeneous interconnection topology of key computing chips to continuously improve the key competitiveness of Huawei computing heterogeneous chipsets
Responsible for the research of data center network technologies, and guide network topology design and routing algorithm development
Group leadership:
Lead the development of a comprehensive system architecture for AI Fabric and HPC Fabric solutions
Manage and mentor highly skilled team leaders, to ensure that the group operates together in pursuit of common goal
Foster a collaborative and innovative work environment
Provide technical guidance and support to team members
Collaborate closely with cross-functional teams internationally, including hardware,
software, and ucode design teams, to ensure alignment of architectural decisions with
product and platform common objectives
Initiate and supervise collaborations with top academic researchers in Israel and abroad
Stay up to date with emerging technologies and industry trends in AI, HPC and big data industries
Evaluate and recommend technologies and next generation projects
Occasional travel related to ongoing projects, seminars, conferences etc.
Requirements:
At least 10 years of hands-on experience in system architecture design, or equivalent research experience
Demonstrated experience in leading R&D team
Familiarity with high-performance computing cluster services and system architectures, such as AI, HPC and big data.
In-depth understanding of computer networks, communication libraries, and design of AI or HPC cluster networks
Key qualifications you hold include:
Ability to work in a team environment; actively seek out resolution to issues with the team and work co-operatively to build a coherent system; Team-working and excellent inter-personal communication skills.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8550329
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
2 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
our company has been redefining computer graphics, pc gaming, and accelerated computing for more than 25 years. its a unique legacy of innovation thats fueled by great technology-and amazing people. today, were tapping into the unlimited potential of ai to define the next era of computing. an era in which our gpu acts as the brains of computers, robots, and self-driving cars that can understand the world. doing whats never been done before takes vision, innovation, and the worlds best talent. being an employee means being part of a diverse and encouraging setting that encourages everyone to perform at their peak. come join the team and discover how you can develop a lasting influence on the world. 
our company is in search of a Senior Software Architect - a creative, forward-thinking, and practical researcher to improve the framework for widespread llm learning and prediction. as part of our dynamic e2e architecture group, you will design and optimize systems driving generative ai workloads, working at the intersection of software and hardware on some of the most advanced gpu clusters worldwide. you will define how ai models are deployed and scaled in production using the spectrum-x networking platform, influencing decisions from inter-node communication and compute scheduling to system -level optimization. this is an opportunity to collaborate with best-in-class engineers and researchers and shape the future of generative ai in real-world applications. your work will make a lasting impact by enabling generative ai technologies to reach real-world applications and improve global computing capabilities. 
what youll be doing: 
lead research and development of end-to-end networking solutions for distributed ai training and inference at scale, with a focus on job completion time, failure resiliency, telemetry, scheduling, and placement.
analyze current deployments, develop prototypes, and recommend architectural improvements. 
stay abreast of the latest research; become the teams authority in emerging networking techniques and technologies. 
design, simulate, and validate new systems using novel, scalable network simulator nsx. 
develop and TEST prototypes on large-scale gpu clusters (e.g., israel-1). 
collaborate across hardware, firmware, and software teams to translate ideas into real networking product features. 
publish patents and present research at leading conferences.
Requirements:
what we need to see: 
m.sc. or phd (preferred) in Computer Science, electrical/computer engineering, or related field-or b.sc. with research experience and publications.
5+ years of relevant experience.
deep expertise in networking and communication internals (nccl, rdma, congestion control, routing). 
strong software engineering skills in C ++ and/or Python. 
excellent system -level design and problem-solving abilities. 
outstanding communication and collaboration skills across technical domains.
ways to stand out from the crowd: 
proven passion for solving sophisticated technical problems and delivering impactful solutions. 
record of publications in top-tier conferences. 
experience in designing and building large-scale ai training clusters. 
post-phd research experience 
practical understanding of deep learning systems, gpu acceleration, and ai model execution flows.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8593805
סגור
שירות זה פתוח ללקוחות VIP בלבד