דרושים » הנדסה » Senior ML Algorithm Engineer

We are looking for a Senior Machine Learning Algorithm Engineer who is passionate about solving complex, real-world problems at the intersection of hardware and software.
Location: Haifa \ Tel-Aviv in hybrid model.
Responsibilities
Develop advanced ML algorithms using data from our company Agents embedded in silicon. Example domains include:
Lifetime predictions
Clustering and dimensionality reduction
Parametric modeling and screening
Time-series forecasting
Lead end-to-end algorithm lifecycle: ideation → research → POC → design → implementation → validation → deployment.
Collaborate closely with cross-functional teams and directly with customers to continuously refine and enhance deployed solutions.
Drive integration of AI-enhanced tools and intelligent pipelines into ML workflows.

we are a game-changing startup that's giving advanced electronics the power to report on their own health. In a digital world built for autonomous driving, cloud computing, and AI, we depend on computing systems daily. But how can we guarantee their safety, reliability and functionality? we are the first-ever company to provide visibility into next-gen chips while they are operating, based on the power of on-chip monitoring, machine learning, and data analytics.
Here at our company, you'll be part of a team that's unlocking deep insights to make electronics more reliable, efficient, and high-quality. We're trusted by industry leaders in data centers, automotive, communications, and consumer devices - we work with the world's largest and most notable companies in tech.
We are looking for a Senior Machine Learning Algorithm Engineer who is passionate about solving complex, real-world problems at the intersection of hardware and software.
Location: Haifa \ Tel-Aviv in hybrid model.
Responsibilities
Develop advanced ML algorithms using data from our company Agents embedded in silicon. Example domains include:
Lifetime predictions
Clustering and dimensionality reduction
Parametric modeling and screening
Time-series forecasting
Lead end-to-end algorithm lifecycle: ideation → research → POC → design → implementation → validation → deployment.
Collaborate closely with cross-functional teams and directly with customers to continuously refine and enhance deployed solutions.
Drive integration of AI-enhanced tools and intelligent pipelines into ML workflows.

we are a game-changing startup that's giving advanced electronics the power to report on their own health. In a digital world built for autonomous driving, cloud computing, and AI, we depend on computing systems daily. But how can we guarantee their safety, reliability and functionality? we are the first-ever company to provide visibility into next-gen chips while they are operating, based on the power of on-chip monitoring, machine learning, and data analytics.
Here at our company, you'll be part of a team that's unlocking deep insights to make electronics more reliable, efficient, and high-quality. We're trusted by industry leaders in data centers, automotive, communications, and consumer devices - we work with the world's largest and most notable companies in tech.
We are looking for a Senior Machine Learning Algorithm Engineer who is passionate about solving complex, real-world problems at the intersection of hardware and software.
Location: Haifa \ Tel-Aviv in hybrid model.
Responsibilities
Develop advanced ML algorithms using data from our company Agents embedded in silicon. Example domains include:
Lifetime predictions
Clustering and dimensionality reduction
Parametric modeling and screening
Time-series forecasting
Lead end-to-end algorithm lifecycle: ideation → research → POC → design → implementation → validation → deployment.
Collaborate closely with cross-functional teams and directly with customers to continuously refine and enhance deployed solutions.
Drive integration of AI-enhanced tools and intelligent pipelines into ML workflows.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will help build SoCs by driving quality and reliability processes from the Integrated Circuit (IC) perspective. Working with various cross-functional teams, you will develop quality and reliability specifications, develop and deploy design guidelines, and develop and execute test plans. Within the larger organization, you will collaborate with global hardware quality and reliability, silicon design, validation, and engineering teams. You will have an understanding of IC flows, wafer processing, testing, qualification, yield, reliability, and failure analysis.
The ML, Systems, and Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Define and lead qualification hardware and test developments in front of internal teams and external vendors.
Define and execute Silicon and package qualification activities (e.g., HTOL, ELFR, ESD/LU, b/HAST, THB, etc.).
Extract, manipulate, and analyze large volumes of data from Silicon and package qualification programs (e.g., HTOL, ELFR, ESD, LU, UHAST, TCT, etc.), High Volume MFG, and field returns to identify failure mechanisms, reliability trends, and opportunities for yield, quality, and reliability improvement.
Own cross-functional investigation of IC quality and reliability issues to identify root causes and develop solutions (e.g., RMA Triage, Analytics, Failure Analysis, etc.).
Develop and implement physics-based statistical Quality and Reliability models (e.g., ELF, TDDB, NBTI, HCI, Time zero failures, etc.) to predict silicon device failure mechanisms, degradation patterns, and lifetime behaviors.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Power and Signal Integrity Engineer, you will be responsible for the design and characterization of signal and power integrity of our IC designs. You will design the external electrical interfaces of the device, from their Signal/Power-integrity and electrical usage perspectives and set up methodologies, perform simulations, silicon characterization and correlations to ensure our IC designs meet systems design budgets and achieve the highest performance. You will work with systems architects, ASIC design, systems engineers, and partner cross-functionally with teams and external vendors/partners.The ML, Systems, and Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.
Simulate high speed interface electrical behavior using HSPICE or other circuit simulators.
Execute lab measurements utilizing test equipment like oscilloscopes, Vector Network Analyzers (VNA), Time Domain Reflectometers (TDR) , Spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.
Establish design rules and guidelines for optimal signal/power integrity during PCB and package layout, ensuring high production yield and reliability.
Document design specifications, analysis results, and validation reports to ensure compliance with standards and for future reference, while collaborating extensively with cross-functional teams, including ASIC architects, digital/analog designers, physical design/layout engineers, and system engineers.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our portfolio spans CPU, TPU, Networking and other key data center technologies, which power our company's most demanding Compute and AI/ML applications.
In this role, youll work to shape the future of strategic Data Center silicon. Youll be an early and key contributor in a nascent high-growth team that pushes boundaries, developing advanced custom IP and solutions. You will require expertise in one or more of the following areas: wireline communications, analog circuit design, Digital Signal Processor (DSP) design and algorithms, signal integrity, transmission line theory, advanced analog and mixed-signal modeling, high-speed clocking, Clock and Data Recovery (CDR), equalization, high-speed input/output (IO) industry standards. Your role has a significant component of cross-collaboration with a broad set of cross-functional organizations. You'll bring out the best in the team to deliver designs that serve many of our companys advanced data center products.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Architect and design high-speed analog/digital circuits (ADC, DAC, PLL, CDR, DSP), including optimizing for Power, Performance, and Area (PPA).
Model and simulate channel behavior (S-parameters), signal integrity, and jitter using tools like MATLAB.
Bring up new silicon, characterize performance, and test for electrical compliance in lab environments.
Work with packaging, board design, and firmware teams to ensure seamless integration into System-on-Chips (SoCs).
Adhere to standards like IEEE or OIF for high-speed protocols and optimize power consumption.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work to shape the future of the Data Center silicon. Our portfolio spans CPU, TPU, Networking and other key data center technologies, which power our company's most demanding Compute and AI/ML applications. You will be a key contributor in the growth team, developing advanced custom IP and solutions. We seek experienced applicants with expertise in one or more of the following areas: wireline communications, analog circuit design, DSP design and algorithms, signal integrity, transmission line theory, advanced analog and mixed-signal modeling, high-speed clocking, Clock and Data Recovery (CDR), equalization, high-speed IO industry standards. You will collaborate with a set of cross-functional organizations. You will serve many of our companys advanced data center products.The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users, Cloud customers and the billions of people who use our companyservices around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Architecture and design of high-speed analog/digital circuits (ADC, DAC, PLL, CDR, DSP), including optimizing for Power, Performance, and Area (PPA).
Model and simulate channel behavior (S-parameters), signal integrity, and jitter using tools like MATLAB.
Bring up new silicon, characterizing performance, and testing for electrical compliance in lab environments.
Work with packaging, board design, and firmware teams to ensure integration into System-on-Chips (SoCs).
Adhere to standards like Institute of Electrical and Electronics Engineers(IEEE) or Optical Internetworking Forum (OIF) for protocols and optimizing power consumption.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan and execute the verification of digital design blocks by understanding specifications and working with design engineers to define key verification scenarios.
Develop, execute, and debug full-chip/system on a chip (SoC) tests on emulation platforms.
Collaborate with design engineers to debug tests and ensure functional correctness of design blocks.
Define and implement various coverage measures to capture stimulus and corner-case scenarios. Work with software and post-silicon validation teams to reproduce failures on emulation.
Drive coverage analysis to identify verification gaps and demonstrate progress towards tape-out. Explore new verification and emulation methodologies and implement them.

We are seeking a capable and experienced Algorithm engineer to join our R&D team. The engineer will be part of a team responsible for the core autonomy parts of the product responsible for developing the foundational algorithms that guide our autonomous vehicles. This role is a part of the group that oversees Motion Planning, Decision-Making, Localization, and Control, blending traditional robotics with state-of-the-art AI to solve the most challenging problems in autonomous driving. This is an opportunity to architect and deliver the core autonomy stack for a scalable, mapless L3-L4 system. You will work on cutting-edge algorithms, including Agentic AI and large-scale models, and see your innovations deployed on public roads in our global fleet of cars and buses. Responsibilities Be part of the development of four key domains: Motion Planning and Decision-Making: Oversee the trajectory planner and the decision-making module that sets the context for vehicle behavior. Localization: Guide the development of high-frequency, high-accuracy vehicle state estimation using advanced sensor fusion algorithms. Control: Supervise the design and implementation of the vehicle's lateral and longitudinal controllers. Drive innovation by integrating state-of-the-art (SOTA) methodologies, including Agentic AI, vision language models (VLMs), transformers, multi-agent prediction, trajectory optimization, uncertainty management, and safety-aware algorithms.
* Be part of a group involving multiple engineers, from initial research and prototyping to robust deployment and validation.
* Be part of a group in charge of complex data pipelines, from collection and annotation to model training and evaluation.

our company's custom-designed machines make up one of the largest and most powerful computing infrastructures in the world. The Hardware Testing Engineering team ensures that this cutting-edge equipment is reliable. In the R&D lab, you design test equipment for prototypes of our machinery and develop the protocols used to scale these tests for the entire global team. Working closely with design engineers, you give input on designs to improve our hardware until you're sure it meets our company's standards of quality and reliability.
As a Senior SoC System Test Engineer, you will help to integrate SoC technologies into devices and drive manufacturing test flows to assure performance and screen devices. You will drive yield improvement, cost optimization, and work closely with cross-functional teams to ensure the optimal test coverage in production to ensure high quality SoCs. You will work with various groups to deploy screening methodologies and flows for data processing, analytics, and diagnostics. You will drive the release of cost effective production test solutions into mass production to hit yield and quality goals.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Collaborate with Architecture, Design and Verification teams to develop new product bring-up, validation, characterization, qualification strategies, and manufacturing test solutions for new High Performance Computing (HPC) products in advanced process technologies.
Validate test solutions on system-level platforms and prepare for mass production.
Work with hardware and software teams to evaluate functional device yield and performance across various operating conditions.
Develop effective production screens to reduce Defective Parts per Million (DPPM).
Assess test escapees and localize failures, implement containment measures in the manufacturing test flow, and partner with manufacturing, test, quality and reliability teams to identify root cause and implement corrective actions.