we're a global leader in smart energy technology, with over 3,000 employees, offices in 34 countries, and millions of installations worldwide. Our innovative solutions include solar inverters, battery Storage, backup systems, EV charging, and AI-based energy management. We're committed to making clean, green energy the primary power source for homes, businesses, and beyond. With the growing demand for electricity, the need for smart, clean energy sources is constantly rising. SolarEdge offers amazing opportunities to develop your skills in a multidisciplinary environment, covering everything from research and development to production and customer supply. Work with talented colleagues, tackle exciting challenges, and help create a sustainable future in an industry that's always evolving and innovating. Join us and be part of a company that values creativity, agility, and impactful work. What will you be doing:
* Taking part in the development of the companys flagship products
* Responsibility for the development from the design stage to the final product, including all tests necessary to deliver the product to mass production (electronic tests, thermal tests, EMI tests).
* Working with other teams inside the Hardware division and outside of it (such as the Mechanical department, Software and more)

Country:
Israel
City:
Modiin

Join our company as a Hardware Engineer and contribute to the design and development of cutting-edge hardware solutions for renewable energy systems. Work in a dynamic environment to enhance the efficiency and performance of our products.
Responsibilities:

* Design and develop new hardware components and systems for solar energy products.
* Collaborate with cross-functional teams to define hardware requirements and specifications.
* Conduct testing and validation of hardware designs to ensure functionality and reliability.
* Troubleshoot and resolve hardware-related issues during the development and production phases.
* Document design processes and create detailed hardware specifications for manufacturing.
* Participate in the continuous improvement of hardware development processes and methodologies.
Country:
Israel
City:
Modiin

We are looking for a senior hardware engineer to join our av platform hw development group in israel to design the next generation of autonomous driving systems. what will your job look like?
responsible for specifying the hardware for our autonomous driving systems
lead the hw design process: product specification, electrical schematics, component selection, layout, hands-on testing in a lab environment, verification, accompanying production and qualification processes
define signal integrity simulations (lpddr4, mipi, fpd-link, etc.), perform power integrity (dc drop, pdn ac analysis) and analog simulations (like spice).
manage the technical interface with our customers to derive the product hardware requirements
work in collaboration with all the project disciplines: system architecture, mechanical and thermal, software (networking and algorithms), safety and reliability.

The production TEST team - responsible for the definition, development, and deployment of production TEST operations for the worlds most advanced socs for adas and self-driving vehicles.
this is your opportunity to join a team during its initial forming stage and leave your mark as we assume full ownership for its silicon production operations to enable high volume manufacturing for cutting-edge automotive products.
what will your job look like?
work closely with design and TEST engineers from the earliest development phases to review chip electrical and mechanical specifications and define the hardware architecture and requirements for load boards (lb) and probe cards (pc).
lead and oversee all aspects of lb and pc development, including schematics, bom selection, pcb layout, pi/si simulations, and mechanical design.
define, guide, and validate testsocket requirements, specifications, design, and electrical performance.
establish electrical and mechanical specifications for custom RF modules integrated into the complete TEST system architecture.
manage supplier interactions and logistics, ensuring accurate tracking of manufacturing status, delivery schedules, Quality Assurance, and repair/rma processes.
own hardwarereadiness activities, including validation, qualification, and release of TEST hardware into engineering and production environments.
support postsilicon testprogram debug efforts, resolving hardwarerelated issues and enabling timely delivery of samples to internal and external customers.

Help shape how AI data centers are powered. At our company, we're a global leader in smart energy technology, with over 3,000 employees, offices in more than 20 countries, and millions of installations worldwide. we are expanding its innovation into the fast-growing world of AI data -center power infrastructure. Building on our leadership in solar, Storage, and power electronics, we are creating a next-generation Power Ecosystem - integrating Solid-State Transformers (SST), Battery Energy Storage Systems (BESS as UPS), and advanced power-conversion platforms designed for the AI era. What will you be doing:
* Taking part in the development of the companys flagship products
* Responsibility for the development from the design stage to the final product, including all tests necessary to deliver the product to mass production (electronic tests, thermal tests, EMI tests).
* Working with other teams inside the Hardware division and outside of it (such as the Mechanical department, Software and more)
Country:
Israel
City:
Modiin

What youll be doing:
Working closely with product design engineers, you'll perform PCB layout of high speed/high-density value-conscious PCBs for all our business units (GPU Desktop, Notebook, Automotive, Professional, Data Center, Deep Learning, and AI), all using Cadence PCB design tools.
Focus will be on the complete development of CAD layout from symbol creation, floor planning, and detailed component placement, constraints management, with a concept of topology and signal/trace integrity.
You will be responsible for the design releases required generation of artwork files, ODB++, and electronic PCB documentation.
Your designs will need to follow SI constraints, EMI/RFI control and FCC, UL and European regulations, IPC specifications and NRC regulations.

What youll be doing:
Working closely with product design engineers, you'll perform PCB layout of high speed/high-density value-conscious PCBs for all business units at NVIDIA (GPU Desktop, Notebook, Automotive, Professional, Data Center, Deep Learning, and AI), all using Cadence PCB design tools.
Focus will be on the complete development of CAD layout from symbol creation, floor planning, and detailed component placement, constraints management, with a concept of topology and signal/trace integrity.
You will be responsible for the design releases required generation of artwork files, ODB++, and electronic PCB documentation.
Your designs will need to follow SI constraints, EMI/RFI control and FCC, UL and European regulations, IPC specifications and NRC regulations.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next-generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Lead the schematic capture and component selection for high-density, multi-layer PCBs (20+ layers) incorporating high-power ASICs (TPUs/CPUs), FPGAs, and high-speed memory (HBM/DDR5).
Design and validate high-speed interfaces including PCIe Gen 6.0/7.0, 400G/800G/1.6T Ethernet (PAM4). Collaborate with Signal Integrity (SI) engineers to define routing constraints and stack-up.
Design multi-phase power regulators (VRMs) capable of delivering >1000A currents with fast transient response for AI processors.
Work with PCB layout designers to guide placement and routing of critical signals and power planes.
Lead the lab bring-up of first-silicon/first-board by debugging hardware issues using oscilloscopes, TDRs, and logic analyzers to root-cause failures to component, assembly, or design issues.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will help to manufacture the SoCs that power these data centers by developing and deploying comprehensive manufacturing test and data analytics solutions for high volume manufacturing at wafer fabs and OSATs. This is an opportunity to create silicon in the most advanced technologies and follow it into the field to close the loop back to design and test for the next generation of chips. You will help to integrate SoC technologies into devices and drive manufacturing test flows to assure performance and screen devices. You will drive yield improvement, cost optimization and work closely with cross functional teams to ensure the optimal test coverage in production to ensure high quality SoCs. You will have an understanding of IC flows, wafer processing, testing, qualification, diagnostics, and failure analysis. You will help design, deploy and maintain hardware required to screen high performance compute silicon at various stages of the manufacturing pipeline.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Manage ATE platform setup (including loadboard/probecard design) and change kit, SLT bench platform, and handler.
Identify and screen potential vendors (including technological and budgetary assessment) and track and verify progress at all stages of the design.
Define probecard and loadboard requirements based on testing strategy, accounting for test time, tester memory, and budget.
Review SI/PI simulations and final design signoff.
Validate probecard and loadboard hardware and open testing pipeline.

which department will you join?
our hw team - a group designing the eyeq chips for adas and autonomous cars. the group is responsible for all disciplines of development, including but not limited to logic design, design verification, microarchitecture, analog and circuit design and layout, physical and structural design ( backend ), product and TEST engineering.
each physical design engineer has an end to end responsibility from definition, execution & full signoffs, working closely with design & architecture teams for constraints development, design review & rtl modifications to achieve converges were looking for a physical design engineer to join the growing physical design team, responsible for state of the art SOC design from definition to tape-out. what will your job look like:
hands-on physical design block owner from rtl to gds.
floorplan exploration with guidance and collaboration with Front-End and architecture teams.
sta: work with fe and floor planner to manage block and top level constraints and 1st level of timing analysis.
synthesis exploration and final synthesis netlist: scan insertion @ synthesis, clean checks from lint, upf & spyglass.
place & route: from synthesis netlist to final layout and signoff verification with target to achieve best power performance and area.