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לפני 4 שעות
Location: Yokne`am and Tel Aviv-Yafo
Job Type: Full Time
We are hiring a skilled Senior DPU Performance Validation Engineer for our DPU product lines. This includes chip architecture performance characterization, debug, and validation across single-die and multi-die systems. Working in the Network Silicon Engineering group, you will be responsible for debugging, analyzing, and validating performance and functional behavior of current and future our company silicon devices. You will collaborate with Chip Design, Verification, FW, and Architecture teams to ensure successful product development with bold product cycles. The qualified candidate should be comfortable working in Simulation and Emulation environments, with strong skills in RTL-level debug, waveform analysis, and system-level performance root cause analysis.
What you will be doing:
Learn and analyze system-level operation of our company DPUs
Debug and root-cause performance issues in pre-silicon environments, across RTL, waveform traces, and multi-die system simulations.
Collaborate closely with design, verification, architecture, and performance modeling teams to isolate and fix issues.
Develop and improve validation methodologies for performance experiments and data collection.
Automate repetitive debug and validation tasks to scale coverage and efficiency.
Requirements:
B.Sc. in Electrical Engineering, Computer Engineering, or equivalent
5+ years of experience in ASIC development/validation.
Strong background in ASIC debug, including reading RTL, analyzing waveforms, and root-causing functional or performance issues.
Hands-on experience with performance validation and analysis at the system level (die-level or multi-die systems).
Proficiency with Python and C/C++ in a Linux environment.
Excellent interpersonal skills and ability to work optimally as part of a multi-functional team.
Ways to stand out from the crowd:
Shown expertise in performance modeling, traffic generation, or architecture studies.
Experience with modern interconnects and protocols (e.g., PCIe, Ethernet, CHI).
Familiarity with emulation platforms (e.g., Palladium, Veloce, FPGA prototyping).
Passion for experimental work, data-driven validation, and creative problem solving.
This position is open to all candidates.
 
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Location: Yokne`am
Job Type: Full Time
We seek a V&V Engineer with a strong background in validation to join the Interconnect validation team. This position will be part of the Product Engineering team that crafts and integrates software tests for our company networking products into the production lines. You will handle various projects across teams, complete new lab setups, review the HW design, build validation plans, implement automated tests, perform manual scenarios, and report bugs. Are you passionate about attention to detail and taking ownership of end-to-end validation for our company interconnect products? Join our team and bring your expertise to life!
What you'll be doing:
Collaborate with multi-functional teams across engineering, software development, and HW to identify test requirements
Define and build setup topologies for appropriate product coverage
Build a validation plan, complete, and integrate tests for the new interconnect products to address the business needs
Debug SW & HW failures during the validation and take action to address it
Report bugs found during validation, assist with reproduction, and debug to understand the root cause, and follow up to close it
Deploy the product validation into the nightly automation tests and track during the daily meeting.
Requirements:
BA / BSc in Engineering Science or equivalent experience
5+ years of experience in validation and system engineering
Hands-on experience with nightly runs and automated tests
Strong problem-solving, quantitative, and debugging abilities.
Independent, responsible worker, able to plan and complete
Excellent communication and presentation abilities.
Proficient in English, both written and spoken.
Experience in validation for both HW and SW applications
Ways to stand out from the crowd:
Experience in Post-Silicon validation
Background with Jenkins / Robot-Framework / Jira / Testrail
Experience with production lines and HW processes
Hands-On LINUX systems and programming experience in one programming language (Python, C#)
Experience in Data Analysis.
This position is open to all candidates.
 
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7 ימים
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We operate in true startup mode: fast-paced, ambitious, and deeply technical. The project is complex and schedule-challenging across architecture, RTL, verification, and system design and we are looking for a Senior Verification Engineer who wants to work hard, move fast, and help build something truly new.

The Senior Verification Engineer will join a high-end team responsible for verifying a high-performance controller ASIC at the core of this new computational paradigm.

Your Day to Day:
Define, architect, and develop advanced verification environments and flows using SystemVerilog UVM.
Build block-level, subsystem-level, and full-chip verification environments with reusable methodology.
Develop coverage-driven verification strategies and automation infrastructure.
Work closely with design, architecture, algorithms, and software teams to define functionality and corner cases.
Drive testplan creation, functional coverage definition, and closure across multiple complex blocks.
Debug intricate logic interactions, multi-clock structures, and high-speed data paths.
Contribute to verification methodology, tooling, infrastructure, and continuous improvement.
Participate in a fast-moving, startup-style environment where deep technical ownership and rapid iteration are essential.
Requirements:
Required:
At least 5 years of experience in functional verification.
At least 3 years of hands-on experience with UVM / SystemVerilog.
BSc/MSc in Electrical Engineering, Computer Engineering, or Computer Science.
Proven track record in planning, executing, tracking, and closing complex verification tasks.
Strong understanding of coverage-driven verification methodologies.
Excellent problem-solving and debugging skills.
Experience working in Linux environments.
Strong communication skills and comfort working cross-functionally.
Self-motivated, detail-oriented, and capable of deep ownership.
Fluent in English, both verbal and written.

Advantages:
Experience verifying high-speed ASICs, multi-clock systems, and complex synchronization schemes.
Familiarity with high-speed interfaces such as PCIe, Aurora, Ethernet PHYs, or custom SERDES links.
Experience in full-chip or SoC-level verification.
Knowledge of scripting languages (Python, Perl, Tcl).
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers , our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
8 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering.
Experience with verification techniques, and the full verification life cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with Application-Specific Integrated Circuit (ASIC) standard interfaces and memory system architecture.
Experience in four or more System on a chip (SOC) cycles.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a SoC Design Verification Engineer, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure.
As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers on projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertion (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
4 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital systems using standard IP components/interconnects (microprocessor cores, hierarchical memory subsystems).
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience with verification techniques, and the full verification life-cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with ASIC standard interfaces and memory system architecture.
This position is open to all candidates.
 
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חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
Were looking for a skilled and motivated Verification & Validation (V&V) Engineer to join our multidisciplinary engineering team.
In this role, youll design and execute validation strategies ensuring our advanced computer vision and backend systems meet the highest standards of quality, performance, and reliability. Youll collaborate closely with software, hardware, and research teams to bring our innovative store automation solutions from lab to production.
A day in the life
Design and implement test plans and validation procedures for our AI-based perception and backend systems.
Develop and maintain automated testing frameworks and tools using Python.
Create test scripts to validate end-to-end system performance, functionality, and reliability.
Collaborate with development, product, and operations teams to ensure smooth integration and release cycles.
Analyze test data, identify issues, and work with developers to resolve defects efficiently.
Participate in live store validation and field testing to confirm system robustness in real-world environments.
Contribute to the continuous improvement of testing methodologies and processes.
Requirements:
You bring to the table
Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or a related field - Must
Strong Python coding skills for automation, scripting, and data analysis.
2+ years of experience in Verification & Validation, QA, or Test for complex software or embedded systems.
Solid understanding of testing methodologies, regression testing, and validation metrics.
Experience with CI/CD tools (e.g., Jenkins, GitLab CI) and version control systems (Git).
Familiarity with Linux-based systems and networking fundamentals.
Strong analytical, problem-solving, and communication skills, with a detail-oriented mindset.
Nice to have
Experience testing computer vision, machine learning, or sensor-based systems.
Background in large-scale distributed or real-time data processing environments.
Familiarity with Docker, Kubernetes, or cloud infrastructures (AWS, GCP, or Azure).
Understanding of hardware/software integration and system-level testing.
Exposure to Agile methodologies and test-driven development (TDD) principles.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Design Verification Engineer, you will work as part of a Research and Development team, and will build verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers in projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification which can range from verification planning, test execution or collecting, and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers , our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog/UVM, or Specman.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Lead coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
3 years of experience verifying digital logic at RTL level using SystemVerilog, or Specman/E for FPGAs or ASICs.
Experience creating and using verification components and environments in standard verification methodology.
Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
Preferred qualifications:
Masters degree in Electrical Engineering, Computer Science, or a related field.
Experience with UVM, SystemVerilog, or other scripting languages (e.g., Python, Perl, Shell, Bash, etc.).
Experience with CPU implementation, assembly language, or compute System on a Chip (SOC).
This position is open to all candidates.
 
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19/11/2025
Location: Yokne`am
Job Type: Full Time
Our Networking Software Group is rapidly growing, and we are hiring a Software Engineer for the InfiniBand Switch Software Development team. Come and join a diverse group of engineers spread across the globe who come together in small close knit teams to innovate and develop groundbreaking solutions.

As a member of the team, you will be a part of a cutting-edge Python-based SW project using advanced techniques to solve complex issues. You will gain unique knowledge of how operating systems work, Linux kernel and how large scale networks are constructed. Teams utilize the latest software engineering methodologies and tools in an agile fashion to release on time. Are you ready for this challenge? The Networking Hardware Acceleration team develops a cutting-edge, high speed API for NVIDIAs Network Interface Cards (NICs). We power foundational projects like DPDK and DOCA-Flow, driving next-generation networking performance. Join us to gain deep insights into NVIDIAs hardware acceleration technology and make a meaningful impact on both software and hardware innovation.

What Youll Be Doing:
Learn new networking features, plan their verification strategy, and implement it on top of a Python-based in-house developed environment.
Design, develop, optimize, and maintain an OS/Kernel verification testing platform.
Collaborate with team members, architects, design, QA teams, and customers (both external and internal).
Innovate! We are always looking for new ways to make NVIDIA's Networking driver products shine in customers' eyes.
Requirements:
What We Need To See:
B.S. degree or equivalent experience in Engineering/Computer Science/related field.
+1 years of relevant experience
Strong technical abilities, problem-solving, design, coding, and debugging skills.
Ability to lead feature development, take full ownership of tasks from A-Z and deliver independently with minimum supervision.
Great teammate with strong interpersonal skills.

Ways To Stand Out Of The Crowd:
Proven experience in Python programming.
Knowledge in Networking protocols and Linux kernel.
Experience in software verification or validation.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a CPU Design Verification Engineer, you will work as part of a Research and Development team building verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify complex digital designs. You will collaborate with design and verification engineers in active projects and perform verification. You will be responsible for the full lifecycle of verification which can range from verification planning, test execution, or collecting and closing coverage.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our company platforms, we make our company's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Apply close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
Experience creating and using verification components and environments in standard verification methodology.
Experience verifying digital logic at Register Transfer Level (RTL) level using SystemVerilog or Specman/E for Field Programmable Gate Arrays or ASICs.
Preferred qualifications:
Masters degree in Electrical Engineering or Computer Science.
Experience with Universal Verification Methodology (UVM), SystemVerilog, or other scripting languages (e.g., Python, Perl, Shell, Bash, etc.).
Experience with CPU implementation, assembly language, or compute SOCs.
This position is open to all candidates.
 
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לפני 5 שעות
Location: Yokne`am
Job Type: Full Time
Our Validation and qualification team in Israel is looking for a Hardware Practical Test Engineer to join our team. The team leads the development of networking infrastructure for our companys next-generation data centers, focusing on accelerated performance and optimized end-to-end GPU connectivity. We are looking for a hands-on and diligent Practical engineer with strong lab skills who enjoy working in a dynamic, multidisciplinary environment.
What youll be doing:
Perform acceptance tests for our networking products with a focus on optical transceivers
Operate lab equipment such as power supplies, multimeters, and test benches
Document test results and communicate findings clearly to engineering teams
Ramp up a new workstation and solve setup issues
Work closely with electrical, mechanical, thermal, and system engineers
Requirements:
Electrical Engineer or Practical Engineer certificate (graduated) or equivalent experience.
At least 2 years of hands-on experience in a hardware lab environment
Proven experience with lab equipment and board-level debugging
Ability to understand schematics
Strong problem-solving skills and team work mindset
Good technical English for reading datasheets and writing reports
Ways to stand out from the crowd:
Knowledge of electro-optical devices (Lasers and Detectors)
Experience with test automation.
Capability to collaborate effectively in a fast paced and ever-changing environment.
This position is open to all candidates.
 
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לפני 4 שעות
Location: Tel Aviv-Yafo
Job Type: Full Time
our company has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. Its a unique legacy of innovation thats fueled by great technologyand amazing people. Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. As a worker, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
Join our company and become a pivotal part of our Networking Silicon engineering team in Tel Aviv, Israel. We are renowned for developing the industry's top high-speed communication devices, known for their outstanding efficiency and minimal latency. This role offers an outstanding opportunity to be involved in groundbreaking projects, collaborating with versatile experts to foster innovation and excellence. As a Senior Chip Design Verification Engineer, you will be immersed in a dynamic and encouraging environment where your efforts will have a meaningful impact.
What you'll be doing:
Play a crucial role in developing our company's next-generation chip controller.
Engage in building and verification tasks within a challenging, multi-disciplinary context.
Collaborate closely with cross-functional teams to advance our company's networking and GPU networking chips and systems.
Drive the implementation of sophisticated verification environments to ensure flawless functionality.
Mentor and guide junior engineers, encouraging a collaborative and inclusive team atmosphere.
Requirements:
B.Sc. or M.Sc. in Computer Engineering, Electrical Engineering, or Communication Engineering, or equivalent experience.
A minimum of 5 years of proven experience in ASIC Verification.
High proficiency in English.
Demonstrated ability to work well within a team, exhibiting strong communication and interpersonal skills.
A proactive and ambitious approach, with strong attention to detail and a dedication to excellence.
Background in Specman advantage
Knowledge in industry Standard Protocol such as I2C, GPIO, Tester, AXI and RMII - advantage.
Knowledge in HDL (Verilog/VHDL) advantage.
This position is open to all candidates.
 
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