דרושים » מדעים מדוייקים » Junior Signal and Power integrity Engineer

We are looking for highly motivated Electrical Engineering graduates, or engineers with up to 3 years' experience in related fields, to join our growing team specializing in Signal Integrity and IC Package Design. The position offers a unique entry point into a diverse and multidisciplinary domain

Key job responsibilities
As a SIP engineer, you will be involved in:
Work on advanced high-speed interfaces such as PCIe, DDR and Ethernet.
End-to-end solution of high-speed interfaces; from floor-planning at the DIE level, through Package and PCB routing, addressing both robust SI/PI considerations as well as optimizing layout routing.
Signal and power integrity modeling and simulation of high-speed interconnects using advanced SI/PI simulation tools.
Hands-on lab work involving oscilloscopes, spectrum analyzers, and other RF/mixed-signal measurement equipment, for advanced electrical characterization.

We are seeking a skilled Failure Analysis (FA) Engineer with expertise in X-ray inspection techniques to join our AV Platform team. The ideal candidate will specialize in using advanced X-ray imaging and other analysis methods to investigate product failures, identify root causes, and provide actionable insights to improve product quality and reliability
What will your job look like?
Perform detailed failure analysis using X-ray imaging systems and related diagnostic tools to inspect electronic components, assemblies, and materials.
Interpret and analyze X-ray images to detect structural anomalies, defects, voids, cracks, delamination, and other failure mechanisms.
Develop and optimize X-ray inspection procedures and protocols for failure analysis and quality control.
Prepare test specimens: cutting, mounting, grinding, polishing and chemical etching
Collaborate with product engineering, quality assurance, and manufacturing teams to support product development, troubleshooting, and continuous improvement efforts.
Prepare detailed technical reports documenting findings, root cause analyses, and recommended corrective actions.
Support reliability testing and failure mode analysis for new and existing products.

Were looking for a Physical Design Expert to join the growing Technology Methodology & Execution team, that is responsible for developing both Technology Methodologies & Flows for all products and processes and the execution of complex Subsystems/IPs for our next generation Imagining Radar SoC from definition to Tape-Out.
What will your job look like:
Hands-on physical design block or IP owner from RTL to GDS with horizontal domain ownership.
Collaboration with front-end and architecture teams to address issues, define design methodologies and improve QoR & convergence.
End to End ownership from Synthesis, DFT insertion, Floor Planning , Place & Route till signoff.
Signoff on all domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification.
Exploratio of different methodologies from P&R till signoff to improve PPA & Turnaround time.
Evaluation of new technologies tools & features and to bring innovation with significant RoI.
Technical support and mentoring the engineers in the team.

Our Automated Driving group in Haifa is looking for a Junior DFT Engineer.
This is an exciting opportunity to join a team of highly talented engineers, working on one of the most cutting edge technologies - Autonomous Vehicle (AV) SoC.

At our Automated Driving group, we know that the idea of a fully autonomous car is no longer science fiction, but a reality that we are creating!
We have spent more than 15 years developing the world's most Advanced Driver Assistance Systems (ADAS) and we are now leading the computer vision and machine learning domain, reaching fully automated driving experience (AV).
What will your job look like:
Develop all the necessary HW / FW / SW for the different modules
Verify and Validate our design
Debug and analyze coverage and yield loss
As a cutting edge technology company, we are working only with the very advanced DFT tools and features, while developing our own methods and DFT concepts as it required by the Automotive and Safety related products market (ISO26262).

Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Micro architect will take charge in defining a processor Micro architecture features that will improve the performance and reduce the power consumption of the CPU core. This architect will use a performance simulator to explore his ideas and will analyze implementability of these features: Power, Timing, Area. This architect will utilize his processor and VLSI design experience to develop many advanced features for Huawei processors.

As formal Verification Engineer you'll own verification tasks from planning through execution, collaborating with experienced engineers across multiple teams to ensure design quality while meeting challenging timelines of the Graviton product line. This is an excellent opportunity for motivated engineers to grow their formal verification expertise in a supportive, high-impact environment.

What We Offer:
Mentorship from formal verification experts.
Hands-on experience with cutting-edge cloud compute.
Clear career growth path within us.
Opportunity to impact products used by millions globally.

Key job responsibilities:
- Plan and execute formal verification plans under guidance from senior engineers.
- Develop formal test-benches for design modules.
- Debug formal verification failures and analyze root causes.
- Collaborate with design and verification teams to resolve issues.
- Learn and apply new formal verification methodologies and tools.

Were looking for a Physical Design CAD Expert to join the growing Technology Methodology & Execution team, that is responsible for developing both Technology Methodologies & Flows for all products and processes and the execution of complex Subsystems/IPs for our next generation Imagining Radar SoC from definition to Tape-Out.
What will your job look like:
Participate in the development of flows & methodologies from Synthesis , Place& Route & all signoff flows.
Plan & execute flow releases, coordinate & track development tasks.
Exploration of different methodologies from P&R till signoff to improve PPA & Turnaround time.
Evaluation of new tools features and methodologies to bring innovation with significant RoI.
Hands-on physical design block ownership end to end, from Synthesis floor planning, Place & Route with target to achieve best PPA.
Signoff on all domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification.
Serve as the technical lead while mentoring and guiding team members.

We are seeking an Experienced Backend to join our growing Physical Design team. In this role, you will play a key part in the design of state-of-the-art SoCs, from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner from RTL to GDS.
Floorplan exploration with guidance and collaboration with front-end and architecture teams.
STA: work with FE and floor planner to manage block and top level constraints and 1st level of timing analysis.
Synthesis exploration and final synthesis netlist: Scan insertion @ synthesis, clean checks from Lint, UPF & Spyglass.
Place & Route: from Synthesis netlist to final layout and signoff verification with target to achieve best power performance and area.
Signoff : on all physical design domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification.

We are looking for a Senior Software Engineer with experience in networking and software, to join the networking SW group. We are looking for a candidate with the ability to thrive in an environment with complex software and hardware designs, who can take ownership, and lead the development of key SW components for our network cards.

You will take part in developing, integrating, and deploying networking technologies, starting from the identification and definition of project requirements, feature development, deployment and operational support, on a very large scale.
As part of your role you will join a team of engineers who are developing software implementing AWS RDMA technology, for Machine Learning and High Performance Computing (HPC) customers.
Your code will run on millions of servers worldwide, as part of the Nitro system. Not many software engineers in the world have the opportunity to create code that runs at such a large scale.
The role includes working closely with HW, FW, and SW teams all over the world.