Senior RTL Integration Engineer Networking A unique opportunity to take part in building an R&D team for a global company.
We are seeking highly experienced top talents and visionary hardware designers to contribute to the development of advanced AI connectivity architectures and shape. Responsibilities:
Lead the integration of complex RTL blocks and IPs into large-scale SoCs for AI cloud systems and data centers.
Own and maintain the Front-End environment, integration TFM and data bases
Define and implement chip- and subsystem-level integration architecture from concept to production.
Perform RTL quality checks (Lint, CDC/RDC, power-aware verification, synthesis readiness).
Drive integration flows for clock, reset, power domains, and interconnect fabrics.
Collaborate with cross-functional teams including architecture, RTL design, verification, physical design, DFT, and software.
Contribute to the design of highly innovative Switch and NIC products by ensuring seamless RTL integration.
Act as a key contributor in shaping the integration methodologies and infrastructure of the new Israeli site.
Requirements: Requirements:
12+ years of hands-on experience in RTL integration and Front-End flows (SystemVerilog/Verilog).
B.Sc. in Electrical Engineering, Computer Engineering, or a related field required.
M.Sc. or Ph.D. an advantage.
Proven track record in SOC integration and sign-off for high-performance, scalable digital systems.
Background in networking architectures and IPs (Switches, NICs, SmartNICs).
Relevant knowledge in networking functions such as packet processing, RDMA, Ethernet SerDes, PCIe switching, and MAC design.
Solid experience with integration checks, synthesis flows, and low-power methodologies.
Strong leadership skills and ability to drive complex integration projects independently.
Excellent communication skills and fluency in English.
This position is open to all candidates.