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1 ימים
חברה חסויה
Location: Yokne`am and Tel Aviv-Yafo
Job Type: Full Time
We are now looking for a Power Optimization and Analysis Engineer! our company prides ourselves on having energy-efficient products. We believe that continuing to maintain our products' energy-efficiency compared to competition is key to our continued success. As part of the u/arch team in the Switch group, you will be responsible for analyzing full chip and unit-level power data and driving the FE/BE ASIC teams to improve their units power efficiency; you will be responsible for researching, developing, and deploying methodologies to help our company's products become more energy efficient. Key responsibilities include developing techniques to model, analyze, and reduce power consumption of our company Switches product line.
As a member of Switch u/arch Team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study and implement power analysis and reduction techniques for our company's next generation switches. Your contributions will help us gain early insight into energy consumption of graphics and artificial intelligence workloads, and will allow us to influence architectural, design, and power management improvements.
What You'll Be Doing:
Use internally developed tools and industry standard pre-silicon gate-level and RTL power analysis tools, to help improve product power efficiency.
Develop and share best practices for performing pre-silicon power analysis.
Perform comparative power analysis, to spot trends and anomalies, that warrant more scrutiny.
Interact with architects and RTL designers to help them interpret their power data and identify power bugs; drive them to implement fixes.
Select and run a wide variety of workloads for power analysis.
Prototype new architectural features in Verilog and power analysis.
Requirements:
BSC or MS in Computer Engineering or Electrical Engineering
5+ years of experience in chip design
Good and interpersonal skills; much collaboration with design teams is expected.
Familiarity with Verilog and ASIC design or verification.
Desire to bring data-driven decision-making and analytics to improve our products.
Strong coding/automation skills, preferably in Python, Perl, and C++.
Ways to Stand Out From the Crowd:
Experience with Power Artist, PTPX (Prime Power RTL, RTL Architect).
Strong understanding of concepts of energy consumption, estimation, data movement and low power design.
This position is open to all candidates.
 
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3 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
our company has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. Its a unique legacy of innovation thats fueled by great technologyand amazing people. Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. As a worker, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. Join our team as a Senior Power and Performance Architect - Networking, influencing the future of network systems at our company.
What you'll be doing:
Develop, model, and validate groundbreaking power and performance optimization techniques for network fabrics, components (NICs, Switches), and systems. Collaborate closely with cross-functional teams including silicon design, system architects, software/firmware engineers, performance analysts, thermal engineers, and AI researchers to ensure end-to-end power and performance optimization. You will determine strategies that successfully implement flawless performance and power efficiency in our ambitious projects!
Requirements:
BSc or MSc or equivalent experience in Electrical Engineering, Computer Engineering, Computer Science or a related field
5+ years of relevant experience in network architecture, design, or performance analysis
Solid understanding of power consumption dynamics in network hardware (NICs, switches, cables) and systems
Proven experience in network architecture and design, particularly for large-scale systems (Data Center, HPC, AI Clusters)
Strong understanding of network protocols (Ethernet, InfiniBand, RoCE, TCP/IP) and their impact on performance and efficiency
Demonstrable expertise in network performance analysis, bottleneck identification, and tuning
Familiarity with the characteristics and network demands of AI/ML workloads
Utmost passion for attention to details in design and a high focus on design quality, particularly concerning power/performance trade-offs
Ways to stand out from the crowd:
Advanced degree or equivalent experience in a related field
Proven dedication to system-level power/performance trade-off analysis, especially in distributed computing or large-scale network environments
Experience in power modeling, measurement techniques, or relevant tools for network components and systems
Proficiency with network simulation tools (e.g., ns-3, OMNeT++, proprietary tools) or performance modeling frameworks
Understanding of silicon-level power characteristics and optimization techniques.
This position is open to all candidates.
 
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3 ימים
Location: Yokne`am
Job Type: Full Time
our company Networking IC Product Engineering team is looking for a Post Si Circuit marginality Validation engineer, to take part of Network ASIC & SOC validation and characterization efforts of speed, logic, memory, analog circuits and power features. You will be part of a team working on groundbreaking technology. We are in need of hardworking and motivated engineers ready to define and lead validation activities. If you have a passion for lab work, data analysis, and post-Si hands-on problem-solving, we will be happy to have you on our team!
We are looking for a skilled and experienced Engineer with a focus on Post Silicon IC and PDN Validation to join our Engineering team in Yokneam, Israel. As part of this role, you will play a crucial role in ensuring the efficient power, performance and quality of our advanced products. You will collaborate closely with chip design, architecture, and company-wide power owners to devise and implement effective validation strategies, aligning with our high-quality standards.
What youll be doing:
Build and implement power delivery and transients validation plans for new products
Analyze and interpret validation results to identify potential issues and define required margins.
Collaborate with design and architecture teams to determine efficient power and performance targets.
Craft and develop test scripts and frameworks to automate validation processes.
Work closely with software and firmware teams to ensure seamless integration.
Conduct system-level testing to ensure the successful implementation of power and performance features, validate transient behaviour and debug complex problems.
Provide technical expertise and mentorship to junior team members.
Maintain accurate documentation of validation activities and results.
Requirements:
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience.
5+ years of proven experience in post-silicon system level validation and characterization
Strong knowledge of power management techniques and performance analysis.
Proficiency in scripting languages such as Python, Perl, or Shell.
Excellent problem-solving and analytical skills.
Ability to work in a fast-paced and dynamic environment.
Outstanding communication and interpersonal skills.
Proficiency in English.
Ways to stand out from the crowd:
Demonstrated experience in leading validation projects and teams.
Deep understanding of power delivery networks and their components.
Proven track record of successfully implementing complex validation strategies.
Experience with advanced testing equipment and methodologies.
Strong background in system-level power and performance optimization.
This position is open to all candidates.
 
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25/08/2025
Location: Tel Aviv-Yafo
Job Type: Full Time
our company has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. Its a unique legacy of innovation thats fueled by great technologyand amazing people. Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. As an worker, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. Join our team as a Senior Power and Performance Architect - Networking, influencing the future of network systems at our company.
What you'll be doing:
Develop, model, and validate groundbreaking power and performance optimization techniques for network fabrics, components (NICs, Switches), and systems. Collaborate closely with cross-functional teams including silicon design, system architects, software/firmware engineers, performance analysts, thermal engineers, and AI researchers to ensure end-to-end power and performance optimization. You will determine strategies that successfully implement flawless performance and power efficiency in our ambitious projects!
Requirements:
BSc or MSc or equivalent experience in Electrical Engineering, Computer Engineering, Computer Science or a related field
5+ years of relevant experience in network architecture, design, or performance analysis
Solid understanding of power consumption dynamics in network hardware (NICs, switches, cables) and systems
Proven experience in network architecture and design, particularly for large-scale systems (Data Center, HPC, AI Clusters)
Strong understanding of network protocols (Ethernet, InfiniBand, RoCE, TCP/IP) and their impact on performance and efficiency
Demonstrable expertise in network performance analysis, bottleneck identification, and tuning
Familiarity with the characteristics and network demands of AI/ML workloads
Utmost passion for attention to details in design and a high focus on design quality, particularly concerning power/performance trade-offs
Ways to stand out from the crowd:
Advanced degree or equivalent experience in a related field
Proven dedication to system-level power/performance trade-off analysis, especially in distributed computing or large-scale network environments
Experience in power modeling, measurement techniques, or relevant tools for network components and systems
Proficiency with network simulation tools (e.g., ns-3, OMNeT++, proprietary tools) or performance modeling frameworks
Understanding of silicon-level power characteristics and optimization techniques.
This position is open to all candidates.
 
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25/08/2025
Job Type: Full Time
we are seeking best-in-class ASIC Design Engineers to design and implement the worlds leading CPU's and SoC's. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. we are a learning machine that constantly evolves by adapting to new opportunities that are hard to pursue, that only we can take on, and that matter to the world. We have crafted a team of excellent people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
we are building a new group in Israel, this group delivers security engines and risc-V processor IPs to all of our company's product lines working with all our company groups around the world. We are looking for inquisitive, motivated engineers with experience to continue to build this new group. As a senior member of our design team, you will be responsible for the design and implementation of high-performance, low-power security engines and risc-V processor modules. You will work closely with architects, design engineers, verification engineers, and physical design engineers to accomplish your tasks.
What you will be doing:
Participate in micro-architecture development and document specifications.
Implement in RTL and work with the verification team to ensure that the design is functional.
Apply logic design skills to optimize and meet performance and power goals.
Deliver a synthesis/timing clean design while working with the physical design team to ensure a routable and physically implementable design.
Requirements:
A Bachelors degree in electrical engineering or computer engineering
5+ years of relevant experience in chip design development of complex designs
Highly proficient in logic design, Verilog, and/or System-Verilog, with a deep understanding of physical design and VLSI.
Good interpersonal skills. And team player.
This position is open to all candidates.
 
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27/08/2025
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
we are looking for an Asic Design Engineer to join the DFT design team and develop the next generation DFT technologies.
As a design engineer in the DFT design team at our company, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.
What you'll be doing:
In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.
As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.
Requirements:
B.Sc. in Electrical Engineering or Computer engineering or equivalent experience.
15+ years of practical experience.
Exposure to rtl implementation and coding.
Familiarity with verification tools.
Strong debugging, problem solving and analytical skills.
Strong communication and social skills are required.
Ability to work in a geographically diverse team environment.
Self motivated, independent and target oriented.
Ways to stand out from the crowd:
Prior Design or Verification experience.
Experience in developing sophisticated design blocks.
Integration of design elements to large cluster or full-chip.
Experience in working with back-end on area, power and timing closures.
Scripting ability.
This position is open to all candidates.
 
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26/08/2025
Job Type: Full Time
we are seeking best-in-class ASIC Verification Engineers to help deliver the worlds leading CPU's and SoC's. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. we are a learning machine that constantly evolves by adapting to new opportunities that are hard to pursue, that only we can take on, and that matter to the world. We have crafted a team of excellent people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
we are building a new group in Israel, this group delivers security engines and risc-V processor IPs to all of our company's product lines working with all our company's groups around the world. We are looking for inquisitive, motivated engineers with experience to continue to build this new group. As a senior member of our team, you will be responsible for the verification of high-performance, low-power security engines and risc-V processor modules. You will work closely with architects, design engineers, FC verification engineers, and SW teams.
What you will be doing:
Participate in micro-architecture development and document specifications.
Build System Verilog UVM verification environments for IPs in areas of crypto and Risc-V platforms.
Build verification and test plans to get to complete coverage.
Work with the designers in our team to debug and clean all bugs
Deliver the IPs to higher level verification like Cluster, FC and emulation.
Requirements:
A bachelors degree in electrical engineering or computer engineering
5+ years of relevant experience in verification of complex designs.
Proficient in System-Verilog and UVM methodology.
Good interpersonal skills. And team player.
Ways to stand out from the crowd:
Background with crypto RTL units (AES, RSA, PQC)
Experience working on Risc-V or Risc-V peripherals
Experience working in a diverse and global environment (working with engineers from China, India, and the US).
This position is open to all candidates.
 
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לפני 12 שעות
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
our company networking unit is a world-leader fast-growing company which supports the most powerful supercomputers in the world. We make outstanding artificial intelligence happen and accelerate Open-AIs Chat-GPT, for example. We believe in our people and products and seek excellent people to join us!
We're looking for a hardware u/architect for our switch division. In this position, as part of a small (~10 employees) elite team, you will have the chance to define the architecture of our companys next generation switch product lines performance, both Ethernet and InfiniBand. Your role will be cross-disciplinary, working with software, ASIC design, verification, physical design and platform teams to improve performance and debug.
What you'll be doing:
Learn and understand the switch u/architecture thoroughly across all aspects and become a source of information for the design and verification engineers.
Define the implementation of the most sophisticated performance features of our next products, balancing architecture requirements with backend, execution, and design considerations.
Define the implementation of debug capabilities to support performance validation and improvements
Understand our system requirement and help define the POR of our switch product line.
Face the most challenging Full-Chip correctness and performance issues, which cannot be handled by the units designers as they require full cross-unit understanding of the chip.
Work closely with board and package design to understand the different design limitations: power, di/dt, temperature, signal-integrity etc.
Thoroughly understand Ethernet, InfiniBand and NvLink protocols.
Requirements:
B.Sc. in Electrical Engineering from a known university
Excellent grades
8+ years of experience in ASIC design/uarch/arch/performance
At least 4 years of hands on experience in writing Verilog/VHDL or
Strong analytic capabilities, and passion for solving logical issues
Strong debug skills
Ability to drive complex activities involving many interfaces and teams
Good communications skill
Ways to stand out from the crowd:
Knowledge in switching fabrics with strict performance requirements. (Networking, SOC connectivity, etc)
Experience as an HW-architect.
Familiar with working on large high-end ASICs.
Experience in performance improvements in ASIC.
This position is open to all candidates.
 
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27/08/2025
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
we are looking for an experienced DFT Design Engineer to join the DFT design team and develop the next generation DFT technologies.
As a design engineer in the DFT design team at our company, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.
What you'll be doing:
In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.
As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.
Requirements:
B.Sc. in Electrical Engineering or Computer engineering or equivalent experience.
5+ years of practical experience.
Exposure to rtl implementation and coding.
Familiarity with verification tools.
Strong debugging, problem solving and analytical skills.
Strong communication and social skills are required.
Ability to work in a geographically diverse team environment.
Self motivated, independent and target oriented.
Ways to stand out from the crowd:
Prior Design or Verification experience.
Experience in developing sophisticated design blocks.
Integration of design elements to large cluster or full-chip.
Experience in working with back-end on area, power and timing closures.
Scripting ability.
This position is open to all candidates.
 
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3 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
our company networking unit is a world-leader fast-growing company which supports the most powerful supercomputers in the world. We make outstanding artificial intelligence happen and accelerate Open-AIs Chat-GPT, for example. We believe in our people and products and seek excellent people to join us!
We are looking for a CDC Design Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in crafting our groundbreaking and innovating chips, enjoy working in a meaningful, growing and professional environment where you make a significant impact in a technology-focused company.
What you will be doing:
You will play a major role analyzing the design and driving fixes as well as developing, maintaining, and improving our Lint, Clock Domain Crossing (CDC) and Reset Domain Crossing (RDC) constraints and methodology for our SOCs across block level, cluster level, and/or full chip level.
Responsibility for analyzing and optimizing the CDC and RDC sign-offs.
Develop and maintain key CDC/RDC checks and associated sign-offs for SOCs.
Help in driving frontend and backend assertions needed to support CDC/RDC constraints and assumptions.
Learn and understand the switch u/architecture to support the design and verification teams.
Requirements:
B.Sc. in Electrical Engineering from a known university.
Excellent grades.
5+ years of experience in ASIC design/uarch/arch/performance.
At least 4 years of hands on experience in writing Verilog/VHDL.
Strong analytic capabilities, and passion for solving logical issues.
Strong debug skills.
Experience in Python, Tcl and Make for automation and scripting tasks.
Ability to drive complex activities involving many interfaces and teams.
Good communication skills.
Ways to stand out from the crowd:
Experience in RTL Design, Synthesis and Timing and as an HW-architect.
Experience with tools like Synopsys PrimeTime, Spyglass, VC-Static, or Meridian.
Knowledge in switching fabrics with strict performance requirements. (Networking, SOC connectivity, etc).
Familiar with working on large high-end ASICs.
Experience in performance improvements in ASICExpertise in Static Timing Analysis (STA), Clock-Domain Crossing (CDC), and Reset Domain Crossing (RDC) solutions.
This position is open to all candidates.
 
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25/08/2025
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
'we are looking for an Asic Design Engineer to join the DFT design team and develop the next generation DFT technologies.
As a design engineer in the DFT design team at our company, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.
What you'll be doing:
In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.
As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.
Requirements:
B.Sc. in Electrical Engineering or Computer engineering or equivalent experience.
1+ years of practical experience.
Exposure to rtl implementation and coding.
Familiarity with verification tools.
Strong debugging, problem solving and analytical skills.
Strong communication and social skills are required.
Ability to work in a geographically diverse team environment.
Self motivated, independent and target oriented.
Ways to stand out from the crowd:
Prior Design or Verification experience.
Experience in developing sophisticated design blocks.
Integration of design elements to large cluster or full-chip.
Experience in working with back-end on area, power and timing closures.
Scripting ability.
This position is open to all candidates.
 
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עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
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