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לפני 3 שעות
חברה חסויה
Location: More than one
Job Type: Full Time
Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Design-for-Test Engineering team at our company works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the SCAN INSERTION team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.
Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!
What youll be doing:
You will be in charge of state of the art Design for Test (SCAN INSERTION) flows and implementation
Take full SCAN INSERTION ownership end to end on a project, from Arch & planning to implementation and verification
Inventing and maintaining automation flows that provide SCAN INSERTION implementation to project .
Requirements:
4+ years of hands on DFT/ATPG/SCAN experience knowledge & technical experience in DFT ASIC Design and in ATPG/SCAN tools (DC/Fusion/Genus)
Strong programming skills in scripting languages
BSc. in Electrical Engineering or Computer engineering
Quick learner, proactive and self-motivated, eager to learn and contribute, sense or ownership, commitment, and responsibility
Ways to stand out from the crowd:
Knowledge of DFT including SCAN INSERTION, BIST, on-chip scan compression, fault models, ATPG, and fault simulation
Experience in Synopsis/Mentor SCAN tools
Programming languages: TCL, PRL, Phyton & Unix shell scripts .
This position is open to all candidates.
 
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1 ימים
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Design-for-Test Engineering team at our company works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.
Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!
What youll be doing:
You will be in charge of state of the art Design for Test/ATPG flows and implementation
Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis.
Inventing and maintaining automation flows that provide the short test time to production.
Requirements:
3+ years of hands on DFT/ATPG experience knowledge & technical experience in DFT ASIC Design and in ATPG tools
Strong programming skills in scripting languages
BSc. in Electrical Engineering or Computer engineering
Quick learner, proactive and self-motivated, eager to learn and contribute, sense or ownership, commitment, and responsibility
Ways to stand out from the crowd:
Knowledge of DFT including scan, BIST, on-chip scan compression, fault models, ATPG, and fault simulation
Experience in Mentor TestKompress ATPG tool and retargeting flow
Programming languages: TCL, PRL, Phyton & Unix shell scripts
Experience with ATE and Silicon bring-up.
This position is open to all candidates.
 
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1 ימים
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a Senior Chip Design Verification Engineer for developing the next generation DFT technologies.
As a Senior Chip Design Verification Engineer in the DFT team at our company, you will verify the design and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our DFT solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.
What you'll be doing:
In this position, you will be responsible for verification of the DFT design, architecture and micro-architecture using sophisticated verification methodologies.
As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.
Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.
Requirements:
BSc. in Electrical Engineering or Computer engineering, or equivalent experience.
5+ years of practical verification experience.
Experience in developing verification environments and random based verification for unit level and system level using verification tools (simulation tools, Verilog, debug tools like Simvision/Debussy).
Experience with Specman is a plus.
Good understanding of RTL design (Verilog).
Strong debugging, problem solving and analytical skills.
Excellent communication and social skills.
Ability to work in a geographically diverse team environment.
Self motivated, independent and target oriented.
This position is open to all candidates.
 
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1 ימים
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
'we are looking for an Asic Design Engineer to join the DFT design team and develop the next generation DFT technologies.
As a design engineer in the DFT design team at our company, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.
What you'll be doing:
In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.
As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.
Requirements:
B.Sc. in Electrical Engineering or Computer engineering or equivalent experience.
1+ years of practical experience.
Exposure to rtl implementation and coding.
Familiarity with verification tools.
Strong debugging, problem solving and analytical skills.
Strong communication and social skills are required.
Ability to work in a geographically diverse team environment.
Self motivated, independent and target oriented.
Ways to stand out from the crowd:
Prior Design or Verification experience.
Experience in developing sophisticated design blocks.
Integration of design elements to large cluster or full-chip.
Experience in working with back-end on area, power and timing closures.
Scripting ability.
This position is open to all candidates.
 
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1 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for a Senior Chip Design Engineer, Formal Verification for our company's Networking team!
This is an exciting opportunity to join a hardworking Pre-Silicon design and verification team, working on groundbreaking Switch and GPU technologies. We deploy state-of-the art formal verification tools and methodologies to prove design correctness. Working in our formal verification team will expose you to a wide range of cutting edge design and technologies that are in the heart of the AI revolution. Our team delivers world class Chips solutions for HPC, AI infrastructures, data-center, network, and storage markets. We micro-architect, verify, and deliver smart and high bandwidth multi port switches. our company has the most sophisticated formal tools and methodologies in the industry, which help us achieve A0 design tape-outs. As part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.
What you'll be doing:
In this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.
You will work on ambitious designs along with our Pre-Silicon team and take part in developing the next generation of our company's core technology.
You will take part in the AI revolution led by our company, working on cutting edge architecture.
Requirements:
BSc in Electrical/Computer Engineering or MSc in Mathematics
5+ years of relevant experience in chip design field (design/verification/formal).
Excellent analytical, logical reasoning and problem-solving skills
Strong debugging and analytical skills.
Strong communication and interpersonal skills are required
Ways to stand out from the crowd:
Formal verification work experience
Team Player
Knowledge of digital logic.
This position is open to all candidates.
 
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לפני 1 שעות
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
we are looking for best-in-class STA (Static Timing analysis) Physical Design Engineers to join our outstanding Networking DFT team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you will be doing:
DFT STA execution, from rtl driven constraints and definitions through DFT constraints quality assurance to STA sign-off.
Be part of a unique team of experts who have deep understanding in all aspects of pre and post silicon.
Be exposed and work on a variety of challenging designs, unique DFT solutions that require deep silicon implementation understanding.
Daily work involves all aspects of static timing analysis - constraints, environment, models generation and timing ECO generation for block level and full chip level.
Taking part in flows development.
Requirements:
B.SC. in Electrical Engineering/Computer Engineering.
2-3 years of experience as STA engineer.
Ability to quickly adapt to new technology and go deep into new areas
Strong communication skills
Great teammate.
Drive new solutions based on any issues that arise
Ways to Stand Out From the Crowd:
Knowledge in physical design flows and methodologies (PNR, STA, physical verification).
Knowledge in DFT flows such as ATPG, Mbist, Ijtag.
Prior experience in DFT timing closures.
Knowledge in CDC.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
This position is open to all candidates.
 
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1 ימים
Location: Yokne`am
Job Type: Full Time
We are looking for a Senior Formal Verification Engineer for our company Networking team!
This is an exciting opportunity to join a hardworking Pre-Silicon design and verification team, working on groundbreaking NIC technologies. We deploy state-of-the art formal verification tools and methodologies to prove design correctness. Working in our formal verification team will expose you to a wide range of cutting edge design and technologies. Our NIC team delivers world class CPU interface and offload solutions for HPC, data-center, network, and storage markets. We micro-architect, verify, and deliver the best and most widely used high BW ethernet and IB NICs in the industry. our company has the most sophisticated formal tools and methodologies in the industry, which help us achieve A0 design tapeouts. As part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.
What you'll be doing:
In this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.
You will work on ambitious designs along with our Pre-Silicon team and take part in developing the next generation of our company's core technology.
You will learn state of the art formal methodologies and advance your expertise in communication protocols and hardware implementations.
Requirements:
BSc in Electrical/Computer Engineering or MSc in Mathematics, or equivalent experience.
5+ years of relevant experience.
Excellent analytical, logical reasoning and problem-solving skills.
Strong debugging and analytical skills.
Strong communication and interpersonal skills are required.
Ways to stand out from the crowd:
Formal verification work experience.
Knowledge of digital logic.
This position is open to all candidates.
 
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1 ימים
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. As a worker, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The our company's System-On-Chip (SOC) group is looking for a top physical design engineer with a curiosity about SOC design optimization, physical integration, chip build and assembly and verification. You should have real passion for methodologies and clock distribution solutions that enable SOC creation in the most optimized way. In this position, you will get the opportunity to build complex networking chips and directly contact unit-level owners, Physical Design, CAD, Package Design, Software, DFT and other teams.
What you'll be doing:
Designing and implementing SOC level clock requirements
Daily work involves aspects of chip level design, including partitioning, CDC, trial synthesis, design quality checks
Be exposed and work on a variety of functional and structural challenges. Including functional debug, physical design readiness, resolve design quality issues.
Requirements:
B.SC. in Electrical Engineering/Computer Engineering.
3+ years of confirmed experience in chip design
Shown hands on physical design skills in clock distribution in tight multi power and timing/layout constrained products.
Proficiency in at least one common scripting languages like perl, python, bash, Tcl.
Phenomenal teammate.
Ways to stand out from the crowd:
Passion for quality. Experience with delivery back to RTL, to physical design, and other customers.
This position is open to all candidates.
 
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חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
This is a highly visible position in CSG (Switching Group).
We are looking for DFT engineer that wants to be part of the best implementation team, that performs a true RTL to production.
The DFT position involves ownership of testability, methodology and execution for assigned projects. The DFT engineer is responsible from RTL DFT insertion to final test program bring-up. The DFT engineers are implementing Boundary scan, MBIST, SCAN and SCAN compression, and more. They are generating all patterns and work on the chips final test programs.
Requirements:
University Bs.C. Electrical Engineer
Minimum 4 years of experience
Knowledge is some or all of the following:
SCAN and ATPG
MBIST (Memory Build In Self-Test)
LogicBist (Logic Build In Self-Test)
experience with some of the following:
TETRAMAX / DFT compiler
FAST SCAN / TESTKOMPRESS / Tessent
This position is open to all candidates.
 
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לפני 3 שעות
Location: More than one
Job Type: Full Time
we are the world leader in visual computing and artificial intelligence, powering some of the most powerful supercomputers globally. We are at the forefront of innovation, enabling breakthrough applications across various industries. From self-driving cars to the development of pioneering AI technologies like ChatGPT, we make the most impactful solutions happen.
We believe in fostering a culture of excellence and are seeking top talent to join our team. Our work environment is fast-paced, collaborative, and intellectually stimulating, offering opportunities to shape the future of technology.
The Networking Application Engineering team at our company is looking for a motivated, experienced Senior Hardware Engineer to join us in supporting groundbreaking network technologies. In this role, you will have a significant impact on both our business and the technology ecosystem, working closely with customers and R&D teams to shape the future of supercomputing and networking.
What youll be doing:
Support the development, bring up, and test of Ethernet switch hardware to ensure efficient performance and reliability.
Collaborate with partners, customers and internal RnD teams to address technical issues, provide solutions, and ensure successful integration.
Provide constructive feedback to engineering teams regarding product requirements and improvements.
Leverage network knowledge and data center experience to contribute to the development and improvement of our Ethernet switch solutions.
Requirements:
BSc/MSc degree in Electrical / Computer Engineering or related field or equivalent experience.
5+ years of HW development experience at a technology company, including high-speed multi-layer PCBs.
Excellent communication skills, both in English and in customer-facing settings.
Strong interpersonal skills with the ability to work closely with both internal teams (RnD, Product etc) and customers.
Ways to stand out from the crowd:
Proven capability to work independently and lead projects.
Proven experience in Ethernet switch hardware development, bring-up, and testing.
Strong proficiency in Python scripting for automation and testing purposes.
Background in network engineering or data center operations.
A demonstrated track record of influencing product direction and solving critical issues.
This position is open to all candidates.
 
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לפני 2 שעות
Location: Yokne`am
Job Type: Full Time
our companys Product Engineering group is looking for a well experienced Test architect to join our family and be a part of System Product Engineering. The System Product Engineering team is responsible to assure that our companys customers will get the best state of the art high-quality products using the below:
Development and deployment of automatic testers for our companys network business units (Computing network adapters and High-speed switch systems) including hardware and software
Analyzing and monitoring the manufacturing data and find / prevent quality issues based on big data using Machine learning, statistical tools, and AI (artificial intelligence)
Leading smooth production and capacity enlargement
Failure analysis of return material from customers to understand the reason of failures.
Validate the test performance and stability using QA (V&V validation and verification) methods
The teams are involving and part of the full product lifecycle from architecture definition trough development till the product will be EOL (end of life). As part of the effort mentioned above, we are looking for an Electronic Engineer to join the System Design Testing Architecture team and lead Systems HW testability definition for our company's Networking systems.
What youll be doing:
Leading optimal products testing definitions includes: HW, SW, FW, Mechanical fixtures, and cables/harnesses for customized production testing set ups.
Making pitches in front of large audience a new product testing architecture, DFT and testing method while providing justifications for the testing concept.
Responsible for product testing maximum coverage, Testing specification documents and production test flow process for each system
Working with Companys engineering team during the developing process of the product from pre-design trough the design and influence on the product design from DFT design for testability aspects.
Supporting production ramp up and scalability, lead and fast responding time for ECR/ECO implications.
Examine New Technologies, testing capabilities and their implementation for the next generation products
Ensure testing set ups and coverage are met the DFT requirements and timetable
Lead DFT Risk assessment and drive mitigations to reduce the risks.
Requirements:
BSc, MSc Electrical Engineering
Integration capabilities of self-task management, vast electronic knowledge, production and testing process knowhow.
Background in working with contract manufacturers and suppliers
Minimum 5 years of experience as a DFT engineer at chip/system level, as Board Design engineer or as system architect
Management and follow up till completion of multi-functional and personal tasks.
Personal skills: proactive and self-instruction, good interpersonal relationship, multitasking, well organized and a quick learner.
This position is open to all candidates.
 
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