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7 ימים
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
the pioneer of SWIR sensing technology. Based on nanophotonics research, technology is disrupting the world of vision sensors for the automotive market along with other exciting applications.
We are looking for a VLSI Group leader to grow our VLSI team, who would lead design and verification activities and be involved with a variety of research, architecture and integration aspects.

Your Day to Day
Lead and manage a dynamic group of VLSI design and verification engineers focused on developing innovative image sensors and ISP solutions.
Define and prioritize project objectives, timelines, and deliverables to align with our companys strategic goals.
Oversee the design and verification process of ASIC and FPGA projects through system integration to our innovative image sensing solutions.
Collaborate closely with cross-functional teams, including analog design, firmware, and software engineers, to ensure seamless product integration and performance.
Analyze and optimize VLSI signal processing algorithms and FPGA implementations to enhance image quality and sensor performance.
Mentor and provide technical guidance to your team members, fostering a culture of growth and innovation
Why should you be a TriEyoneer?
Leading the SWIR revolution: is redefining the way machine vision systems perceive the environment with its breakthrough Short Wave Infrared (SWIR) sensing technology providing HD SWIR imaging and 3D deterministic depth information under all lighting and weather conditions.
Timing is everything: This is your opportunity to be a part of a fast-growing deep-tech company backed by industry leaders, as it enters a significant stage of global growth
Make yourself at home: Our beautiful and modern offices in Tel Aviv, conveniently situated near all public transportation options, are designed to provide you with a comfortable and welcoming environment
Unlocking your potential: Be a part of an empowering, multidisciplinary team who strongly believes in constant learning and knowledge sharing, offering a range of growth opportunities
Competitive benefits package: Free gym membership, parking, holidays and birthday gifts, Cibus, generous vacation allowance, happy hours and team events, etc.
Requirements:
You hold a Bachelors degree in Electrical Engineering, Computer Engineering, or a related field, with a Masters degree being a plus.
You have 10 years of hands-on experience in design and verification of ASIC/FPGA and mixed signal systems, particularly in the realm of image sensors or closely related technologies.
You have at least 5-7 years of experience in a leadership or managerial role.
You possess a solid background in ASIC/FPGA development, including experience with HDL coding, verification methodologies such as UVM, backend and system interfaces.
You are proficient with common industry VLSI design tools and simulation software, such as Cadence/Synopsys, and FPGA environments Xilinx/Intel.
Your excellent leadership, communication, and project management skills empower you to thrive in a fast-paced, collaborative environment.
You are adept at managing multiple projects simultaneously, ensuring timely and high-quality deliverables.
An advantage - expertise in embedded systems and firmware development, as well as knowledge of Backend flow, manufacturing processes, and design for test (DFT) methodologies.
This position is open to all candidates.
 
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04/06/2025
Job Type: Full Time
We are seeking best-in-class ASIC Verification Engineers to help deliver the worlds leading CPU's and SoC's. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to pursue, that only we can take on, and that matter to the world. We have crafted a team of excellent people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

NVIDIA is building a new group in Israel, this group delivers security engines and risc-V processor IPs to all of NVIDIA product lines working with all NVIDIA groups around the world. We are looking for inquisitive, motivated engineers with experience to continue to build this new group. As a senior member of our team, you will be responsible for the verification of high-performance, low-power security engines and risc-V processor modules. You will work closely with architects, design engineers, FC verification engineers, and SW teams.

What you will be doing:
Participate in micro-architecture development and document specifications.
Build System Verilog UVM verification environments for IPs in areas of crypto and Risc-V platforms.
Build verification and test plans to get to complete coverage.
Work with the designers in our team to debug and clean all bugs
Deliver the IPs to higher level verification like Cluster, FC and emulation.
Requirements:
What we need to see:
A bachelors degree in electrical engineering or computer engineering.
5+ years of relevant experience in verification of complex designs.
Proficient in System-Verilog and UVM methodology.
Good interpersonal skills. And team player.


Ways to stand out from the crowd:
Background with crypto RTL units (AES, RSA, PQC).
Experience working on Risc-V or Risc-V peripherals.
Experience working in a diverse and global environment (working with engineers from China, India, and the US).
This position is open to all candidates.
 
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04/06/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are at the forefront of AI-driven innovation in VLSI design automation. Join us to shape the future of semiconductor design with cutting-edge AI tools and make a significant impact in a collaborative, high-performance environment. Are you ready to push the boundaries of whats possible in VLSI CAD? Come be part of our pioneering team!

What you'll be doing:
You will be responsible for developing and integrating advanced CAD solutions and automation flows using AI and machine learning for VLSI design, verification, and implementation.
Work closely with design, verification, and CAD teams to identify areas for improving VLSI workflows using advanced tools and methods.
Research, prototype, and deploy AI-based algorithms.
Develop and maintain scripts and automation infrastructure to enable seamless adoption of AI tools in the VLSI design process.
Continuously review emerging AI technologies and methodologies to keep our CAD environment up-to-date.
Provide technical support and training to engineering teams on AI-enabled CAD flows and best practices.
Requirements:
What we need to see:
B.Sc./M.Sc. in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience.
5+ years of experience in VLSI CAD tool development, with a strong focus on integrating AI/ML techniques into EDA workflows.
Proficiency in Python and at least one AI/ML framework (such as TensorFlow, PyTorch, or scikit-learn).
Hands-on experience with VLSI physical design and familiarity with industry-standard EDA tools (e.g., Synopsys, Cadence).
Knowledge of data preprocessing, feature engineering, and model deployment as applied to VLSI design challenges.
Experience developing and maintaining automation scripts (Python, Perl, Tcl, Make).
Strong analytical skills in evaluating the impact of AI solutions on design quality, performance, and productivity.
Excellent communication skills and the ability to work cross-functionally in a fast-paced environment.
Self-motivation, attention to detail, and a track record of delivering robust solutions to production.

Ways to stand out from the crowd:
Demonstrated experience deploying AI/ML models in production VLSI CAD environments.
Contributions to open-source AI/EDA projects or publications in relevant conferences/journals.
Deep understanding of VLSI design challenges-such as timing closure, power optimization, or yield enhancement-and how AI can address them.
Experience with cloud-based or distributed compute environments for large-scale AI training and inference.
Strong ownership, curiosity, and a passion for continuous learning and innovation.
This position is open to all candidates.
 
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29/05/2025
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
we are a global leader in control systems for quantum computing, a field on the verge of exponential growth. Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands.
At the core of our company's lies a passionate and ambitious team committed to reshaping the construction and operation of quantum computers. Our work is fueled by a deep understanding of customer needs, driving us to deliver unparalleled solutions in this revolutionary field.
The hardware development team spans two global sites one in Tel Aviv and one in Copenhagen. The two teams work seamlessly together across projects, and we try to foster an open dialogue to foster creativity and commitment. The hardware team is responsible for all hardware within our company's spanning from room-temperature control hardware to our cryogenic QPU carriers.
We are looking for a seasoned Electronics Engineer with over 5 years of hands-on experience in analog circuit design and power supply engineering. In this role, you will focus on developing and refining analog circuitssuch as amplifiers, filters, and DACs operating from DC to 2GHzand power supply solutions across various topologies. As the go-to person in electronics, youll work as a key contributor and technical expert, collaborating closely with our hardware teams in Denmark and Israel, as well as operations during the NPI phase.
Key Responsibilities
Analog Circuit Development:
Design and optimize analog circuitry, including amplifiers, filters, and signal generation modules (DACs) covering frequencies from DC up to 2GHz and above.
Power Supply Engineering:
Develop robust power supply designs across various schemes (buck/boost converters, LDOs, switching regulators, etc.) that meet high-performance standards.
Simulation & Design:
Utilize Altium for PCB design and LTspice for circuit simulation to validate and refine your designs.
Design for Manufacturing & Test (DFM/DFT):
Incorporate DFM and DFT best practices to ensure reliability, manufacturability, and scalability across many channels in compact form factors.
Performance & Compliance:
Ensure designs meet stringent low-noise requirements and EMI/EMC compliance for high-performance applications.
Cross-Functional Collaboration:
Work closely with hardware teams in both Denmark and Israel, and engage with operations during the NPI process to ensure seamless integration of your designs.
Technical Expertise:
Act as the electronics subject matter expert within the team, providing technical sparring and review to peers.
Requirements:
Experience: 5+ years in analog circuit and power electronics design.
Technical Proficiency:
Extensive experience in designing amplifiers, filters, signal generation circuits, and DACs for high-frequency applications (DC-2GHz).
Proven track record in developing complex power supply systems (e.g., buck/boost converters, LDOs, switching regulators).
Tools:
Proficient in Altium and LTspice.
DFM/DFT Knowledge:
Deep understanding of design for manufacturability and testability to support robust, scalable production.
Industry Exposure:
Experience with telecom, radar, aerospace, or similar high-performance sectors is a plus.
Education:
B.Sc. or higher degree in Electrical Engineering or a related field.
Personal Attributes
Technical Authority: Recognized as the go-to person for electronics, with the ability to mentor and collaborate with peers.
Detail-Oriented: Meticulous approach to ensuring low-noise designs and EMI/EMC compliance while scaling to many channels in a small form factor.
Collaborative: Strong communication skills and a proven ability to work effectively with global teams, including remote coordination and occasional travel.
Innovative & Proactive: Eager to push boundaries and refine designs in fast-paced, high-performance environments.
This position is open to all candidates.
 
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29/05/2025
Location: Tel Aviv-Yafo
Job Type: Full Time
we are a global leader in control systems for quantum computing, a field on the verge of exponential growth. Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands. At the core of our company's lies a passionate and ambitious team committed to reshaping the construction and operation of quantum computers. Our work is fueled by a deep understanding of customer needs, driving us to deliver unparalleled solutions in this revolutionary field.
The hardware development team spans two global sites one in Tel Aviv and one in Copenhagen. The two teams work seamlessly together across projects, and we try to foster an open dialogue to foster creativity and commitment. The hardware team is responsible for all hardware within our company's spanning from room-temperature control hardware to our cryogenic QPU carriers.
We are seeking a Digital Electrical Design Engineer with extensive experience in board-level digital design, high-speed interfaces, and embedded systems. In this role, youll be a technical lighthouse within our Hardware R&D teamguiding complex, high-speed digital designs from concept through production. Youll collaborate closely with firmware engineers, system architects, and other cross-functional teams spread across multiple global sites. While prior quantum or cryogenic experience isnt required, an interest in learning about these cutting-edge fields is a plus.
Key Responsibilities:
Digital Board-Level Design: Architect, design, and implement advanced digital solutions involving FPGAs, microcontrollers, and high-speed communication interfaces (multi-GHz range).
High-Speed Signal Integrity: Develop and validate clocking solutions up to the tens of GHz range and handle GT lines to ensure robust, reliable performance.
End-to-End Development: Own the entire hardware lifecyclefrom concept and schematic design in Altium to layout review, testing, and production release.
Design for Manufacturing & Test (DFM/DFT): Integrate manufacturing and testing considerations into your designs, collaborating with supply chain and production teams to ensure scalability and cost-effectiveness.
Technical Collaboration: Work closely with firmware engineers, system architects, and cross-site R&D teams to ensure seamless hardwarefirmware integration.
Remote Coordination: Engage in significant remote collaboration with minimal travel, leveraging Agile and Kanban methodologies for project execution.
Subject Matter Expert: Serve as a go-to resource for digital design best practices, helping to maintain high engineering standards across the organization.
Requirements:
10+ years of hands-on experience in digital electronics design (board-level), focusing on FPGA-based systems, microcontroller integration, and/or high-speed communication.
Demonstrated expertise in high-speed signal integrity, including multi-GHz clocks and GT lines.
Proficiency with Altium or similar PCB design tools.
Understanding of Agile and/or Kanban methodologies in a hardware development context.
Proven track record of taking products from concept through production, including schematic design, layout oversight, and system bring-up.
Experience with DFM and DFT principles, plus involvement in supply chain and production processes.
Excellent communication skills in English, with the ability to collaborate across geographical boundaries.
B.Sc. or higher degree in Electrical Engineering or a related field.
Personal Attributes:
Passionate Technologist: Thrives on complex challenges and cutting-edge design work.
Team Player: Enjoys collaborating with global, cross-functional teams in a dynamic, fast-paced environment.
Independent & Proactive: Takes ownership of responsibilities, drives initiatives forward, and maintains a can-do attitude.
Adaptable: Comfortable with uncertainty and rapidly evolving priorities in a matrix organization.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As the DFT Senior Engineer, you will play a crucial role in DFT Architecture and DFT design, and support devices of extreme complexity to production. You will be responsible for providing technical leadership in DFT, developing flows, automation, and methodology, planning DFT activities, tracking the DFT quality matrix throughout the project lifecycle, and providing sign-off DFT to tapeout.
The ML, Systems, & Cloud AI (MSCA) organization at our company's designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company's services (Search, YouTube, etc.) and our company Cloud. Our end users are our companyrs, Cloud customers and the billions of people who use our company's services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Lead and execute activities in the design, implementation, and verification of DFT solutions for large-scale Application-Specific Integrated Circuits (ASIC).
Develop DFT strategy and architecture, including hierarchical DFT, Memory Built-In Self Test (MBIST), and Automatic Test Pattern Generation (ATPG).
Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT requirements are met and mutual dependencies are managed.
Manage the DFT team's workload and deliverables, provide technical leadership and guidance to the team.
Lead DFT execution of a silicon project - planning, execution, tracking, quality, and signoff.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
8 years of experience in Automatic Test Pattern Generation (ATPG) methods.
4 years of people management experience developing employees.
Experience with multiple projects in DFT design and verification, DFT specification, definition, architecture, and insertion.
Experience with DFT techniques and tools, ASIC DFT synthesis, simulation, and verification flow.
Experience in leading DFT activities throughout an ASIC development flow.
Preferred qualifications:
Master's degree in Electrical Engineering or a related field.
Experience in JTAG and iJTAG protocols and architectures.
Experience in post-silicon test or product engineering.
Experience in SoC cycles, silicon bring-up, and silicon debug activities.
Knowledge of fault modeling techniques.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will be part of a team developing Application-Specific Integrated Circuit (ASIC) used to accelerate networking in data centers. You will have dynamic, multi-faceted responsibilities in areas such as project definition, design, and implementation. You will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators.
You will be responsible for performance analysis for an end-to-end networking stack using your deep knowledge of RDMA based transports.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our companyrs, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Participate in evaluation of future ASIC designs and general architecture for executing our companys data center networking roadmap: off-the-shelf components, vendor co-developments, custom designs, and chiplets.
Collaborate in developing new layer protocols for data center networking.
Understand how it interacts with software and other ASIC subsystems to implement groundbreaking data center networks.
Define performance hardware/software interfaces. Write micro architecture and design specifications.
Define efficient micro-architecture and block partitioning/interfaces and flows.
Requirements:
Minimum qualifications:
Bachelor's degree in Computer Science, a related field, or equivalent practical experience.
10 years of experience architecting networking ASICs from specification to production.
Experience working with design networking like: RDMA and or packet processing and system design principles for low latency, throughput, security, and reliability.
Experience developing RTL for ASIC subsystems.
Experience in cross-functional, micro-architecture, design, verification, logic synthesis, and timing closure.
Preferred qualifications:
Experience in Transmission Control Protocol (TCP), IP, Ethernet, PCIE and Dynamic random-access memory (DRAM), Network on Chip (NoC) principles and protocols.
Experience in estimating performance by analysis, modeling, and network simulation, and defining and driving performance test plans.
Experience working with Software teams optimizing the hardware/software interface.
Experience architecting networking switches, end points, and hardware offloads.
Experience in a procedural programming language (e.g., C++, Python, Go).
Understanding of packet classification, processing, queueing, scheduling, switching, routing, traffic conditioning, and telemetry.
This position is open to all candidates.
 
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28/05/2025
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for an Asic Design Engineer to join the DFT design team and develop the next generation DFT technologies.

As a design engineer in the DFT design team, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.

As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.

Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.
Requirements:
What we need to see:

B.Sc. in Electrical Engineering or Computer engineering or equivalent experience.

1+ years of practical experience.

Exposure to rtl implementation and coding.

Familiarity with verification tools.

Strong debugging, problem solving and analytical skills.

Strong communication and social skills are required.

Ability to work in a geographically diverse team environment.

Self motivated, independent and target oriented.

Ways to stand out from the crowd:

Prior Design or Verification experience.

Experience in developing sophisticated design blocks.

Integration of design elements to large cluster or full-chip.

Experience in working with back-end on area, power and timing closures.

Scripting ability.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will use Application-Specific Integrated Circuit (ASIC) design to be part of a team that creates the System on a Chip (SoC) design cycle from start to finish. You will collaborate with design and verification engineers in projects, creating architecture definitions with Register-Transfer Level (RTL) coding, and running block level simulations. You will contribute in ASIC designs from design specification to production. You will collaborate with members of architecture, software, verification, power, timing, synthesis and more to specify and deliver high quality SoC/RTL. You will also solve technical issues with innovative micro-architecture and practical logic solutions, and evaluate design options with performance, power, and area in mind.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our company platforms, we make our company's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Own Networking Internet Protocols (IP's) Design team including definition, implementation and deployment.
Define IP development methodologies sharing unified blocks within the IP design team.
Define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Demonstrate technical involvement throughout the entire Intellectual Property (IP) development cycle, ensuring seamless integration into System-on-Chip (SoC).
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, VHDL), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
10 years of experience with design from micro-architecture through implementation with Verilog/SystemVerilog, or VHDL language.
10 years of experience in managing teams and groups.
Experience working with design networking like Remote Direct Memory Access (RDMA) or packet processing and system design principles for low latency, high throughput, security, and reliability.
Experience with chip design flow, chip architecture, design methodologies, physical design, and verification processes.
Preferred qualifications:
Master's degree or PhD in Engineering or equivalent practical experience.
Experience in leading chip development projects and teams and execution.
Ability to motivate and focus on collaborative teams to achieve testing goals.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8186825
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will be part of a team developing Application-Specific Integrated Circuit (ASIC) used to accelerate networking in data centers. You will have dynamic, multi-faceted responsibilities in areas such as project definition, design, and implementation. You will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators. You will be responsible for performance analysis for an end to end networking stack using your deep knowledge of RDMA based transports.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our companyrs, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Participate in evaluation of future ASIC designs and general architecture for executing our companys data center networking roadmap, off-the-shelf components, vendor co-developments, custom designs, and chiplets.
Collaborate in developing new layer protocols for data center networking.
Understand how everything interacts with software and other ASIC subsystems to implement groundbreaking data center networks.
Define performance hardware/software interfaces. Write micro-architecture and design specifications.
Define efficient micro-architecture and block partitioning/interfaces and flows.
Requirements:
Minimum qualifications:
Bachelor's degree or equivalent practical experience.
8 years of experience architecting networking ASICs from specification to production.
Experience working with design networking like: RDMA and or packet processing and system design principles for low latency, high throughput, security, and reliability.
Experience developing RTL for ASIC subsystems.
Experience in cross-functional, micro-architecture, design, verification, logic synthesis, and timing closure.
Preferred qualifications:
Experience in Transmission Control Protocol (TCP), IP, Ethernet, PCIE and Dynamic Random-Access Memory (DRAM), Network on Chip (NoC) principles and protocols.
Experience in estimating performance by analysis, modeling, and network simulation. Skilled in defining and driving performance test plans.
Experience working with software teams optimizing the hardware/software interface.
Experience architecting networking switches, end points, and hardware offloads.
Experience in a procedural programming language (e.g. C++, Python, Go.).
Understanding of packet classification, processing, queueing, scheduling, switching, routing, traffic conditioning, and telemetry.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8187391
סגור
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סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our companyrs, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Develop and execute comprehensive validation plans for our company's custom silicon, covering functional, performance, power, and reliability aspects.
Design and build scalable validation test infrastructure, including hardware setups, software frameworks, and automation tools on Emulation and/or FPGA platforms.
Lead the debugging and resolution of complex silicon issues, collaborating with cross-functional teams such as design, architecture, software, and firmware.
Analyze validation data to identify trends, root causes, and opportunities for improvement in silicon quality and reliability.
Build and mentor a high-performing team of silicon validation engineers, fostering a culture of collaboration, innovation, and technical excellence.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
8 years of experience in silicon validation or a related field.
Experience in leading technical teams and build cross-functional relationships.
Experience in silicon validation methodologies, tools, and techniques, including hardware setups, and automation tools on Emulation or FPGA platforms.
Preferred qualifications:
Experience with Field-Programmable Gate Array (FPGA) prototyping, Hardware Emulation (ZeBu Server, Palladium, Veloce), or simulation platforms.
Knowledge of cloud computing technologies and architectures, including data centers, networking, and storage.
Familiarity with hardware description languages (e.g., Verilog, VHDL) and hardware verification methodologies (e.g., UVM, SystemVerilog).
Excellent communication skills, with the ability to convey technical concepts to audiences.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8187460
סגור
שירות זה פתוח ללקוחות VIP בלבד