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04/06/2025
Location: Yokne`am
Job Type: Full Time
We are now looking for best-in-class Senior Chip Design Verification Engineer to join our outstanding Network Adapter Silicon group, developing the industry's best high-speed smart communication devices, Data Processing Unit (DPU), delivering the highest throughput and lowest latency! Come and take a significant part in verifying and designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you'll be doing:

Work within a Networking Fullchip team, which is responsible for delivering the chip to tapeout and serves as a critical verification stage before final chip release.

Gain a strong understanding of chip micro-architecture and features, and develop the verification strategyincluding checkers, testcases, and debug plans - for fullchip/cluster level validation.

Enable and validate new features at the fullchip/cluster level, ensuring high quality and reliability under challenging constraints.

Be an integral part of an innovative team, actively participating in the creation and implementation of new verification infrastructures using advanced AI tools.
Requirements:
What we need to see:

B.Sc. or above in Electrical Engineering or Computer Engineering.

5+ years of validated experience.

Professional verification experience, knowledge in advanced verification methodologies and tools.

A team player with excellent communication and interpersonal skills.

Strong debugging, problem solving and analytical skills.

Demonstrates deep understanding in design and verification logic.

Self-motivated, ability to work independently and drive tasks to completion.


Ways to stand out from the crowd:

Prior design or verification experience of high-speed interconnects, smart NIC and/or SoC.

Experience in developing verification environments in Specman and/or prior knowledge in Verilog.

Knowledge in network flows and protocols.
This position is open to all candidates.
 
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28/05/2025
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Chip Design Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What youll be doing:

Work in a combined design and verification team that develops front-end design for the Switch silicon, GPU and HCA.

Plan and Design Verification units/blocks according to Arch & Micro arch specifications under challenging constraints with high orientation to power, area, and performance.

Work closely with multiple teams within organizations such as Architecture, Micro-Architecture, and FWinteraction with organization-wide groups.
Requirements:
What we need to see:

Electrical Engineering B.Sc., Computer Engineering or other relevant engineering department graduate with high scores, or equivalent experience.

5+ years of experience in RTL verification. Less experienced engineers with high university grades will also be considered.

Experience in full and cluster-level verification is an advantage.

Self-motivated, ability to work independently and drive tasks to completion.

A great teammate with strong communication and interpersonal skills.

Ways to stand out from the crowd:

Knowledge in Specman, Verilog.

Knowledge in Networking.

Great interpersonal skills.
This position is open to all candidates.
 
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28/05/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Senior Chip Design Verification Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating new chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you'll be doing:
Take a crucial part in developing NVIDIA's next-generation chip controller.
Design and verification with challenging multi-discipline context.
Take part in the development of all NVIDIA's networking and GPU networking chips and systems.
Requirements:
What we need to see:
B.SC./ M.SC. in Computer Engineering/Electrical Engineering/Communication Engineering.
5+ years of validated experience in ASIC Verification.
High Level of English.

Ways to stand out from the crowd:
Background in Specman.
Knowledge in HDL (Verilog/VHDL).
Knowledge in Mixed Signals, Analog, and Behavioral Models for Verification.
Knowledge in Chip boot and Infrastructures.
This position is open to all candidates.
 
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28/05/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.
Requirements:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent work experience.

5+ years of experience in physical design.

Proven experience in RTL2GDS flows and methodologies.

Knowledge in physical design flows and methodologies (PNR, STA, physical verification).

Deep understanding of all aspects of Physical construction and Integration.

Strong background of Physical Design Verification methodology LVS/DRC.

Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

Great teammate.
This position is open to all candidates.
 
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28/05/2025
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design CAD Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be in charge of developing physical design, synthesis, STA and Logic eq methodologies for implementation of networking chips and SOCs.

Work closely with block owners. full Chip STA engineers and project managers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art physical design problems that are needed for Our chips.

Additional responsibilities include participating and developing flow and tool methodologies for chip floorplan, power and clock distribution, P&R, timing analysis and closure, power and noise analysis and back-end verification across multiple projects.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering/Computer Engineering (or equivalent experience).

At least 2 years of relevant experience

Proficiency using Python, Perl, Tcl, Make scripting.

Expertise in analysing and converging crosstalk delay, noise glitch, and electrical/manufacturing rules in deep-sub micron processes.

Knowledge in physical design and optimization e.g. placement, routing, cell sizing, buffering, logic restructuring, etc. to improve timing and power required and implementing them through ECOs is required.

Knowledge in process variation effect modelling and experience in design convergence taking into account variations.

Successful track record of delivering designs to production is necessary.

Self-motivation, attention to detail, and good written, verbal, and presentation skills are critical to success in this role.

Ways to stand out from the crowd:

Familiarity with synthesis, place and route, STA EDA tools from Synopsys (DC/FC/PT), Cadence (Innovus/Tempus)

Experience in methodology definition / flow owner of synthesis / Place and Route/ STA steps is an advantage.

Great teammate.

Ownership, self-learning skills, and ability to work autonomously.
This position is open to all candidates.
 
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28/05/2025
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are now looking for a Chip Design Manager to join our Network Adapter Silicon group. As a Chip Design Manager in our Networking business unit, you'll join a group of passionate professionals to design, lead the implementation of the next generation state-of-the-art Networking Silicon chips . In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What youll be doing:
Lead a team of design and verification engineers that develops core units within the NIC silicon.
Be responsible for the delivery of complex RTL units and its verification.
Work closely with multiple teams within organizations such as Architecture, Full chip Micro-Architecture, BE, and FW.
Requirements:
What we need to see:
3+ years of managerial experience.
6+ overall years of experience in RTL of complex design or complex verification.
Electrical Engineering B.Sc., Computer Engineering or other relevant engineering department graduate with high scores, or equivalent experience.
Self-motivated, ability to work, lead and drive tasks to completion.
A team player with good communication and interpersonal skills.
Dynamic verification hands on experience - an advantage.
Knowledge in network protocols an advantage.

Ways to stand out from the crowd:
Knowledge in Specman and Verilog.
Knowledge in Networking, ASIC System Integrations.
Great interpersonal skills.
This position is open to all candidates.
 
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04/06/2025
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a Chip Design Verification Manager for developing the next generation DFT technologies.

As a Chip Design Verification Manager in the DFT team, you will lead teams that verify the design and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our DFT solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.

What you'll be doing:

In this position you will be responsible to lead verification teams in the the definition, flow and execution of verification of the DFT design, architecture and micro-architecture.

As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.

Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.
Requirements:
BSc. in Electrical Engineering or Computer engineering, or equivalent experience.

5+ overall years of practical verification experience.

2+ years of verification managerial experience.

Experience in developing verification environments and random based verification for unit level and system level using verification tools (simulation tools, Verilog, debug tools like Simvision/Debussy).

Experience with Specman is a plus.

Good understanding of RTL design (Verilog).

Strong debugging, problem solving and analytical skills.

Ability to work in a geographically diverse team environment.

Good communication skills, motivator and target oriented.
This position is open to all candidates.
 
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03/06/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent experience.

Knowledge in physical design flows and methodologies (PNR, STA, physical verification).

Deep understanding of all aspects of Physical construction and Integration.

Knowledge in Physical Design Verification methodology LVS/DRC.

Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

3-4 years of relevant experience

Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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26/05/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a Senior Chip-Design Verification Engineer to join our Network Adapter Silicon group. As a Senior Verification Engineer at NVIDIA Networking Silicon team, you will join a group of passionate engineers to design and implement the next generation state-of-the-art Networking Silicon chips. In this position, you will make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a combined design and verification team which develops core units within the Networking silicon.

Build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, FW and Post-Silicon validation.
Requirements:
B.Sc. in Electrical Engineering or Computer Engineering, or equivalent experience.

8+ years of proven experience in RTL verification.

Background in Specman.

Knowledge of HDL (Verilog/VHDL).

A great teammate with good communication and interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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28/05/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are seeking a highly skilled and expert Verification Lead to join our PCIe Firmware team. In this role, you will be responsible for supervising the verification plans, monitoring their execution within the teams, guiding engineers through the verification implementation, and tracking coverage, Coverity, and other relevant statistics. You will be joining a team dedicated to developing groundbreaking technology and building the core technology of next-generation devices across various fields, including low-level C layer between hardware and firmware, C++ verification environment, automation challenges, and Python testing environment.

What youll be doing:

Develop and lead verification plans, ensuring they are driven effectively within the teams.

Provide guidance to engineers on verification implementation within the verification environment.

Monitor coverage, Coverity, and other statistics to ensure comprehensive verification and optimization of next-generation NVIDIA products.

Work closely with firmware design, chip design, software, and architecture teams to define and craft both legacy and new low-level firmware flows.

Enhance methodologies and automated processes to improve efficiency and effectiveness.
Requirements:
What we need to see:

B.Sc. in Electrical Engineering, Computer Science, or Computer Engineering, or equivalent experience.

12+ years of relevant experience.

Knowledge of object-oriented programming, computer structure, operating systems, and familiarity with Python or Bash is advantageous.

Problem-solving skills, independence, curiosity, strong interpersonal skills, and self-learning ability. Multi-disciplinary capabilities and the ability to work with a wide interface of people are crucial.

Ways to stand out from the crowd:

Familiarity with hardware verification concepts and tools such as C++, Jenkins automation, hardware familiarity, and test-driven development (TDD).

Experience in partnering with software and architecture teams to define and implement firmware.

Knowledge of PCIe, networking, Linux, and scripting languages, along with experience in solving in-depth problems.

Knowledge of object-oriented programming, computer structure, operating systems, and familiarity with Python or Bash is advantageous.
This position is open to all candidates.
 
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04/06/2025
Location: Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.
Requirements:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent work experience.

3+ years of experience in physical design.

Proven experience in RTL2GDS flows and methodologies.

Knowledge in physical design flows and methodologies (PNR, STA, physical verification).

Deep understanding of all aspects of Physical construction and Integration.

Deep understanding of Physical Design Verification methodology LVS/DRC.

Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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