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Provide our customers technical and engineering expertise in their ASIC design HW verification process, using our HAV Platforms and Solutions:
Analyze customers verification methodologies and targets, platform and Testbench solutions planning.
Drive and execute HAV products Evaluations on customers designs.
Support customers in deployment of the HAV products, from RTL code compilation and synthesis, towards SoC-level full functionality bring-up on the systems.
Hands-on bring-up of Emulation Testbenches, including interface protocol Transactors, memory models SpeedAdapters, C++ code, and automation scripts.
Regularly interact with customers as their first contact to address any quality issue or required improvements in our products and their collaterals.
Work internally with R&Ds to provide feedbacks on products, track development process and roadmaps.
Work internally with Sales team on accounts strategy and business growth opportunities.

we are seeking for a V&V Engineer, to join the QA, RA & CA department.
As a V&V Engineer, your principal task will be to verify and validate Medical Devices. You will be responsible for HW & System testing including test protocols and reports.
The main responsibilities within this role:
Design, develop and execute system Verification and Validation test procedures.
Responsible for writing detailed, comprehensive, and well-structured V&V test protocols and reports ensuring requirements coverage and traceability.
Analyzing issues and failures in the system.
Work in a highly multidisciplinary and complex technical environment and lead testing of cross-functional projects (with emphasis on mechanical and electro-optical aspects)
Being involved in the reliability and integration tests for prototypes under development
Coordination and management with external testing laboratories
Define and maintain the Verification & Validation plans.
Plan and arrange the work, schedules, and equipment required for testing and evaluating standard and special devices.
Identify, investigate, and document all findings raised during testing.
Work closely with cross functional team members including R&D (System, SW&HW), QA, RA and Product departments.

We are looking for a Senior Chip Design Verification Engineer for developing the next generation DFT technologies.

As a Senior Chip Design Verification Engineer in the DFT team in our coompany, you will verify the design and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our DFT solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.

What you'll be doing:
In this position, you will be responsible for verification of the DFT design, architecture and micro-architecture using sophisticated verification methodologies.
As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.
Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.

We are looking for a skilled and driven Experiment Operator to join our team.
As an Experiment Operator, your role will be examining and interpreting extensive datasets in order to derive valuable insights and offer actionable solutions.
You will have the opportunity to work both independently and collaboratively in a variety of testing environments, such as laboratories and outdoor settings.
It is expected that you display proficiency in operating multiple devices efficiently.
Additionally, your contribution will be valuable in creating test plans and reports to effectively manage and organize test data.

We are looking for outstanding Algorithms Developers to join our team.
In this role, you will do:
End to end development and deployment of high frequency trading algorithms.
Development and application of trading algos in a highly competitive real time environment.
Analyzing large and complex data sets finding ways to improve existing trading strategies.
Building scalable infrastructures and developing algorithms for modeling the financial market.

Required ASIC Verification Engineer
Verification Group in a growing group responsible for pre-silicon ASIC Verification of complex chips implementing an advanced modem technology.
As part of the role, you will architect, develop & own blocks / sub-subsystem / system-level verification benches. You will be a major contributor to advanced SV UVM methodologies and to infrastructure development. You will be part of an advanced development flow, using state-of-the-art development & Verification tools and will work closely with the chip architects and RTL / VLSI design teams.
RESPONSIBILITIES
The Verification Engineer will be responsible for different HW blocks at module-level and sub-system level and is expected to:
Have an expert-level understanding of assigned HW blocks as well as a good understanding of the block in the context of whole system.
Communicate with architect, designer, algorithm and other verification engineers to lead complex verification tasks, both on module-level and sub-system testing.
Design complete verification environments.
Implement design in full UVM environment.
Perform full block regressions and collection of functional coverage.

Required Algo Engineer
Within the Algorithm team, you will be responsible for designing and specifying new architectures/algorithms for the physical layer of wireless products. You will work tightly with SW team, ASIC team and Integration team.
RESPONSIBILITIES
Design new algorithms/defining new architectures for the existing and future products
Implement and validate the methods in the baseband simulator of the DSP team
Produce and update design/performance documents along with the development process
Support of the Asic team for the Verilog/VHDL implementation
Support for investigations on performance issues in house and on site.

Required Senior Design Verification Engineer ​
Background
Things work differently in space. We develop New-Space hardware and software that work flawlessly in harsh space conditions. Our technology is already deployed in space and used in many satellites and more than 50 space missions across the solar system with zero failures.
We are expanding our Design Verification team, and invite you to explore Space with us! The job includes taking a viable role in the VLSI verification tasks of our line of products.
What you will be doing:
Be part of the verification Team
Plan & implement UVM verification environments
Interact with Architecture, Design, SW and Validation teams
Define new DV methodologies and improve existing ones
Work on both ASIC and FPGA Space system projects.

If you are looking to make an impact, come and join a team developing the next generation of space communication technology. We are looking for an experienced Algorithms Engineer to lead the innovation of the next-generation space connectivity technology.
What you will be doing​:
Design and develop state-of-the-art communication algorithms.
Key contributor to modem and MAC architecture, design, and implementation.
Conduct and lead algorithm research, including theoretical analysis and simulations.
Lead technical reviews with key stakeholders to present algorithms and system design approaches.
Work closely with System, RF, HW, SW teams to lead high-impact technical decisions about system design and implementation.

We are looking for an Algorithms Manager who will lead the design and implementation of the automotive imaging radar Algorithms stack.
What will you do?
Lead the team which defines and scales up our radar high performance algorithms and make them meet the ADAS and Autonomous Vehicles standards and beyond
Drive and consistently improve our radar performance
Identify key areas of Next Generation improvements, recommend research directions and system solutions
Design, develop and implement Radar data analysis methodology
Be a knowledge source for automotive radar KPIs
Work closely with different stakeholders that include external customers and internal interfaces like SW, HW, and others.

We are looking for an Algorithms Engineer who will handle the design and implementation of the automotive imaging radar Algorithms stack.
What will you do?
Be part of the team that defines and scales up our radar high performance algorithms and make them meet the ADAS and Autonomous Vehicles standards and beyond
Consistently improve our radar performance
Design, develop and implement Radar data analysis methodology
Be a knowledge source for automotive radar KPIs
Work closely with different stakeholders that include external customers and internal interfaces like SW, HW, and others.