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our company , an AI-first company, is revolutionizing how visual content is created. With a mission to bridge the gap between imagination and creation, we are dedicated to bringing cutting-edge technology to the creative and business spaces.
Our advanced AI photo and video generation models, including our open-source LTXV model, power our apps and platforms including Facetune, Photoleap, Videoleap, and LTX Studio, allowing creators and brands to leverage the latest research breakthroughs, offering endless control over their creative potential. Our influencer marketing platform, Popular Pays, provides creators the ability to monetize their work and offers brands opportunities to scale their content through tailored creator partnerships.
What you will be doing
Conducting applied research, keeping in mind the constraints and requirements of real world solutions
Mentoring other researchers in your team and leading projects with multiple participants.
Working with engineers, designers and product managers to aim your research to the right place.
Keeping up with new research developments in academia and exposing them to all team members.
Writing high-quality code (aiming at production-grade) and maintaining efficient workflows in your research process, using best practices and tools.

our company, an AI-first company, is revolutionizing how visual content is created. With a mission to bridge the gap between imagination and creation, we are dedicated to bringing cutting-edge technology to the creative and business spaces.
Our advanced AI photo and video generation models, including our open-source LTXV model, power our apps and platforms, including Facetune, Photoleap, Videoleap, and LTX Studio, allowing creators and brands to leverage the latest research breakthroughs, offering endless control over their creative potential. Our influencer marketing platform, Popular Pays, provides creators the ability to monetize their work and offers brands opportunities to scale their content through tailored creator partnerships.
What you will be doing
As an ML Software Engineer with a focus on low-level and CUDA-based optimizations, you will play a key role in shaping the design, performance, and scalability of our companys machine learning inference systems. Youll work on deeply technical challenges at the intersection of GPU acceleration, systems architecture, and ML deployment.
Your expertise in CUDA, C/C++, and performance tuning will be crucial in enhancing runtime efficiency across heterogeneous computing environments. Youll collaborate with designers, researchers, and backend engineers to build production-grade ML pipelines that are optimized for latency, throughput, and memory use, contributing directly to the infrastructure powering our company's next-generation AI products.This role is ideal for an engineer with strong systems-level thinking, deep familiarity with GPU internals, and a passion for pushing the boundaries of performance and efficiency in machine learning infrastructure.
Responsibilities
Design and implement highly optimized GPU-accelerated ML inference systems using CUDA and low-level parallelism techniques
Optimize memory, compute, and data flow to meet real-time or high-throughput constraints
Improve the performance, reliability, and observability of our inference backend across diverse compute targets (CPU/GPU)
Collaborate with cross-functional teams (including researchers, developers, and designers) to deliver efficient and scalable inference solutions
Contribute to ComfyUI and internal infrastructure to improve usability and performance of model execution flows
Investigate performance bottlenecks at all levels of the stackfrom Python to kernel-level execution
Navigate and enhance a large, complex, production-grade codebase
Drive innovation in low-level system design to support future ML workloads.

We are looking for a Junior Internal Tools Developer! An entry-level opportunity for a motivated individual to join our internal tools team and gain hands-on experience in a unique, non-traditional development role. Key Responsibilities:
* Build and maintain graphical objects with external data injection and editing capabilities using a dedicated schema application (Schemas)
* Work with a unique internal tool (training will be provided)
* Ongoing work with JSON
* Collaborate with additional teams across the organization

Computer Vision Algorithm engineer Location: Haifa A leading defense technology company is seeking an experienced Computer Vision Algorithm engineer to join a multidisciplinary team developing advanced EO tracking and detection systems.

Senior Algorithm team leader Image Processing & Computer Vision Location: Haifa we're looking for a Senior Algorithm team leader for image processing and computer vision in electro-optical systems.

we are looking for a Junior Design Engineer, Google Cloud, Network
Responsibilities
Define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, VHDL), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power, and field-programmable gate array/silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Communicate and work with multi-disciplined and multi-site teams.

we are looking for a Networking Performance Modeling Architect, Google Cloud
Responsibilities
Design, develop, test, deploy, maintain, and improve SOC software modeling and other software tools.
Manage individual project priorities, deadlines, and deliverables.
Collaborate with hardware and software architecture teams, SOC performance modeling team, and other Google software teams.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities
Define, develop, and execute post-silicon validation content on both pre-silicon and real silicon platforms.
Drive silicon from being a chip towards becoming a product.
Debug and investigate issues along cross-functional teams such as Firmware, Software, Design, DV, - ARCH and multiple production teams.
Provide a quality functional coverage for Google designs.

we are looking for a Senior Design Integration Engineer, Google Cloud, Networking
Responsibilities
Define and implement solutions for design, integration and verification problems using in-house and external technical solutions or tools. Ensure chip quality by implementing best practices and implementing quality control measures.
Participate in project development and convergence with the highest quality, and manage issues as they arise through design and implementation.
Connect between RTL design, physical design, Design for Test (DFT), external IPs and SoC while maintaining project priorities.
Maintain project infrastructure and stability.

we are looking for a Firmware Engineer, Networking, Google Cloud
Responsibilities
Build C/C++ firmware running on embedded processors with limited memory footprints on the SoCs.
Develop tools to update and debug the firmware, enable emulation, chip bringup, and hardware debugging.
Play key roles in Emulation, chip bring up, and SoC deployment, and contribute to all layers of the data center software stack to deploy SoCs to production.
Create code generators to generate C++ code based on hardware specifications.

As a CPU Workload Analysis Researcher within Google Cloud's MSCA organization, you will be integral to developing silicon solutions powering Google's direct-to-consumer products. You will join a Research and Development team focused on analyzing and profiling workloads requirements within the Google Cloud environment. Your role will involve conducting in-depth research on CPU optimization, feature development, and ML usages over compute platforms, contributing to identifying key areas of investment and future opportunities. This role offers a unique opportunity to perform groundbreaking research with a significant impact on both research methodologies and industry products, within the server chip architecture team. Your work will directly influence the next generation of hardware experiences for millions of Google users and Cloud customers.

Responsibilities
Plan and execute detailed analysis of CPU workloads within the Google Cloud infrastructure, analyze trends and map future requirements.
Collaborate closely with architecture and modeling owners to understand design specifications and identify critical scenarios related to CPU performance and efficiency.
Develop and implement custom workload generation tools and methodologies to simulate real-world usage patterns on Google Cloud platforms.
Analyze the impact of machine learning applications on CPU usage, identifying opportunities for optimization and feature enhancements.
Lead the investigation and development of metrics to measure CPU performance and efficiency, presenting findings to stakeholders and contributing to strategic decisions.

we are looking for a CPU Logic Design Engineer, Google Cloud, PhD, University Graduate, Start 2025
Responsibilities
Contribute to CPU frontend designs, emphasizing on microarchitecture and RTL design for the next generation CPU.
Propose performance enhancing microarchitecture features with efficiency in mind. Work with architects and performance teams for trade-off studies. Communicate pros and cons of microarchitecture enhancements. Facilitate final decision making.
Deliver designs meeting Power, performance, and area (PPA) goals with production quality.
Become familiar with techniques for at least one processor functional block. Interpret the techniques into design constructs and languages in order to provide guidance to and participate in the performance modeling effort.

We are looking for a highly motivated backend software engineer specializing in creating high-scale, distributed backend systems.
You must demonstrate strong software engineering skills, excellent interpersonal communication, extreme ownership, and the ability to accept and give meaningful technical feedback.
You will be responsible for designing architecture, writing correct, robust code, maintaining and improving existing functionality, and shipping new features.
You will work as part of a Scrum-Agile cross-functional team and collaborate with front-end engineers, quality engineers, product managers, and more.
The platform you help us build will scale novel functionality to millions of Plus users worldwide.
Our team strives to set the bar for real-time, high-scale, mission-critical trading systems. We want to work with people who are excited by this goal and have the talent to deliver on it.
What Youll Do - Responsibilities:
Design and build scalable, high-availability mission-critical systems and APIs
Drive the migration of large-scale, distributed trading services towards cloud-native microservices
Solve problems using distributed, asynchronous messaging
Tackle technical challenges - performance, fault-tolerance, security, and live production issues
Work closely with product, DevOps\SRE, and infrastructure teams - we practice full-cycle development where developers own and operate what they build.
Mentor Jr engineers as a Senior member of the team

We are looking for a highly motivated backend software engineer specializing in creating high-scale, distributed backend systems.
You will design and implement ML/AI infrastructure components (model‑serving APIs, inference pipelines, feature stores).
Collaborate closely with data scientists and data engineers to productionize models and automate retraining workflows.
You must demonstrate strong software engineering skills, excellent interpersonal communication, extreme ownership, and the ability to accept and give meaningful technical feedback.
You will be responsible for designing architecture, writing correct, robust code, maintaining and improving existing functionality, and shipping new features.
You will work as part of a Scrum-Agile cross-functional team and collaborate with front-end engineers, quality engineers, product managers, and more.
The platform you help us build will scale novel functionality to millions of Plus users worldwide.
Our team strives to set the bar for real-time, high-scale, mission-critical trading systems. We want to work with people who are excited by this goal and have the talent to deliver on it.
What Youll Do - Responsibilities:
Containerize and deploy ML models at scale.
Build and maintain CI/CD pipelines for automated model training, testing, and deployment.
Work with data engineers to integrate streaming/batch data into feature pipelines
Design and build scalable, high-availability mission-critical systems and APIs
Drive the migration of large-scale, distributed trading services towards cloud-native microservices
Tackle technical challenges - performance, fault-tolerance, security, and live production issues
Work closely with product, DevOps\SRE, and infrastructure teams - we practice full-cycle development where developers own and operate what they build.

In this role, you will join a Peripheral Component Interconnect Express (PCIe) team and take ownership of post-silicon and pre-silicon validation efforts. You will ensure the Internet Protocol (IP) meets Google's standards while collaborating with cross-functional teams and external vendors.

Responsibilities
Lead or co-lead the PCIe sub system post-silicon logic validation process, including planning, methodology development and co-ordinating with emulation, firmware and testing teams.
Participate in both emulation and post-silicon validation phrases by designing, implementing and excuting tests and tools.
Drive the debugging and resolution of complex silicon issues, collaborating with cross-functional teams across design, architecture, software and firmware.
Analyze validation data to identify trends and root causes and to uncover opportunities for enhancing silicon quality, reliability and performance.