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Location: Tel Aviv-Yafo
Job Type: Full Time and Internship
Required Hardware/Silicon Engineering PhD Intern, 2027
Please complete your application before 23rd October 2026.
About the job
The Cloud and AI Infrastructure team in Israel focuses on building our next-generation systems. The teams work is grounded in creating custom hardware, and as an Intern you'll get to collaborate with engineers from various parts of the organisation to influence the future of Cloud and the AI infrastructure by working on the foundational technology that makes it all possible. This is the hardware that powers everything from Cloud, to our most advanced models like Gemini.
As an intern, you will work on fundamental problems at the intersection of hardware, software, and algorithms. You will collaborate with exceptional engineers and researchers on projects that directly impact our custom silicon portfolio, including general-purpose CPUs, highly specialized AI accelerators like our Tensor Processing Units (TPUs), and complex Systems-on-a-Chip (SoCs). Your responsibilities and projects will be tailored to your expertise and could focus on any part of the system stack. This may include:
Algorithmic Innovation: Developing and analyzing new algorithms that are deeply co-designed with our custom hardware.
Software and Compilers: Building the software stack, compilers, and performance analysis tools that unlock the potential of our unique architectures.
System Architectureand and Modeling: Architecting and modeling future CPUs, TPUs, and SoCs to guide critical design decisions.
Hardware Design and Verification: Contributing to all aspects of silicon creation, from logic design and verification to VLSI physical implementation.
Responsibilities
Responsibilities and detailed projects will be determined based on your educational background, interest, and skills.
Requirements:
Minimum qualifications:
Currently enrolled in a PhD degree in Electrical Engineering, Computer Engineering or a related technical field in Israel, and in your second or final year of education.
Relevant practical or internship experience working in C++ programming.
Relevant practical research or internship experience with one or more of the following: architectural modeling, simulation, or developing software for high-performance computing.
Experience working with data structures or algorithms during coursework/projects, research, internships, or practical experience in school or work (e.g., open-source coding).
Ability to communicate in English fluently, to support client relationship management in this region.
Preferred qualifications:
Relevant practical or internship experience, or personal project experience in hardware or electrical engineering.
Coding experience in one or more of the following programming languages: Python, C, C++, Java, JavaScript.
Ability to complete a 13-17 week full-time internship in Israel starting in either May, June or July 2027.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: More than one
Required Hardware/Electrical Engineering BS/MS Intern, 2027
Please complete your application before November 13, 2026. We encourage you to apply as early as possible as we review applications on a rolling basis.
About the job
The Cloud and AI Infrastructure team in Israel focuses on building our next-generation systems. The team's work is grounded in creating custom hardware, and as an Intern, you'll get to collaborate with engineers from various parts of the organization to influence the future of Cloud and the AI infrastructure by working on the foundational technology that makes it all possible. This is the hardware that powers everything, from Cloud to our most advanced models like Gemini.
As an Electrical Engineering Intern in the domain of Very Large-Scale Integration (VLSI), you will work on designing, developing and verifying next generation chips for our Cloud Compute Infrastructure. You will have the opportunity to collaborate with engineers from various parts of the organisation to help develop our next generation systems on chip (SOC).
Responsibilities:
Responsibilities and detailed projects will be determined based on your educational background, interest and skills.
Requirements:
Minimum qualifications:
Currently enrolled in a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering or a related technical field in Israel.
Relevant practical or internship experience in Hardware System Integration, Signal and Power Integrity, System Validation, Wireless Communications, Product Design, Computer Architecture, Digital Design Verification, Digital Circuits, ASIC Physical Design, FPGAs, Embedded Systems or Memory Systems.
Ability to communicate in English fluently to partner with stakeholders.
Preferred qualifications:
Relevant practical, internship or personal project experience in Hardware or Electrical Engineering.
Coding experience in one or more of the following programming languages: Python, C, C++, Java, JavaScript.
Ability to complete a 12 month internship in Israel starting in either March, April or May 2027.
Currently in your second/final year of education.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo
Job Type: More than one
Required Part-Time Software Engineering PhD Intern, 2027
Please complete your application before 23rd October 2026. We encourage you to apply as early as possible as we review applications on a rolling basis.
This internship is intended for students in their penultimate/final year of education in an accredited full-time PhD degree program in Israel. Participation in the internship program requires that you are located in Israel for this role for the duration of the internship program. Interns will be required to be available to work part-time (minimum 2 days a week, maximum 4 days a week) alongside your studies for a minimum of 26 weeks starting early 2027 (starting in March, April or May) for the duration of the program. Individuals applying for this position will not be eligible for immigration sponsorship.
About the job
As a Software Engineering intern, you will work on a specific project critical to our needs. As a key member of a versatile team, you will work on a specific project critical to our needs. We need our engineers to be versatile, and enthusiastic in addressing problems as we continue to push technology forward. You will design, test, deploy and maintain software solutions as you grow and evolve during your internship.
We are an engineering company at heart. We hire people with a broad set of technical skills who are ready to take on some of technology's greatest challenges and make an impact on users around the world. Engineers not only revolutionize search, they routinely work on scalability and storage solutions, large-scale applications and entirely new platforms for developers around the world. From Ads to Chrome, Android to YouTube, social to local, our engineers are changing the world one technological achievement after another.
Responsibilities
Research, conceive and develop software applications to extend and improve on our product offering.
Contribute to a wide variety of projects using natural language processing, artificial intelligence, data compression, machine learning, and search technologies
Collaborate on scalability issues involing access to data and information.
Utilise exposure to large-scale production software troubleshooting.
Help maintain mission critical services.
Requirements:
Minimum qualifications:
Currently enrolled in a PhD degree in Computer Science or a related technical field in the EMEA region, and in your penultimate/final year of education.
Experience working with data structures or algorithms during coursework/projects, research, internships, or practical experience in school or work (e.g., open-source coding)
Experience with one or more general purpose programming languages (e.g., Java, C/C++, Python, JavaScript, Go, etc.)
Preferred qualifications:
Relevant practical or internship experience (e.g., research assistant, teaching assistant, personal projects, etc) with programming in either: C++, Java, Python, or Go.
Research experience in algorithms, architecture, artificial intelligence, compilers, database, data mining, distributed systems, machine learning, networking, or systems.
Relevant practical or internship experience with one or more of the following: web application development, Unix/Linux, mobile application development, distributed and parallel systems, machine learning, information retrieval, NLP, networking, developing large software systems, or security software development.
Ability to complete a minimum 26 week internship in Israel starting between March - May 2027.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Part Time and Internship
Required Part-Time Software Engineering BS/MS Intern, 2027
Please complete your application before 23rd October 2026. We encourage you to apply as early as possible as we review applications on a rolling basis.
About the job
Please include your expected graduation date (month and year), and availability for the internship on your resume. The specific team and project(s) will be determined based on your educational background, interest and skills.
We offer a range of internships in Software Engineering across Israel. Durations and start dates will vary according to project. Our recruitment team will determine where you fit best based on your resume.
As an Intern, you will work on a specific project critical to our needs. We are working to advance the state of the art in computing and build the next generation of intelligent systems for all products. To achieve this, we work on projects that utilize the latest computer science techniques developed by skilled software developers. Whether we're shaping the future of sustainability, optimizing algorithms, or pioneering AI systems, our teams strive to continuously progress science, advance society, and improve the lives of billions of people.
As a Software Engineering Intern, you'll be a key member of a versatile team, you will work on a specific project critical to our needs. We need our engineers to be versatile, and enthusiastic in addressing new problems as we continue to push technology forward. You will design, test, deploy and maintain software solutions as you grow and evolve during your internship.
Responsibilities
Develop scripts to automate routine tasks.
Analyze information and evaluate results to choose the best solution to effectively solve problems.
Apply knowledge gained in computer science courses to real world problems.
Create and support a productive and innovative team including working with peers, managers and teams.
Requirements:
Minimum qualifications:
Currently enrolled in a Bachelor's or Master's degree in Computer Science or a related technical field in Israel.
Experience working with data structures or algorithms during coursework/projects, research, internships or practical experience in school or work (e.g., open-source coding).
Coding experience in one of the following programming languages: Python, C, C++, Java, JavaScript.
Preferred qualifications:
Relevant practical or internship experience (e.g., research assistant, teaching assistant, personal projects, etc.) with programming in either: C++, Java, Python or Go.
Relevant practical or internship experience with one or more of the following: AI/ML, infrastructure, web application development, Unix/Linux, mobile application development, distributed and parallel systems, machine learning, information retrieval, natural language processing, networking, developing large software systems, or security software development.
Interest and ability to learn other coding languages as needed.
Ability to complete a minimum 26 week internship in Israel starting between March - May 2027.
Currently enrolled in your penultimate/final year of education.
This position is open to all candidates.
 
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חברה חסויה
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Design AI Lead, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Lead an edge AI IP design team including definition, implementation and deployment, and define IP development methodologies sharing unified blocks within the IP design team.
Define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Demonstrate technical involvement throughout the entire Intellectual Property (IP) development cycle, ensuring seamless integration into System-on-Chip (SoC).
Perform RTL development (e.g., coding and debug in SystemVerilog), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Collaborate closely with software, verification, emulation, physical design, packaging, and silicon validation stakeholders to ensure that designs are complete, correct, and performant.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
10 years of experience in design from microarchitecture through implementation using Verilog/SystemVerilog.
4 years of experience in managing teams and groups.
Experience working with system design principles for low latency, high throughput, security, and reliability.
Experience with chip design flow, chip architecture, design methodologies, physical design, and verification processes.
Experience in micro-architecture, design, verification, logic synthesis, and timing closure.
Preferred qualifications:
Master's degree or PhD in Engineering or equivalent practical experience.
Experience in micro-architecture and design of complex AI modules, optimizing their power, performance and area.
Experience in leading chip development projects and teams, and execution.
Ability to motivate and focus on collaborative teams to achieve testing goals.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Software Engineer III, Technical Infrastructure
About the job
Our software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to our needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.
With your technical expertise, you will manage project priorities, deadlines, and deliverables. You will design, develop, test, deploy, maintain, and enhance software solutions.
Responsibilities
Design, develop, and maintain advanced software modeling tools and simulation environments.
Leverage C++, Python, and experimental AI-driven methodologies to perform deep-dive studies and automate analytical workflows.
Conduct in-depth security analysis and threat modeling for hardware-software interfaces.
Develop and implement methodologies for detecting, mitigating, and analyzing side-channel and micro-architectural vulnerabilities, ensuring our systems meet the highest standards of safety and privacy.
Explore, deploy, and scale experimental AI-driven tooling to automate verification workflows, enhance predictive modeling, and accelerate development cycles. Contribute to expanding the team's suite of AI-assisted capabilities.
Requirements:
Minimum qualifications:
Bachelors degree or equivalent practical experience.
2 years of experience with software development in one or more programming languages (e.g. C++), or 1 year of experience with an advanced degree.
Preferred qualifications:
Master's degree or PhD in Computer Science or related technical fields.
2 years of experience with data structures and algorithms.
Experience in modern, high-performance CPU/ML architecture and micro-architecture.
Experience developing accessible technologies.
Experience with Python programming.
Experience in security analytics and demonstrated leadership in complex technical projects, including system integration and performance optimization.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Edge-AI SoC Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity.
We're the driving force behind groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
8 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, or a related field.
Experience with verification techniques, and the full verification life cycle.
Experience with Application-Specific Integrated Circuit (ASIC) standard interfaces and memory system architecture.
Experience with performance verification of ASICs and ASIC components.
Experience in four or more System on a Chip (SOC) cycles.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Requred SoC Power Architect, Cloud, Silicon
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Power Architect, you will not just design chips; you will define the energy efficiency of the infrastructure that powers our services worldwide.
In this role, you will be at the intersection of architecture, logic design, physical implementation, and system software. You will own the power architecture for next-generation custom SoCs (System on Chips), making critical trade-offs between performance, thermal constraints, and power delivery to build the most efficient computing platforms on the planet.
Responsibilities
Define and own the SoC power architecture, including complex power domains, clocking structures, and power delivery network (PDN) solutions to achieve optimal performance-per-watt.
Architect sophisticated power management policies, including dynamic voltage and frequency scaling (DVFS), power gating, and state strategies. Define the hardware/software interface for the Power management unit (PMU) and provide power management specifications.
Lead collaboration across architecture, RTL, physical design, packaging and validation teams to establish power budgets and specifications. Ensure power requirements are met from concept to tape-out.
Develop high-fidelity power and performance models to evaluate architectural features early in the design cycle. Drive pre-silicon power estimation and analysis to guide design decisions.
Lead post-silicon power analysis, correlating lab measurements with pre-silicon models to close the loop and improve future methodologies.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or equivalent practical experience.
10 years of experience in ASIC/SoC architecture or design with a focus on power optimizations.
Experience developing or using power and performance modeling tools to drive architectural trade-offs.
Experience in low-power design techniques (e.g., UPF/CPF, multi-voltage islands, power gating, clock gating, etc.) and on-chip power management IP.
Preferred qualifications:
Masters degree or PhD in Electrical Engineering, Computer Engineering, or a related field.
Experience in the design and analysis of full-chip power integrity, including interactions between clocking, reset, and power sequencing.
Experience with post-silicon bring-up, power calibration, thermal management, and debugging in a lab environment.
Experience with data center or server SoC power architecture and management requirements.
Experience with industry-standard EDA power tools (e.g., Conformal LP, Power-Artist, PrimeTime-PX, Joules) and simulation environments.
Familiarity with modern workload analysis (AI/ML, transcoding, networking) and their impact on SoC power profiles.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Staff Design Engineer, Networking, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will be part of a team developing application-specific integrated circuits (ASICs) used to accelerate networking in data centers. You will have multiple responsibilities in areas such as project definition, design, and implementation. You will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators.You will also be responsible for performance analysis for a networking stack using your knowledge.
Responsibilities
Lead an ASIC subsystem.
Understand how it interacts with software and other ASIC subsystems to implement data center networks.
Define hardware/software interfaces. Write micro architecture and design specifications.
Define efficient micro-architecture and block partitioning/interfaces and flows.
Collaborate closely with software, verification, and physical design stakeholders to ensure the designs are complete, correct, and performant.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
10 years of experience architecting networking ASICs from specification to production.
Experience developing Register-Transfer Level (RTL) for ASIC subsystems.
Experience with cross-functional engagement in micro-architecture, design, verification, logic synthesis, and timing closure.
Preferred qualifications:
Experience working with software teams optimizing the hardware/software interface.
Experience architecting networking switches, end points, and hardware offloads.
Experience working with design networking like: remote direct memory access (RDMA) or packet processing and system design principles for low latency, high throughput, security, and reliability.
Experience in transmission control protocol (TCP), IP, ethernet, peripheral component interconnect express (PCIE) and dynamic random access memory (DRAM) including network on chip (NoC) principles and protocols (e.g., AXI, ACE, and CHI).
Proficiency in procedural programming language (e.g., C++, Python, Go).
Understanding of packet classification, processing, queuing, scheduling, switching, traffic conditioning, and telemetry.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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תודה על שיתוף הפעולה
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required SoC Test Automation and Infrastructure Lead, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our data centers are the most advanced in the world. In this role, you will help to manufacture the SoCs that power these data centers by developing and deploying comprehensive manufacturing test and data analytics solutions for high-volume manufacturing at wafer fabrications and Outsourced Semiconductor Assembly and Test (OSATs). You will have an opportunity to create silicon in the most advanced technologies and follow it into the field to close the loop back to design and test for the next-generation of chips.
You will help to integrate SoC technologies into devices and drive manufacturing test flows to assure performance and screen devices, drive yield improvement, cost optimization and work closely with cross-functional teams to ensure the optimal test coverage in production to ensure high quality SoCs
You will have a strong understanding of IC flows, wafer processing, testing, qualification, diagnostics and failure analysis. You will work with various groups to deploy screening methodologies and flows for data processing, analytics and diagnostics. You will drive the release of cost effective production test solutions into mass production to hit yield and quality goals.
Responsibilities:
Provide tools, set the environment and create automation to silicon engineering (SiEng) teams, collaborate with Test, Product, quality and reliability (Q&R) and system-level test (SLT) teams.
Create smooth and effective ways to manage silicon engineering (SiEng) datastream to and from suppliers and internally, between different platforms, while optimizing formats and datalogs, convert per need.
Verify test solutions on pre-silicon models (simulation or emulation) and support Automated Test Equipment (ATE) test development setup and environment.
Develop test method for ATE platforms.
Provide pre and post silicon dashboards and indicators that will reflect the status, demonstrate progress and point on the gaps.
Requirements:
Minimum qualifications:
Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
10 years of experience in test or product engineering, with experience in infrastructure and automation and people management experience.
Experience in pre-silicon validation, test content generation, ATE program development, big data handling and post-silicon enabling from New Product Introduction through high-volume manufacturing.
Experience with ASIC test methodologies (mbist, atpg, dft serdes, sensors).
Experience with Python, Java, C# or C/C++ and Advantest or Teradyne ATE platforms.
Preferred qualifications:
Masters in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
10 years of experience in test engineering, including product engineering.
Experience in ATE hardware design and proliferation: loadboards/probecards, handler kits, sockets, and thermal control solutions.
Experience with CPU/GPU SoC architecture, design, validation and debug.
Demonstrated expertise in developing automations for pre-silicon verification and post-silicon test-generation/test-program domains.
Inquisitive and motivated to venture into, and improve, all aspects of post-silicon testing from definition to realization.
This position is open to all candidates.
 
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עדכון קורות החיים לפני שליחה
8847159
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required RTL Design Technical Lead, Networking, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As part of our Server Chip Design team, you will use your ASIC design experience to be part of a team that creates the SoC VLSI design cycle from start to finish. You will collaborate closely with design and verification engineers in active projects, creating architecture definitions with RTL coding, and running block level simulations.
In this role, you will contribute in all phases of Application-Specific Integrated Circuit (ASIC) designs from design specification to production. You will collaborate with members of architecture, software, verification, power, timing, synthesis, etc. to specify and deliver high quality SoC/RTL. You will solve technical problems with innovative micro-architecture and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind.
Responsibilities:
Define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, VHDL), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power, and FPGA/silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Communicate and work with multi-disciplined and multi-site teams.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
10 years of experience architecting networking ASICs from specification to production.
8 years of experience in technical leadership.
Experience in one of the following areas: arithmetic units, bus architectures, processor design, accelerators, or memory hierarchies.
Experience developing RTL for ASIC subsystems.
Preferred qualifications:
Experience working with design networking like: Remote Direct Memory Access (RDMA) or packet processing and system design principles for low latency, high throughput, security, and reliability.
Experience in TCP, IP, Ethernet, PCIE and DRAM including Network on Chip (NoC) principles and protocols (AXI, ACE, and CHI).
Experience architecting networking switches, end points, and hardware offloads.
Understanding of packet classification, processing, queuing, scheduling, switching, routing, traffic conditioning, and telemetry.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8846925
סגור
שירות זה פתוח ללקוחות VIP בלבד