דרושים » הנדסה » Technical Program Manager

We are seeking a talented Program Manager to join our team. In this high-visibility, hands-on role, you will drive forward the development of our chip by managing the complete program lifecycle, from architecture to successful tapeout, ensuring deliverables meet scope, schedule, and quality requirements.

Responsibilities
Lead the planning, development and implementation process of cross-functional teams focused on product delivery.
Drive the execution of the hardware roadmap by managing the complete lifecycle from architecture definition to tapeout.
Partnering tightly with Architecture, RTL Design, and Design Verification (DV) leads to identify bottlenecks, track coverage metrics, and mitigate risks before they impact the tapeout schedule.
Define the core operational processes and modes of work for the entire HW group, building and refining the stage-gate reviews required to transition smoothly from architecture into implementation and verification.
Oversee project monitoring, reporting, and risk management, from initiation to delivery, addressing intergroup dependencies to ensure timely and successful completion.
Lead process and methodology improvements, proactively addressing issues to achieve business goals.

We are is looking for a talented Code Generation and Optimization Expert. We are looking for a self- , independent engineer to join the team that builds the software infrastructure for accelerating the system in large scale compute environments like data centers and HPC using new CPU core technology. Working on the cutting edge and future ready systems. We work in a development culture that is diverse, flexible and challenging. For persons looking to make an impact and influence the future of computing with personal growth options.

The CodeGen team is developing core components in the automated optimization process that adapts our unique hardware architecture to run any HPC & AI applications, with little to no code modifications required. By using iterative rounds of telemetry and optimization, our compiler is able to intelligently adapt our accelerator into a workload-specific ASIC, at runtime.

We are seeking a talented Code Generation and Optimization Expert to join our bleeding-edge CodeGen team in Israel. In this high-visibility, hands-on role, you will play a pivotal part in building NextSilicons next-generation runtime compiler.

Responsibilities
Design and maintain the distributed and heterogeneous executable that is generated by our compiler stack.
Using the MLIR framework, transform high level compiler outputs into hardware-specific binary images, memory mappings, execution parameters, resource allocation, region grouping, and cross-domain coordination for distributed systems.
Design and maintain the API layer (libRT.a) connecting compiler-generated code with runtime services, ensuring seamless integration across different execution domains.
Collaborate closely with hardware, architecture, verification and other compiler teams to align software with hardware requirements and behavior.

Come help lead the design and development of one of the most ambitious products at the forefront of compute technology!

Responsibilities
Lead a physical design team responsible for all stages of the physical design process-floor planning, placement, clock tree synthesis, routing, timing, and power optimization at both block and subsystem levels.
Mentor and guide a team of physical design engineers through all stages of the design flow.
Collaborate closely with project managers and other technical leads to ensure timely delivery and successful completion of projects.
Drive the technical direction of the physical design process to ensure efficient, high-quality outcomes.
Develop and implement best practices for physical design and continuous improvements of design workflows.
Optimize designs for performance, power, and area (PPA) to meet project goals.
Ensure compliance with DRC (design rule checking) and LVS (layout versus schematic) requirements.
Drive timing analysis and closure, working closely with the RTL design team to resolve timing violations.

We are seeking a highly skilled and experienced Senior DevOps Engineer to join our team in a leadership capacity. You'll work with and support the engineering teams to build and maintain the development and deployment infrastructure. You'll be part of building highly automated and scalable systems, working in a highly motivated and skilled team.

Responsibilities
Continuously improve DevOps tools, processes, and procedures.
Build, maintain, and scale infrastructure for Production and Staging environments.
Deploy, manage, and support our environments, including troubleshooting incidents.
Design automation frameworks, tools, and systems for continuous integration and continuous deployment, ensuring fast-paced software delivery into Staging and Production environments.
Collaborate closely with Development teams to ensure end-to-end quality.
Stay up-to-date with new technologies, architect and implement new solutions for infrastructure automation.
Bring innovative ideas and solve complex technology problems.

We are looking for a talented and experienced Logic Design Group Lead to drive and help our group to get to the next era of computer architecture. In this position, you will lead the architecture of our future chips, driving system-level understanding and the overall architectural flow. You will manage managers and technical leads while remaining highly hands-on, taking an active role in architectural decisions and technical execution across the system.

Responsibilities
Be accountable for your group's milestones & timelines.
Leading your Group Architecture and developing their abilities.
Technology expert, building a knowledge base for the group.
Work with various teams to drive execution (SW, Architecture, verification, BE, etc).
Devise execution indicators, monitor and report execution progress to enable prioritization and clear decision-making.
Acquire the system Architecture and be part of the leading technical FE forum.

The AI software team is building solutions that enable the latest AI models and workflows to run efficiently on our unique hardware architecture-unlocking a new level of performance.

We are seeking a talented engineer to work on our AI software stack-specifically, the low-level optimization of AI models and kernels for our unique hardware architecture.

Responsibilities
Develop our optimized AI libraries and related components in the SW stack.
Drive the performance optimization of AI models running on our unique architecture.

We are looking for a talented and experienced Logic Design Group Lead to drive and help our group to get to the next era of computer architecture. In this position, you will lead the architecture of our future chips, driving system-level understanding and the overall architectural flow. You will manage managers and technical leads while remaining highly hands-on, taking an active role in architectural decisions and technical execution across the system.

Responsibilities
Be accountable for your group's milestones & timelines
Leading your Group Architecture and developing their abilities
Technology expert, building a knowledge base for the group
Work with various teams to drive execution (SW, Architecture, verification, BE, etc)
Devise execution indicators, monitor and report execution progress to enable prioritization and clear decision-making
Acquire the system Architecture and be part of the leading technical FE forum

We are looking for a talented and experienced engineer to participate in designing the next era of computer architecture. In this position you will take part in designing the critical parts of our future chips. You will transform architectural requirements to micro-architectural specs, implement key blocks in RTL, and participate in post-silicon activities.

Responsibilities
Define and drive the design of advanced blocks from micro-architecture phase to netlist.
Support timing and constraints definitions work closely with the BE team on timing and physical implementation efforts.
Leading processes relating to power optimization.
Technology expert, building a knowledge base for the group.
Work with various teams to drive execution (SW, Architecture, verification, BE, etc).
Devise execution indicators and monitor and report execution progress to enable prioritization and clear decision making.

The AI software team is building solutions that enable the latest AI models and workflows to run efficiently on our unique hardware architecture-unlocking a new level of performance.

Our team is looking for a skilled professional to join the AI software group. In this role, you will focus on our AI kernel compilers, ensuring our hardware delivers peak optimization for sophisticated and custom AI kernels. You will work extensively with various kernel infrastructures, including Triton and CUDA, while collaborating closely with our AI graph compiler teams.

Responsibilities
Develop our AI kernel compilers and related components in the SW stack.
Drive the performance optimization of AI models running on our unique architecture.