We are seeking a highly skilled and experienced PCIe Validation Engineer to join our Silicon and System Validation team, playing a key role in the companys core products. This position involves building a complex validation environment from scratch for pre and post silicon, defining test plan execution and debugging failures while collaborating with cross-functional teams. In this role, you will take ownership of the validation from Emulation thru bring-up to product release in quality that meets our standards.
Responsibilities
Develop and debug PCIe initialization and reset flows.
Develop and execute test plans for pre-silicon and post-silicon validation, including targeted tests for validating specific PCIe functionality.
Take part in Silicon bring-up and power-on stage on Silicon arrival.
Collect and analyze validation data to identify trends and root causes and to uncover opportunities for improving silicon quality, reliability and performance.
Drive the debugging and resolution of complex silicon issues, collaborating with cross-functional teams across design, architecture, software and firmware.
Requirements: B.Sc. or M.Sc. in Electrical Engineering or Computer Engineering, or equivalent.
At least 3 years of experience in implementing PCIe initialization code and PCIe subsystem, PHYs training, and calibration software.
Experience in Physical Layer (PHY) design and debug.
Experience in HW-SW integrations.
Strong debugging skills using high-end lab equipment (Analizer, Scope, BERT).
Experience in Silicon power-on - advantage.
Strong knowledge of Python, C and C++ - advantage.
This position is open to all candidates.