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3 ימים
Location: More than one
Job Type: Full Time
Were looking for an experienced SW Team Manager to join our Simulators Team, where you'll lead the design and development of our hardware simulators - functional and performance models that serve as the source of truth, drive architectural exploration and compiler optimization.
Our simulators model diverse cores within a cutting-edge SoC designed to accelerate Big Data and Database Analytics.
You will collaborate closely with hardware and software teams, contributing to co-design efforts that influence architecture, tooling, and system-level behaviour.
Responsibilities:
Lead & grow a team of experienced engineers
Develop new hardware simulators and continue evolving existing one.
Collaborate with Architecture, VLSI, and Software teams to drive co-design initiatives.
Provide insights that influence chip architecture, compiler optimization, and system-level performance.
Develop tools that drive the chip development cycle.
Requirements:
BSc (or higher) in Computer Science, Math, Physics or Electrical Engineering.
3+ years of experience managing or leading software engineering teams
5+ years of experience developing hardware simulators
Strong understanding of computer architecture and system-level modelling.
Proven track record in technical leadership.
Experience in SW-HW co-development environments, influencing both architecture and tooling.
Proficiency in Python and C++.
Solid software engineering skills, including design, testing, performance tuning, and maintainability.
This position is open to all candidates.
 
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18/03/2026
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a creative and experienced Senior Firmware Engineer to join our PCIe Firmware team-someone passionate about using artificial intelligence to engineer the foundational hardware of the AI revolution.

As an integral part of our team, you'll architect and implement the core of our next-generation devices. This senior role places you at the center of innovation, where you will have a direct impact on our business and technology by solving sophisticated technical challenges. Its a unique opportunity to shape our technology and empower customers to build the supercomputers and AI fabrics of tomorrow.

What You'll Be Doing:

Lead the architectural design, development, and optimization of cutting-edge PCIe firmware, using AI-driven modeling and insights to deliver exceptional performance.

Serve as a trusted technical expert by investigating, debugging, and resolving challenging PCIe firmware issues for our most important customers.

Collaborate closely with our Chip Design, Verification, Software, and Architecture engineers to find root causes and develop robust, long-term solutions.

Champion the integration of AI-assisted diagnostics and generative AI tools across the entire development lifecycle to boost team productivity and innovation.

Translate customer needs and field data into actionable feedback that directly shapes the future of our products.
Requirements:
What We Need to See:

A degree in Electrical Engineering, Computer Science, Computer Engineering, or equivalent practical experience.

8+ years of significant professional experience in embedded firmware development, with a deep understanding of PCIe.

A strong foundation in computer architecture, operating systems, and object-oriented programming.

Proficiency in scripting languages like Python to automate tasks and workflows.

An innovative approach with a genuine desire to apply AI and machine learning to accelerate firmware development.

Ways to Stand Out from the Crowd:

Track record of applying AI-powered tools like Cursor to accelerate the development lifecycle.

Previous experience in a customer-facing or application engineering role.

Direct, hands-on experience with PCIe switch architecture and its firmware in high-performance applications.

Deep knowledge of hardware verification concepts and tools (e.g., C++, Python, Jenkins).

Extensive knowledge of networking protocols and the Linux operating system.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo
Job Type: Full Time
about the job
in this role, youll work to shape the future of ai/ml hardware acceleration. you will have an opportunity to drive cutting-edge tpu (tensor processing unit) technology that powers google's most demanding ai/ml applications. youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of google's tpu. you'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on tpu architecture and its integration within ai/ml-driven systems.
as a design technology co-optimization (dtco) engineer, you will bridge the gap between process technology and product architecture to define the next generation of datacenter-class silicon. you will be responsible for extracting maximum process entitlement by evaluating advanced logic nodes and emerging transistor architectures.in this role, you will conduct place and route experiments and sensitivity analyses to influence standard cell library architecture, metal stack definitions, and design rules. you will collaborate with foundry, ip, and architecture teams to identify power, performance, and area (ppa) bottlenecks and drive system technology co-optimization (stco) initiatives.your work will involve performing high-fidelity physical implementation sweeps, analyzing the impact of scaling boosters, and developing automated methodologies to quantify ppa gains. by navigating the trade-offs between process complexity and design performance, you will ensure googles hardware achieves efficiency and power density.the ai and infrastructure team is redefining whats possible. we empower google customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers include googlers, google cloud customers, and billions of google users worldwide. we're the driving force behind google's groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for google cloud, google global networking, data center operations, systems research, and much more.
responsibilities
execute high-fidelity place and route experiments to evaluate the ppa impact of advanced process features, library architectures, and design rule variations on datacenter-class ip.
drive design technology co-optimization by collaborating with foundries and internal technology teams to define optimal metal stacks, track he
דרישות:
minimum qualifications:
bachelor's degree in electrical engineering, computer engineering, Computer Science, or a related field, or equivalent practical experience.
2 years of experience in physical design (rtl-to-gds) or technology development, focusing on advanced nodes (e.g., 7nm, 5nm, or below).
experience with industry-standard place and route (p&r) tools and static timing analysis (sta) tools.
experience in cmos device physics, finfet/nanosheet architectures, and the impact of layout parasitics on ppa.
experience in scripting and automation using tcl and Python (or PERL ) to manage design sweeps and data extraction.
preferred qualifications:
master's degree or phd in electrical engineering, computer engineering or Computer Science, with an emphasis on computer architecture.
experience in design technology co-optimization (dtco), including standard cell library characterization, metal stack optimization, and evaluation of scaling boosters (e.g., backside power delivery).
experience working with major foundry technology files (pdks) and interpreting design rule manuals (drm) to guide physical im המשרה מיועדת לנשים ולגברים כאחד.
 
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26/03/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
our company is searching for a strong technical leader to own the backbone of our networking research capabilities. we are looking for an engineering manager to lead the development of our high-fidelity network simulation platform and the extensive on-premise infrastructure that powers it.
in this role, you will lead a team of performance simulation software engineers and DevOps /infrastructure specialists. you will own the "simulation-as-a-service" product-a critical platform used by internal researchers to model next-generation data center architectures. your mission is to ensure our simulations are accurate, performant, and accessible, while managing the large-scale compute clusters required to run them.
what you'll be doing:
team leadership: manage and mentor a team of C ++ software engineers and DevOps infrastructure engineers, fostering a culture of performance, reliability, and code quality.
product ownership (sim-as-a-service): treat the internal simulation platform as a product. work with research partners to define the roadmap, prioritize features, and ensure high availability for users.
high-performance simulation: be responsible for the architecture and optimization of complex network simulation engines ( C ++ based), ensuring they can scale to model extensive data center topologies with high fidelity.
infrastructure management: own the lifecycle of our on-premise compute clusters and servers. drive decisions on hardware upgrades, prioritisation, and managing system resources.
DevOps & automation: lead the strategy for ci/cd pipelines, automated testing, and containerized deployments to ensure rapid iteration and stability of the simulation platform.
multi-functional collaboration: partner with the ai agents team to expose simulation apis, enabling agents to run experiments and gather data autonomously.
Requirements:
what we need to see:
msc, ph.d. or equivalent experience in Computer Science, electrical engineering, or a related field.
8+ years of hands-on software engineering experience, with a proven track record of leading technical teams in systems or infrastructure domains for 3+ years.
3+ years of managerial experience.
C ++ expertise: strong background in C ++ development for high-performance applications ( system -level programming, concurrent programming).
infrastructure & DevOps : practical experience managing on-premise servers, Linux environments, and modern DevOps tools (kubernetes, slurm, docker, ansible).
operational rigor: ability to manage "heavy" operations-ensuring uptime, monitoring system health, and optimizing hardware utilization.
ways to stand out from the crowd:
networking knowledge: deep understanding of computer networking fundamentals (tcp/ip, ethernet, infiniband, congestion control) and data center architectures.
simulation/modeling: experience with discrete event simulation (des) or modeling complex systems.
hpc background: experience working with mpi, cuda, or other high-performance computing frameworks.
specific simulators: familiarity with standard network simulators like omnet++, ns-3, or similar proprietary tools.
hardware knowledge: understanding of switch micro-architecture or nic design is a significant plus.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
you will collaborate closely with design and Verification engineers in active projects, creating architecture definitions with rtl coding, and running block level simulations.as a design & power methodology team manager within the server chip design team, you will be responsible of managing and leading design and power methodologies from ip to SOC, pre and post silicon. you will be responsible for mentoring and developing team members and tech leads while driving improvements in leadership, technical execution, and design flows.you will work closely with cad vendors and internal teams to develop lead design and power methodology and execution.the ai and infrastructure team is redefining whats possible. we empower google customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers include googlers, google cloud customers, and billions of google users worldwide. we're the driving force behind google's groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for google cloud, google global networking, data center operations, systems research, and much more.
responsibilities
manage a team of tech leads and designers. develop and mentor team members, and communicate and co-work with multi-disciplined and multi-site teams.
lead flow and methodology development and assimilation across multiple groups. work closely with cad tool providers as well as internal cad teams.
plan, execute, track progress, assure quality, and report status.
work closely with internal customers and support multiple activities and deliverables.
drive design methodologies such as design construction, cdc, rdc, sdc. drive power at: ip and SOC rtl/gate level optimization, estimation, correlation.
Requirements:
minimum qualifications:
bachelor's degree in electrical engineering, computer engineering, Computer Science, a related field, or equivalent practical experience.
10 years of experience in rtl design cycle ip and SOC.
8 years of experience in team management.
experience with design methodologies, structural checks, and power estimation/optimization.
preferred qualifications:
experience with synthesis techniques to optimize register-transfer level (rtl) code, performance and power as well as low-power design techniques.
experience with a scripting language like Python or PERL.
experience with design for TEST and its impact on design and physical design.
knowledge of ip and SOC architecture.
knowledge of physical design techniques: sdc, synthesis, emir, etc.
This position is open to all candidates.
 
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26/03/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
we are looking for a versatile senior software engineer to join our dpu platform team. this is an opportunity to make a significant impact in a technology-driven company that powers the worlds most advanced data centers. you will use your expertise in low-level Embedded Linux software and boot flows to work with global development teams, solving the complex challenges involved in delivering high-power computing platforms.
what you'll be doing:
designing and developing low-level system software with a primary focus on bootloaders (atf, uefi), firmware, and hardware initialization
working together with hardware and design teams to drive SOC bring-up and platform enablement
solving complex challenges related to boot sequences, system optimization, and hardware resource management
supporting various internal and customer dpu projects alongside our global teams
taking part in all stages of the product lifecycle, with a focus on high software quality and stability
collaborating within a global software environment to have a broad impact across the company
Requirements:
what we need to see:
bachelors degree in Computer Science /engineering or equivalent practical experience
5+ years of experience in Embedded Linux software development ( C is a must, C ++ advantage)
deep experience with bootloader development and board support packages (bsp)
strong understanding of the low-level software stack and hardware-software interaction, specifically regarding pre-os environments
deep knowledge of processor architecture, including cpu, cache coherency, and hardware accelerators
solid engineering skills in design, technical investigation, and agile processes
great communication skills, both written and oral
experience with development tools like git, gcc, make, bitbake, jenkins, etc.
ways to stand out from the crowd:
hands-on experience with armv8, atf (arm trusted firmware), and uefi standards
background in developing secure boot flows or trusted computing environments
experience with hardware debuggers (jtag) and low-level board analysis
background in developing security solutions or key management
nvidia is widely considered to be one of the technology's most desirable employers. if you strive for excellence, are self-motivated and enjoy having fun and learning, then don't wait-- apply today!
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo
Job Type: Full Time
about the job
our company's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. our products need to handle information at massive scale, and extend well beyond web search. we're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data Storage, security, artificial intelligence, Natural Language Processing, UI design and mobile; the list goes on and is growing every day. as a software engineer, you will work on a specific project critical to our company's needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. we need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the Full-Stack as we continue to push technology forward.
in this role, you will work with system teams and the cpu architecture team to develop an understanding of the central processing unit (cpu), system on a chip ( SOC ), performance metrics, benchmarks/measuring tools, and available optimization knobs. you will define methods and technologies to model cpu performance at different accuracy levels by supporting architectural explorations and decision making. you will correlate performance projections with measured post-silicon data.the ai and infrastructure team is redefining whats possible. we empower our company customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers, our company cloud customers, and billions of our company users worldwide. we're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for our company cloud, our company global networking, data center operations, systems research, and much more.
responsibilities
write product or system development code.
design, develop, TEST, deploy, maintain, and improve central processing unit (cpu) software modeling and other software tools.
manage project priorities, deadlines, and deliverables.
collaborate with hardware and software cpu architecture teams, SOC performance modeling team, and other company software teams.
Requirements:
minimum qualifications:
bachelor's degree in electrical engineering, computer engineering, Computer Science, or a related field, or equivalent practical experience.
2 years of experience with software development in C ++ programming language or 1 year of experience with an advanced degree.
preferred qualifications:
masters degree or phd in engineering, Computer Science, or a related technical field.
2 years of experience with data structures and algorithms.
experience in modern cpu/ Machine Learning (ml) architecture and micro-architecture.
ability to learn coding languages.
excellent object-oriented database design and sql skills.
This position is open to all candidates.
 
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19/03/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
seeking a dynamic and highly motivated Software Senior Manager to lead our BlueField DPU Platform software team. We are looking for a candidate who can excel in a sophisticated, multidisciplinary environment, take ownership, and drive high-quality software development including low-level device initialization, Linux OS drivers and kernel configuration, boards bring-up and system management. This position offers the opportunity to have a real impact on sophisticated, groundbreaking products, delivered by us and developed by our customers, empowering the most advanced data centers in the world. We believe our most valuable asset is our people and seek the very best to lead our outstanding team. This role requires close collaboration with teams across various fields (SW, HW, QA) to elevate our product to the next level.

What you will be doing:

Mentor and expand your engineering team in the planning and execution of initiatives and projects with top quality and timely results.

Coordinate feature design and implementation as well issue resolution, as this is a technical leadership role.

Interact with internal and external partners to understand their use cases and requirements. Collaborate with engineering teams, program and product management across the product roadmap.

Continuously review and identify improvement opportunities in established processes, infrastructure, and practices to ensure the teams are implementing in the most efficient and open manner.

Develop a team of engineers who understand the bigger picture, value collaboration, and can take ownership of and implement designs from beginning to end.

Be familiar with the open-source community process to advance industry-standard programming models and platform support while upstreaming and maintaining software into standard software distributions.
Requirements:
What we need to see:

B.Sc. degree or equivalent experience in Computer Science, Computer Engineering, or Electrical Engineering.

12+ overall years of experience in the software industry with specialization in embedded Linux system software stack and Arm preboot development.

4+ years of experience managing managers or senior engineers.

Proven track record of taking several complex software features or products through the full product life cycle.

Strong understanding of computer system architecture, operating systems principles, HW-SW interactions, and performance analysis/optimizations.

Proficient in C, C++ with the technical depth to guide and mentor the team

Experience balancing multiple projects with conflicting priorities.

Flexibility to work and communicate effectively across different teams and time zones.

Ways to stand out from the crowd:

Demonstrated leadership of engineering teams doing embedded Linux and preboot Arm work.

Experience with ARMv8 microarchitecture, ATF, and/or UEFI software.

Knowledge of secure boot flows and/or trusted computing environments is a strong plus.

A good sense of humor is key. We like to have a positive team environment.
This position is open to all candidates.
 
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26/03/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
looking for a strong technical senior architect to join us in shaping the future. senior architects are innovators who can translate business needs into workable technology solutions. their expertise is deep and broad. they are hands on, producing both detailed technical work and high-level architectural designs.
as a senior architect in the ai networking research team, you will explore technological challenges on accelerate networking and building ai data centers. research new transport functions and semantics for optimizing ai workloads, ai systems communication and accelerations and much more. you will also be leading architectural and development efforts across numerous technological fields, related to the modern ai data center, such as distributed ai and deep learning solutions, data analytics, high performance computing (hpc), software defined networking (sdn), virtualization, Storage, and more.
what youll be doing:
co-design hardware features (e.g., in gpus, dpus, or interconnects) that accelerate data movement and enable new capabilities for inference and model serving. 
identify and evaluate new technologies, innovations and partner relationships for alignment with our technology roadmap and business value.
lead architecture and design of new technologies and innovations such as runtime systems, communication libraries, ai-specific technologies.
lead proof-of-concept development to evaluate and drive such technologies.
Requirements:
what we need to see:
hold a m.sc. or ph.d. in Computer Science, electrical or computer engineering from a leading university (or equivalent experience).
5+ years of industry experience (or equivalent) in system architecture, ai systems architecture, scaling of ai, parallelism of ai frameworks, or deep learning training workloads.
experienced in algorithm design, system programming, computer architecture and operating systems.
experienced in virtualization, networking and Storage.
deep understanding of performance profiling and optimization techniques, together with defining and using hardware features.
strong programming and software development skills.
ability and flexibility to work and communicate effectively in a multi-national, multi-time-zone corporate environment.
ways to stand out from the crowd:
shown research track record.
have experience and passion for system architecture, cpu/gpu/memory/ Storage /networking.
stellar communication skills.
knowledge in deep learning frameworks and ai communication libraries (nccl, ucx, mpi and equivalents).
deep understanding of inference and training workloads and optimizations, like prefill/decode, data parallelism, tensor parallelism, fdsp and others.
This position is open to all candidates.
 
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3 ימים
חברה חסויה
Location: More than one
Job Type: Full Time
we are looking for a Senior SW Engineer.
Job Description
Join a multi-disciplinary team of experts operating at the core of Speedatas software stack
Lead the design and implementation of highly efficient algorithms that maximize our performance
Develop time-critical Python components that translate database operations to performant, hardware-optimized C++
Co-design the next generation of our architecture alongside Hardware & Software engineering leads
Research state-of-the-art algorithms and techniques for data analytics and hardware acceleration
Fly high with the SW, and dive in for a byte of the HW
Requirements:
BSc or higher degree in Computer Science or a related field.
8+ years of experience in software development in a deep-tech context
Ability for independent learning of topics, tools and languages
Strong proficiency in Python
Knowledge of algorithms and data structures
Excellent communication skills
Advantages:
Meaningful experience with C++
Experience with hardware systems and compilers
Experience with databases and SQL
High tolerance for dad-jokes
Familiarity with software optimization techniques for performance-critical code
Familiarity with computer architecture and low-level programming
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
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22/03/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are now looking for an Arch Simulation Manager to join our Networking team! As a Switch-Arch Simulation Manager in our Networking Business Unit, you will lead a team of highly skilled hardware engineers responsible for verifying the next generation of our cutting-edge Switch products. This is a unique opportunity to make a real impact at the heart of our AI and HPC revolution, while working in a fast-paced, innovative environment. You will be part of a passionate and experienced team using modern approaches to validate the performance requirements for the next generation of our networking products. Your work will influence key architectural decisions and help deliver world-class silicon solutions for data centers, high-performance computing, networking, and storage applications.

What Youll Be Doing:

Lead and grow a team of hardware verification engineers focused on Arch performance validation of complex digital designs.

Collaborate closely with Architecture, Design, DV teams to identify verification needs and drive closure.

Provide technical guidance, mentoring, and support to engineers in the team.

Own the planning and execution of simulation deliverables to ensure high quality and timely tapeouts.
Requirements:
What We Need to See:

BSc or MSc in Electrical/Computer Engineering, or Computer Science.

3+ years of managerial experience in a chip design or verification domain.

8+ overall years of overall industry experience in modeling, hardware verification, or RTL design.

Excellent leadership, problem-solving, and communication skills.

Ways to Stand Out from the Crowd:

Hands-on experience with modeling.

Networking and Switch specifically experience.

Background in developing modeling testbenches, regression environments, and CI/CD workflows

Managerial experience in chip design domain

A passion for recruiting , leading , mentoring engineers and building strong, collaborative teams.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8586547
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