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6 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
our company is searching for a strong technical leader to own the backbone of our networking research capabilities. we are looking for an engineering manager to lead the development of our high-fidelity network simulation platform and the extensive on-premise infrastructure that powers it.
in this role, you will lead a team of performance simulation software engineers and DevOps /infrastructure specialists. you will own the "simulation-as-a-service" product-a critical platform used by internal researchers to model next-generation data center architectures. your mission is to ensure our simulations are accurate, performant, and accessible, while managing the large-scale compute clusters required to run them.
what you'll be doing:
team leadership: manage and mentor a team of C ++ software engineers and DevOps infrastructure engineers, fostering a culture of performance, reliability, and code quality.
product ownership (sim-as-a-service): treat the internal simulation platform as a product. work with research partners to define the roadmap, prioritize features, and ensure high availability for users.
high-performance simulation: be responsible for the architecture and optimization of complex network simulation engines ( C ++ based), ensuring they can scale to model extensive data center topologies with high fidelity.
infrastructure management: own the lifecycle of our on-premise compute clusters and servers. drive decisions on hardware upgrades, prioritisation, and managing system resources.
DevOps & automation: lead the strategy for ci/cd pipelines, automated testing, and containerized deployments to ensure rapid iteration and stability of the simulation platform.
multi-functional collaboration: partner with the ai agents team to expose simulation apis, enabling agents to run experiments and gather data autonomously.
Requirements:
what we need to see:
msc, ph.d. or equivalent experience in Computer Science, electrical engineering, or a related field.
8+ years of hands-on software engineering experience, with a proven track record of leading technical teams in systems or infrastructure domains for 3+ years.
3+ years of managerial experience.
C ++ expertise: strong background in C ++ development for high-performance applications ( system -level programming, concurrent programming).
infrastructure & DevOps : practical experience managing on-premise servers, Linux environments, and modern DevOps tools (kubernetes, slurm, docker, ansible).
operational rigor: ability to manage "heavy" operations-ensuring uptime, monitoring system health, and optimizing hardware utilization.
ways to stand out from the crowd:
networking knowledge: deep understanding of computer networking fundamentals (tcp/ip, ethernet, infiniband, congestion control) and data center architectures.
simulation/modeling: experience with discrete event simulation (des) or modeling complex systems.
hpc background: experience working with mpi, cuda, or other high-performance computing frameworks.
specific simulators: familiarity with standard network simulators like omnet++, ns-3, or similar proprietary tools.
hardware knowledge: understanding of switch micro-architecture or nic design is a significant plus.
This position is open to all candidates.
 
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6 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
we are seeking a highly motivated high-performance system architect to join our team of experts and help shape the future of high-performance and ml / ai computing. our next-generation nvl systems will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in ai research to high-performance clusters used at almost every industry today, such as car and pharmaceutical. as a high-performance system architect at nvidia, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation networks that will be used by top researchers and engineers around the world.
what youll be doing:
define the nvl system architecture end-to-end, by internal requirements and customers requirements through all product life cycles (post/pre silicon, on deployments).
research of various solutions to enable the next large-scale-high-performance computing clusters. the position spans over various layers from algorithms, software, firmware, and hw.
developing models for simulations and performance testing, analysing the results and development of future hw and sw.
collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and research teams, to ensure the successful execution of the project.
Requirements:
what we need to see:
b.sc, m.sc, or ph. d degree in Computer Science, Computer Engineer, or electrical engineer.
at least 5 years of industry or research experience in computer networks.
excellent understanding of large-scale networks behaviour and the effect of distributed computing workloads effect on the network.
experience in development of simulation environments.
possess strong managerial, problem solving and critical thinking skills.
ability to work and operate in a highly dynamic environment.
partner with multiple groups in the organization.
ways to stand out of the crowd:
strong understanding in network protocols - such as infiniband, ip, tcp and roce and network topologies.
good knowledge in Python, C ++.
good knowledge with ai models.
familiarity with hpc environments, routing algorithms, omnet++ and ns3 simulation environments.
This position is open to all candidates.
 
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6 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
we are now looking for an arch simulation manager to join our nvidia networking team! as a switch-arch simulation manager in nvidias networking business unit, you will lead a team of highly skilled hardware engineers responsible for verifying the next generation of nvidias cutting-edge switch products. this is a unique opportunity to make a real impact at the heart of nvidias ai and hpc revolution, while working in a fast-paced, innovative environment. you will be part of a passionate and experienced team using modern approaches to validate the performance requirements for the next generation of nvidia networking products. your work will influence key architectural decisions and help deliver world-class silicon solutions for data centers, high-performance computing, networking, and Storage applications.
what youll be doing:
lead and grow a team of hardware Verification engineers focused on arch performance validation of complex digital designs.
collaborate closely with architecture, design, dv teams to identify verification needs and drive closure.
provide technical guidance, mentoring, and support to engineers in the team.
own the planning and execution of simulation deliverables to ensure high quality and timely tapeouts.
Requirements:
what we need to see:
bsc or msc in electrical/computer engineering, or Computer Science.
3+ years of managerial experience in a chip design or verification domain.
8+ overall years of overall industry experience in modeling, hardware verification, or rtl design.
excellent leadership, problem-solving, and communication skills. 
ways to stand out from the crowd:
hands-on experience with modeling.
networking and switch specifically experience.
background in developing modeling testbenches, regression environments, and ci/cd workflows
managerial experience in chip design domain
a passion for recruiting, leading, mentoring engineers and building strong, collaborative teams.
This position is open to all candidates.
 
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22/03/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are now looking for an Arch Simulation Manager to join our Networking team! As a Switch-Arch Simulation Manager in our Networking Business Unit, you will lead a team of highly skilled hardware engineers responsible for verifying the next generation of our cutting-edge Switch products. This is a unique opportunity to make a real impact at the heart of our AI and HPC revolution, while working in a fast-paced, innovative environment. You will be part of a passionate and experienced team using modern approaches to validate the performance requirements for the next generation of our networking products. Your work will influence key architectural decisions and help deliver world-class silicon solutions for data centers, high-performance computing, networking, and storage applications.

What Youll Be Doing:

Lead and grow a team of hardware verification engineers focused on Arch performance validation of complex digital designs.

Collaborate closely with Architecture, Design, DV teams to identify verification needs and drive closure.

Provide technical guidance, mentoring, and support to engineers in the team.

Own the planning and execution of simulation deliverables to ensure high quality and timely tapeouts.
Requirements:
What We Need to See:

BSc or MSc in Electrical/Computer Engineering, or Computer Science.

3+ years of managerial experience in a chip design or verification domain.

8+ overall years of overall industry experience in modeling, hardware verification, or RTL design.

Excellent leadership, problem-solving, and communication skills.

Ways to Stand Out from the Crowd:

Hands-on experience with modeling.

Networking and Switch specifically experience.

Background in developing modeling testbenches, regression environments, and CI/CD workflows

Managerial experience in chip design domain

A passion for recruiting , leading , mentoring engineers and building strong, collaborative teams.
This position is open to all candidates.
 
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22/03/2026
Job Type: Full Time
We're looking for a Senior AI/MLOps Engineer to join a group that specializes in Security and Networking, and specifically ML, AI and agent development. As a Senior AI/MLOps Engineer, youll build and maintain the infrastructure, tools and processes necessary to support the AI lifecycle in a production environment. You will collaborate closely with data scientists, software engineers, security architects and DevOps teams to ensure smooth deployment, modeling and optimization of AI models. This role involves creative problem solving alongside engineering teams, and is pivotal for the continued success of AI networking security.

What youll be doing:

Developing, improving and optimizing scalable infrastructure for handling and deploying security and networking AI models and agents in production, ensuring high availability, scalability, reproducibility, and performance.

Optimizing AI models and agents for performance, scalability, and resource utilization, considering factors such as latency, efficiency, and cost.

Monitoring and deploying agentic systems, LLMs, and ML models in production.

Designing and implementing frameworks/pipelines for AI training, inference, and experimentation.

Collaborating closely with data scientists, security architects and software engineers to operationalize and deploy AI models and agents, including packaging and integration with existing systems. Participate in developing and reviewing code, design documents, use case reviews, and test plan reviews.

Collaborating with DevOps teams to integrate pipelines and workflows into the CI/CD process, ensuring flawless deployments and rollbacks.

Building and maintaining monitoring and alerting systems to proactively identify and resolve issues relating to quality, performance and infrastructure.

Implementing access controls, authentication mechanisms, and encryption standards for AI models and data.

Documenting guidelines, and standard operating procedures for MLOps/AI processes and sharing knowledge with the wider team.

Develop proof-of-concepts for new features.
Requirements:
What we need to see:

BSc/MSc in CS/CE or related field (or equivalent experience).

Strong background in AI with experience deploying and monitoring AI/ML models, LLMs and agents to production systems at scale, including distributed and multi-node environments - at least 5 years of experience.

Proficiency in programming languages such as Python, Java, or Scala, along with experience in using ML/AI frameworks and libraries (e.g. TensorFlow, PyTorch).

Proficiency in microservices architecture, container orchestration, cloud platforms, and scalable infrastructure for training and inference workloads.

Knowledge of inference optimization techniques.

Understanding of build infrastructure and CI/CD tools and practices (e.g. GitLab, GitHub Actions, Jenkins).

You are detail-oriented and care deeply about robust, well tested, high-performance code in production environments.

You are proactive, take full ownership of your deliverables, have a can-do approach, and excellent communication and collaboration skills, able to work effectively in multifunctional teams.

Ways to stand out from the crowd:

Knowledge of network protocols and Linux internals.

Security and networking background, with knowledge of security protocols, network architectures, firewalls, intrusion detection systems, and other relevant security and networking concepts.

Experience deploying and optimizing generative models and agents.

Knowledge of network security principles and practices.
This position is open to all candidates.
 
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6 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
seeking a dynamic and highly motivated senior Software manager to lead our software verification and automation for doca networking sdk. we are looking for a candidate who can excel in a sophisticated, multidisciplinary environment, take ownership, and drive high-quality verification and automation processes. this position offers the opportunity to have a real impact on sophisticated, groundbreaking products, delivered by nvidia and developed by our customers, empowering the most advanced data centers in the world. this role requires close collaboration with teams across various fields (sw, hw, QA ) to elevate our product to the next level.
what you'll be doing:
lead teams of software Verification engineers, providing technical direction, career development, and performance mentorship
define and continuously refine our software testing methodology and processes
engage in a hands-on approach, actively participating in the design, coding, and debugging of verification tests and infrastructure alongside your team
lead the verification process, ensuring the functionality, stability, and performance of our doca networking sdk and the solutions on top of it
work closely with internal and external customers to understand system use cases
analyze coverage measures to identify verification gaps and provide data -driven insights into product development and release readiness
Requirements:
what we need to see:
b.sc degree or equivalent experience in Computer Science, computer engineering, or electrical engineering
10+ years of overall professional experience and 4+ years of experience managing managers or senior engineers.
proficient in Python, C, C ++ with the technical depth to guide and mentor the team
experience with regression systems and their optimizations
experience with networking protocols, mainly ethernet
experience with virtualization technologies
strong analytical, debugging, and problem-solving skills with meticulous attention to detail
experience with Embedded sw development
excellent interpersonal skills and the ability to multitask in a dynamic environment with shifting priorities
self-motivated and well-organized
ways to stand out from the crowd:
advanced understanding in ethernet protocols and rdma
experience with cloud and ai workload optimization
proficiency in continuous integration (ci) methodologies and tools such as gerrit, jenkins, and gitlab
experienced in TEST generation and coverage methods and metrics
background in Linux Kernel, security protocols
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo
Job Type: Full Time
about the job
in this role, youll work to shape the future of ai/ml hardware acceleration. you will have an opportunity to drive cutting-edge tpu (tensor processing unit) technology that powers google's most demanding ai/ml applications. youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of google's tpu. you'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on tpu architecture and its integration within ai/ml-driven systems.
as a design technology co-optimization (dtco) engineer, you will bridge the gap between process technology and product architecture to define the next generation of datacenter-class silicon. you will be responsible for extracting maximum process entitlement by evaluating advanced logic nodes and emerging transistor architectures.in this role, you will conduct place and route experiments and sensitivity analyses to influence standard cell library architecture, metal stack definitions, and design rules. you will collaborate with foundry, ip, and architecture teams to identify power, performance, and area (ppa) bottlenecks and drive system technology co-optimization (stco) initiatives.your work will involve performing high-fidelity physical implementation sweeps, analyzing the impact of scaling boosters, and developing automated methodologies to quantify ppa gains. by navigating the trade-offs between process complexity and design performance, you will ensure googles hardware achieves efficiency and power density.the ai and infrastructure team is redefining whats possible. we empower google customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers include googlers, google cloud customers, and billions of google users worldwide. we're the driving force behind google's groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for google cloud, google global networking, data center operations, systems research, and much more.
responsibilities
execute high-fidelity place and route experiments to evaluate the ppa impact of advanced process features, library architectures, and design rule variations on datacenter-class ip.
drive design technology co-optimization by collaborating with foundries and internal technology teams to define optimal metal stacks, track he
דרישות:
minimum qualifications:
bachelor's degree in electrical engineering, computer engineering, Computer Science, or a related field, or equivalent practical experience.
2 years of experience in physical design (rtl-to-gds) or technology development, focusing on advanced nodes (e.g., 7nm, 5nm, or below).
experience with industry-standard place and route (p&r) tools and static timing analysis (sta) tools.
experience in cmos device physics, finfet/nanosheet architectures, and the impact of layout parasitics on ppa.
experience in scripting and automation using tcl and Python (or PERL ) to manage design sweeps and data extraction.
preferred qualifications:
master's degree or phd in electrical engineering, computer engineering or Computer Science, with an emphasis on computer architecture.
experience in design technology co-optimization (dtco), including standard cell library characterization, metal stack optimization, and evaluation of scaling boosters (e.g., backside power delivery).
experience working with major foundry technology files (pdks) and interpreting design rule manuals (drm) to guide physical im המשרה מיועדת לנשים ולגברים כאחד.
 
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19/03/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
seeking a dynamic and highly motivated Software Senior Manager to lead our BlueField DPU Platform software team. We are looking for a candidate who can excel in a sophisticated, multidisciplinary environment, take ownership, and drive high-quality software development including low-level device initialization, Linux OS drivers and kernel configuration, boards bring-up and system management. This position offers the opportunity to have a real impact on sophisticated, groundbreaking products, delivered by us and developed by our customers, empowering the most advanced data centers in the world. We believe our most valuable asset is our people and seek the very best to lead our outstanding team. This role requires close collaboration with teams across various fields (SW, HW, QA) to elevate our product to the next level.

What you will be doing:

Mentor and expand your engineering team in the planning and execution of initiatives and projects with top quality and timely results.

Coordinate feature design and implementation as well issue resolution, as this is a technical leadership role.

Interact with internal and external partners to understand their use cases and requirements. Collaborate with engineering teams, program and product management across the product roadmap.

Continuously review and identify improvement opportunities in established processes, infrastructure, and practices to ensure the teams are implementing in the most efficient and open manner.

Develop a team of engineers who understand the bigger picture, value collaboration, and can take ownership of and implement designs from beginning to end.

Be familiar with the open-source community process to advance industry-standard programming models and platform support while upstreaming and maintaining software into standard software distributions.
Requirements:
What we need to see:

B.Sc. degree or equivalent experience in Computer Science, Computer Engineering, or Electrical Engineering.

12+ overall years of experience in the software industry with specialization in embedded Linux system software stack and Arm preboot development.

4+ years of experience managing managers or senior engineers.

Proven track record of taking several complex software features or products through the full product life cycle.

Strong understanding of computer system architecture, operating systems principles, HW-SW interactions, and performance analysis/optimizations.

Proficient in C, C++ with the technical depth to guide and mentor the team

Experience balancing multiple projects with conflicting priorities.

Flexibility to work and communicate effectively across different teams and time zones.

Ways to stand out from the crowd:

Demonstrated leadership of engineering teams doing embedded Linux and preboot Arm work.

Experience with ARMv8 microarchitecture, ATF, and/or UEFI software.

Knowledge of secure boot flows and/or trusted computing environments is a strong plus.

A good sense of humor is key. We like to have a positive team environment.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
as a design team manager within the server chip design team, you will use your asic design experience to be part of a team that creates the SOC vlsi design cycle from start to finish. you will collaborate closely with design and Verification engineers in active projects, creating architecture definitions with rtl coding, and running block level simulations.in this role, you will oversee the intellectual property (ip) and SOC vlsi design cycle from architecture to production. you will own and manage ip, subsystems and SOC development, leading a group of designers and design tech leads. you will be responsible for mentoring and developing team members and tech leads, driving improvements in leadership, technical execution, and design flows.the ai and infrastructure team is redefining whats possible. we empower our customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers include , cloud customers, and billions of our users worldwide. we're the driving team behind our groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for our cloud, global networking, data center operations, systems research, and much more.
responsibilities
manage a team of tech leads and designers. develop and mentor team members, and communicate and co-work with multi-disciplined and multi-site teams.
lead design activities at ips, subsystems, and system -on-chips (socs).
plan, execute, track progress, assure quality, and report status of the assigned activity.
work closely with internal customers and support multiple activities and deliverables.
assure and manage deliverables quality at all rtl design categories including reviews, static checks, design for physical design, power, etc.
Requirements:
minimum qualifications:
bachelor's degree in electrical engineering, computer engineering, Computer Science, a related field, or equivalent practical experience.
10 years of experience in rtl design cycle from ip to SOC, from specification to production.
8 years of experience in execution teams management.
experience in the following areas: rtl design, design quality checks, physical design aspects of rtl coding, and power.
preferred qualifications:
experience with synthesis techniques to optimize register-transfer level (rtl) code, performance and power as well as low-power design techniques.
experience with a scripting language like Python or PERL.
experience with design for TEST and its impact on design and physical design.
knowledge of one of the following areas: pcie, ucie, ddr, axi, chi, fabrics, arm processors family.
knowledge of SOC architecture and assertion-based formal verification.
knowledge of high performance and low power design techniques.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo
Job Type: Full Time
about the job
be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
as part of our server chip design team, you will use your asic design experience to be part of a team that creates the SOC vlsi design cycle from start to finish. you will collaborate closely with design and Verification engineers in active projects, creating architecture definitions with rtl coding, and running block level simulations.in this role, you will contribute in all phases of application-specific integrated circuit (asic) designs from design specification to production. you will collaborate with members of architecture, software, verification, power, timing, synthesis, etc. to specify and deliver high quality SOC /rtl. you will solve technical problems with innovative micro-architecture and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind.the ml, systems, & cloud ai (msca) organization at our company designs, implements, and manages the hardware, software, Machine Learning, and systems infrastructure for all our company services (search, youtube, etc.) and our company cloud. our end users, cloud customers and the billions of people who use our company services around the world. we prioritize security, efficiency, and reliability across everything we do - from developing our latest tpus to running a global network, while driving towards shaping the future of hyperscale computing. our global impact spans software and hardware, including our company clouds vertex ai, the leading ai platform for bringing gemini models to enterprise customers.
responsibilities
define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
perform rtl development (e.g., coding and debug in verilog, systemverilog, vhdl), function/performance simulation debug, and lint/cdc/fv/upf checks.
participate in synthesis, timing/power, and fpga/silicon bring-up.
participate in TEST plan and coverage analysis of the block and SOC -level verification.
communicate and work with multi-disciplined and multi-site teams.
Requirements:
minimum qualifications:
bachelor's degree in electrical engineering, computer engineering, Computer Science, a related field, or equivalent practical experience.
10 years of experience architecting networking asics from specification to production.
8 years of experience in technical leadership.
experience in one of the following areas: arithmetic units, bus architectures, processor design, accelerators, or memory hierarchies.
experience developing rtl for asic subsystems.
preferred qualifications:
experience working with design networking like: remote direct memory access (rdma) or packet processing and system design principles for low latency, high throughput, security, and reliability.
experience in tcp, ip, ethernet, pcie and dram including network on chip ( NOC ) principles and protocols (axi, ace, and chi).
experience architecting networking switches, end points, and hardware offloads.
understanding of packet classification, processing, queuing, scheduling, switching, routing, traffic conditioning, and telemetry.
This position is open to all candidates.
 
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עדכון קורות החיים לפני שליחה
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18/03/2026
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a creative and experienced Senior Firmware Engineer to join our PCIe Firmware team-someone passionate about using artificial intelligence to engineer the foundational hardware of the AI revolution.

As an integral part of our team, you'll architect and implement the core of our next-generation devices. This senior role places you at the center of innovation, where you will have a direct impact on our business and technology by solving sophisticated technical challenges. Its a unique opportunity to shape our technology and empower customers to build the supercomputers and AI fabrics of tomorrow.

What You'll Be Doing:

Lead the architectural design, development, and optimization of cutting-edge PCIe firmware, using AI-driven modeling and insights to deliver exceptional performance.

Serve as a trusted technical expert by investigating, debugging, and resolving challenging PCIe firmware issues for our most important customers.

Collaborate closely with our Chip Design, Verification, Software, and Architecture engineers to find root causes and develop robust, long-term solutions.

Champion the integration of AI-assisted diagnostics and generative AI tools across the entire development lifecycle to boost team productivity and innovation.

Translate customer needs and field data into actionable feedback that directly shapes the future of our products.
Requirements:
What We Need to See:

A degree in Electrical Engineering, Computer Science, Computer Engineering, or equivalent practical experience.

8+ years of significant professional experience in embedded firmware development, with a deep understanding of PCIe.

A strong foundation in computer architecture, operating systems, and object-oriented programming.

Proficiency in scripting languages like Python to automate tasks and workflows.

An innovative approach with a genuine desire to apply AI and machine learning to accelerate firmware development.

Ways to Stand Out from the Crowd:

Track record of applying AI-powered tools like Cursor to accelerate the development lifecycle.

Previous experience in a customer-facing or application engineering role.

Direct, hands-on experience with PCIe switch architecture and its firmware in high-performance applications.

Deep knowledge of hardware verification concepts and tools (e.g., C++, Python, Jenkins).

Extensive knowledge of networking protocols and the Linux operating system.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8584100
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שירות זה פתוח ללקוחות VIP בלבד