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לפני 18 שעות
Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Utilize performance and power models from the architecture team, as well as lab measurements, to validate and tune performance against established goals.
Design and build tests to verify that the System on a Chip (SoC) design meets those goals.
Develop and implement advanced technologies for running "benchmark representations" on pre-silicon environments.
Analyze complex problems, identify core design weaknesses, and drive the resolution of performance issues in both pre- and post-silicon environments.
Develop performance measurement frameworks, including Key Performance Indicators (KPIs), to produce regular reports and dashboards that support stakeholder decision-making.
Requirements:
Minimum qualifications:
Bachelor's degree in Computer Science, Computer Engineering, or Electrical Engineering, or equivalent experience.
5 years of experience in SoC or Central Processing Unit (CPU) performance and power modeling, analysis, and debugging.
Experience with computer architecture, especially in areas like interconnects, traffic QoS, distributed caches, and I/O flows.
Experience in programming languages such as C, C++, or Similar.
Experience in identifying, troubleshooting, and solving performance problems.
Preferred qualifications:
Experience with hardware description languages like Verilog or SystemVerilog.
Experience in one or more functional areas, such as coherent fabrics (e.g., AMBA CHI/AXI), memory controllers (e.g., LPDDR5, DDR5), or I/O controllers (e.g., PCIe, CXL).
Experience in productizing features that enhance the performance or power characteristics of a design.
Experience in building fast, accurate SoC/CPU performance models in C++.
Experience in pre-silicon and post-silicon analysis and debugging.
This position is open to all candidates.
 
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לפני 17 שעות
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will use your Application-Specific Integrated Circuit (ASIC) design experience to be part of a team that develops the ASIC SoC from Plan of Record (POR) to Production. You will be creating SoC Level micro architecture definitions, RTL coding and will do all RTL quality checks. You will also have the opportunity to contribute to design flow and methodologies. You will collaborate with members of architecture, software, verification, power, timing, synthesis dft etc. You will face technical tests and develop/define design options for performance, power and area.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Define the SoC/block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc.
Perform Register-Transfer Level (RTL) development (e.g., coding and debug in Verilog, System Verilog), function/performance simulation debug and Lint/Cyber Defense Center/Formal Verification/Unified Power Format checks.
Participate in synthesis, timing/power closure, and Application-Specific Integrated Circuit (ASIC) silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Participate in architecture feedback.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
Experience with logic synthesis techniques to optimize RTL code, performance and power including low-power design techniques.
Experience with design sign off and quality tools (e.g., Lint, CDC, etc.).
Experience with SOC architecture.
Experience in logic design.
Preferred qualifications:
Master's degree or PhD in Computer Science or a related technical field.
Knowledge in one of these areas: Peripheral Component Interconnect Express (PCIe), Universal Chiplet Interconnect Express (UCIe), Double Data Rate (DDR), Advanced Extensible Interface (AXI), or Advanced RISC Machines (ARM) processors family.
Knowledge of high performance and low power design techniques.
Knowledge of assertion-based formal verification.
Excellent problem-solving and debugging skills.
This position is open to all candidates.
 
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לפני 2 שעות
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a SoC Design Verification Engineer, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure.
As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers on projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertion (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
4 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital systems using standard IP components/interconnects (microprocessor cores, hierarchical memory subsystems).
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience with verification techniques, and the full verification life-cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with ASIC standard interfaces and memory system architecture.
This position is open to all candidates.
 
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לפני 20 שעות
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
our company's custom-designed machines make up one of the largest and most powerful computing infrastructures in the world. The Hardware Testing Engineering team ensures that this cutting-edge equipment is reliable. In the R&D lab, you design test equipment for prototypes of our machinery and develop the protocols used to scale these tests for the entire global team. Working closely with design engineers, you give input on designs to improve our hardware until you're sure it meets our company's standards of quality and reliability.
As a Senior SoC System Test Engineer, you will help to integrate SoC technologies into devices and drive manufacturing test flows to assure performance and screen devices. You will drive yield improvement, cost optimization, and work closely with cross-functional teams to ensure the optimal test coverage in production to ensure high quality SoCs. You will work with various groups to deploy screening methodologies and flows for data processing, analytics, and diagnostics. You will drive the release of cost effective production test solutions into mass production to hit yield and quality goals.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Collaborate with Architecture, Design and Verification teams to develop new product bring-up, validation, characterization, qualification strategies, and manufacturing test solutions for new High Performance Computing (HPC) products in advanced process technologies.
Validate test solutions on system-level platforms and prepare for mass production.
Work with hardware and software teams to evaluate functional device yield and performance across various operating conditions.
Develop effective production screens to reduce Defective Parts per Million (DPPM).
Assess test escapees and localize failures, implement containment measures in the manufacturing test flow, and partner with manufacturing, test, quality and reliability teams to identify root cause and implement corrective actions.
Requirements:
Minimum qualifications:
Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
5 years of experience in system level test engineering.
Experience with Python or C/C++.
Experience in silicon System level components/LinuxOS.

Preferred qualifications:
Masters degree in Electrical Engineering, Computer Engineering, Computer Science, or related fields.
10 years of experience in test engineering and product engineering.
Experience with CPU/GPU and SoC architecture, design, validation and debug.
Experience in SLT hardware design and proliferation (e.g., system boards, peripheral devices, sockets, handler kits, and thermal control solutions).
Ability to venture into, and improve, all aspects of post-silicon testing from definition to realization.
This position is open to all candidates.
 
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 20 שעות
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving channel behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Define the SoC/block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc.
Perform Register-Transfer Level (RTL) development (e.g., coding and debug in Verilog, System Verilog), function/performance simulation debug and Lint/Cyber Defense Center/Formal Verification/Unified Power Format checks.
Participate in synthesis, timing/power closure, and Application-Specific Integrated Circuit (ASIC) silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Communicate and work with multi-disciplined and multi-site teams.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience with digital reasoning design principles, Register-Transfer Level (RTL) design concepts, and languages such as Verilog or System Verilog.
Experience with reasoning synthesis techniques to optimize Register-Transfer Level (RTL) code, performance and power and design techniques.
Experience in reasoning design and debug with Design Verification (DV).

Preferred qualifications:
Experience with a scripting language like Python or Perl.
Experience with design sign-off and quality tools (e.g., Lint, clock domain crossing (CDC), etc.).
Knowledge of System on a chip (SOC) architecture and assertion-based formal verification.
Knowledge of design techniques.
Knowledge in one of these areas: Peripheral Component Interconnect Express (PCIe), Universal Chiplet Interconnect Express (UCIe), Double Data Rate SDRAM (DDR), Advanced Extensible Interface (AXI), ARM processors.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 17 שעות
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Drive the sign-off timing convergence for high-performance designs.
Set up the timing constraints, define the overall static timing analysis (STA) methodology, set up the STA infrastructure and sign-off convergence flows, and work closely with block owners throughout the project for sign-off timing convergence.
Work with logic designers to drive architectural feasibility studies, develop timing, and explore RTL/design trade-offs for physical design closure.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, a related technical field, or equivalent practical experience.
8 years of experience with static timing analysis, including sign-off corner definitions, process margining, interface timing constraints, timing convergence, and frequency goals setup with technology scaling.
Experience in constraints development for sub systems or SOC.
Preferred qualifications:
Experience with full-chip static timing analysis and timing closure.
Experience with scripting languages (e.g., Python, Perl, or TCL).
Experience with ASIC physical design flows and methodologies, including synthesis, place and route (P&R), static timing analysis (STA), formal verification, and clock domain crossing (CDC).
Knowledge of semiconductor device physics and transistor characteristics.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8544192
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דיווח על תוכן לא הולם או מפלה
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סגור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 17 שעות
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
8 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, or a related field.
Experience with verification techniques, and the full verification life cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with Application-Specific Integrated Circuit (ASIC) standard interfaces and memory system architecture.
Experience in four or more System on a chip (SOC) cycles.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 18 שעות
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
our company System Infrastructure builds the cloud for our company services and for our company Cloud customers, by solving business test of performance and cost, utilizing hardware, software, and system solutions.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving team behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification strategy, identify the platform to validate reasoning components.
Define the test plan and strategy with stakeholders, including sign-off and exit criteria.
Plan and execute the verification of Internet Protocols (IPs) using dynamic verification and formal verification.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
10 years of experience in managing Design Verification (DV) team.
Experience with verifying units using formal and design verification methodologies.
Experience in verification methodologies, tools, and techniques.
Experience in leading technical teams and building cross-functional relationships.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering or Computer Science.
Experience in working with one or more formal verification tools (e.g., JasperGold, VC Formal, Questa Formal, 360-DV).
Experience with verification techniques, and full verification life-cycle.
Experience in leading teams and delivering projects.
Excellent communication skills, with the ability to present technical concepts to audiences.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8544177
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08/01/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are seeking a Security Operations Engineer to join our Security team, reporting to the CIO. This is a hands-on role where you will design and operate security infrastructure, lead cloud security initiatives, and rethink our security architecture. You'll build AI-powered solutions to automate security triage and response, while partnering cross-functionally with DevOps, IT, and Engineering teams to drive security outcomes across the organization.
What you will do :
Design, implement, and operate security monitoring capabilities using a SIEM platform to detect, analyze, and respond to threats in real time. Deploy and manage EDR, DLP, CSPM, and other security controls across the environment.
Build and maintain cloud security architectures, ensuring strong IAM, network segmentation, encryption, and a zero-trust approach across all cloud deployments.
Continuously evaluate and evolve the security architecture and defense in depth strategy. Integrate tools and systems across the stack to enable unified telemetry, seamless data flow, and automated response actions.
Develop AI powered agentic solutions and operational automations using n8n. Use Infrastructure as Code to automate deployment, configuration management, and ongoing lifecycle operations for security infrastructure.
Create and tune detection rules, build log ingestion pipelines, and conduct proactive threat hunting. Lead monitoring, investigation, and remediation efforts using structured DFIR methodologies.
Embed security into CI/CD pipelines and broader DevSecOps workflows. Partner with DevOps, IT, and Engineering teams to integrate security into day to day operations and technical decision making.
Implement and maintain controls aligned with HIPAA, HITRUST, and SOC 2 requirements. Perform security assessments for vendors, SaaS platforms, and internal applications.
Requirements:
5+ years of hands-on experience in security operations, incident response, or security engineering.
Strong background with SIEM platforms for monitoring, threat detection, and alert tuning.
Proven experience deploying and managing core security technologies, including EDR, DLP, and vulnerability management solutions.
Solid cloud security expertise across AWS, Azure, and GCP, with a strong understanding of cloud-native controls and architectures.
Scripting/automation proficiency (Python, Bash, PowerShell) for security automation
Hands-on experience with workflow automation platforms such as n8n or similar
Strong understanding of security architecture principles, defense in depth, and modern attacker techniques.
Familiarity with DevSecOps practices and integrating security into modern SDLC pipelines.
Highly independent: You take ownership of security challenges and you thrive in ambiguity; you carefully research and recommend solutions and drive execution autonomously
A great communicator: You're a people person, and you thrive in a fast-paced team environment with high-performance standards
Capable of working under pressure and delivering quickly
Flexible: You can see the big picture while staying detail-oriented; you can zoom in and out with ease
Driven: You bring a strong desire and drive to tackle complex security problems
What is Nice to Have:
Experience building AI/ML-powered security solutions or SOAR platforms
Background in detection engineering and high-fidelity alert creation
Container/Kubernetes security expertise
Security certifications (CISSP, GIAC, cloud security certifications)
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8493353
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
2 ימים
חברה חסויה
Job Type: Full Time
As an SOC Verification Engineer, you will verify the design and implementation of our SOC technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches and NIC SoC product lines. We are working closely with a wide range of aspects - chip design, DFT, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our SOC solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for verification of the clock design elements, architecture and micro-architecture using sophisticated verification methodologies.

As a member of our SOC verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.

Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.
Requirements:
What we need to see:

BSc. in Electrical Engineering or Computer engineering.

2+ years of relevant experience.

Good understanding of RTL design (Verilog).

Experience of UVM methodology.

Strong debugging, problem solving and analytical skills.

Excellent communication and social skills.

Ability to work in a geographically diverse team environment.

Self motivated, independent and target oriented.

Way to stand out from the crowd:

Previous experience in SOC and/or verification.

Experience in developing verification environments and random based verification for unit level and system level using verification tools (simulation tools, Verilog, debug tools like Simvision/Debussy).

Background with SV/UVM and Python.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8540010
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
03/02/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for a Senior SecOps Engineer to enhance our security operations and ensure robust protection against sophisticated threats. This role is crucial for maintaining our Security Operations as a high-performing and resilient hub that can quickly adapt to emerging security challenges in the fintech industry. You will take the lead in refining our SOC capabilities by monitoring network traffic, automating processes, analyzing security incidents, managing security tools, and providing expertise to SOC analysts, without having direct management responsibilities.

The Senior SOC Engineer collaborates with cross-functional teams to build defenses, respond to incidents, and design strategies for robust cybersecurity posture.

What you will be doing:
Drive SOC workflow automation using SOAR, and oversee the full lifecycle management (deployment, tuning, operation) of core security tools like EDR aiming to increase automation coverage and consistency.
Lead Cloud Security Monitoring, including managing AWS security logs via SIEM and working with the CSPM team for proactive cloud defense.
Perform continuous Security Monitoring and Threat Detection, building custom queries and dashboards to enhance visibility across platforms.
Develop and execute Proactive Threat Hunting procedures to identify potential risks.
Enhance and coordinate the Incident Response process, working with cross-functional teams through containment, eradication, and post-incident analysis.
Collaborate with third-party vendors for managed security services and specialized tools.
Requirements:
What youll need?
Experience: 5+ years in SecOps/IR with hands-on threat detection and mitigation, specifically in cloud-centric, production-scale environments.
Technical Skills: Strong capability in Cloud-focused threat detection, incident response, and analysis of complex attack patterns. Skilled in writing SIEM queries/alerts with an outcome-orientation (e.g., measurable improvements in MTTD or alert fidelity).
Scripting & Automation: Knowledge of Python, SQL, or Bash for SOC automation, with practical experience building SOAR playbooks, data enrichment scripts, and Detection-as-Code solutions.
AI & LLM Security: Understanding of the AI threat landscape (including adversarial ML and OWASP Top 10 for LLMs) and exposure to securing GenAI pipelines.
Investigations: Extensive experience with end-to-end security investigations, deep knowledge of security network protocols, and familiarity with the OWASP Top 10 vulnerabilities.
Security Tools: Hands-on experience managing, configuring, and investigating security events across EDR, Firewall, SIEM, and SOAR platforms.
Core Skills: Strong problem-solving, analytical, and organizational skills. Comfort leading initiatives without direct authority, a security-first approach, and the ability to mentor SOC analysts.

Itd be cool if you also: [NOT A MUST]
Familiar with industry frameworks (ISO 27001, PCI-DSS, SOC2, NIST, etc.) and regulatory requirements.
Have one or more certifications: CRTP, OSCP, OWSP, OSDA, GCIH, GIAC, CSA, CompTIA CySA+, or other relevant certifications.
Experience with building agents and utilizing LLM\AI in day2day work
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8530123
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