דרושים » תוכנה » Computing Network & System Architecture Group Leader

What will you be doing?
Responsible for advanced technology insight, product planning, system architecture design, chip definition, and product definition. Support in technology roadmap development for next generation computing network related chips definition and architecture design, including Ethernet/RDMA/RoCE switching ASIC, data processing unit and etc.
Lead and execute the research and development of high-performance computing network analyzing and optimizing, including architecture-specific or network-aware architectures to accelerate the computing traffic in high performance computing system.
Propose innovative solutions for next generation architecture of high-performance computing networked system and chiplet interconnecting technology.
Lead the design and subsequent verification and validation of concepts in the team
Work with external R&D Institutes and Universities in developing novel architectures and algorithms for networked system.
Generate novel ideas and protect them with IPR fillings
Mentor and coach less experienced staff members.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Power Architect, you will not just design chips; you will define the energy efficiency of the infrastructure that powers our company services worldwide.
In this role, you will be at the intersection of architecture, logic design, physical implementation, and system software. You will own the power architecture for next-generation custom SoCs (System on Chips), making critical trade-offs between performance, thermal constraints, and power delivery to build the most efficient computing platforms on the planet.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Define and own the SoC power architecture, including complex power domains, clocking structures, and Power Delivery Network (PDN) solutions to achieve optimal Performance-per-Watt.
Architect sophisticated power management policies, including Dynamic Voltage and Frequency Scaling (DVFS), power gating, and state strategies. Define the hardware/software interface for the Power Management Unit (PMU) and provide power management specifications.
Lead collaboration across architecture, RTL, physical design, packaging and validation teams to establish power budgets and specifications. Ensure power requirements are met from concept to tape-out.
Develop high-fidelity power and performance models to evaluate architectural features early in the design cycle. Drive pre-silicon power estimation and analysis to guide design decisions.
Lead post-silicon power analysis, correlating lab measurements with pre-silicon models to close the loop and improve future methodologies.

Looking for a CPU performance modeling architect to take responsibility over the performance aspects of new CPU instructions or modes of operation. The role includes but is not limited to:
Partners with lead SW and HW architects to co-invent optimal HW and SW solutions that come to address requirements. Influences the direction based on experiments and simulation data
Models CPU functionality, performance and/or power in pre-silicon simulators
Defines and runs performance experiments to aid feature definition. Such experiments can be performed on a pre-silicon simulation environment or in a real system or on a combination of both or even in combination with analytical models
Provides experimental/proof of concept for new features and implementation alternatives meeting performance constraints.
Analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usages
Potentially (in the future), lead a team doing above activities
An adequately qualified candidate can also become the leader of definition for some features in addition to all the roles above.

Looking for a CPU Architect with expertise in HW/SW codesign of dense computational logic (e.g., vector, matrix)
The role includes but is not limited to:
Analysis of technical challenges in relevant use cases and determination of whether to solve them by a combination of new HW and new SW or by only one of these
Analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usage.
Invents corresponding HW features and SW solutions to address above challenges. Evaluates feasibility tradeoffs, explores, and defines new approaches and novel architectures for CPU. Develops the end-to-end architecture of new instructions in cooperation with partners. Drives the inclusion of the feature in a CPU project working with micro-architects, designers and verification experts.
(Preferably) models CPU functionality, performance and power in simulators.
Provides experimental/proof of concept changes for proposing design alternatives meeting performance, power, area, and timing constraints.
Reviews and influences cross functional roadmaps.
Collaborates with SW and HW architects, design, verification, and validation engineers during the execution of the project. Finds mitigations for issues that arise during implementation of his/her features.

Looking for a CPU Architect for codesign of HW/SW feature for our CPUs for cellphones and servers. The role includes but is not limited to:
Analysis of technical challenges and determination of whether to solve them by a combination of new HW and new SW or by only one of these
Invents corresponding HW features and SW solutions to address above challenges. Evaluates feasibility tradeoffs, explores, and defines new approaches and novel architectures for CPU. Develops the end-to-end architecture of new instructions (when applicable) in coordination with partners. Drives the inclusion of the feature in a CPU project working with micro-architects, designers and verification experts. (the HW/SW features are typically in the form of new instructions or of other Instruction Set constructs and belong to one of following domains: dense compute, general purpose accelerations, use case specific accelerations, system level instructions, Security related technologies, or instrumentation instructions.
Models CPU functionality, performance and power in simulators, analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usage.
Provides experimental/proof of concept changes for proposing design alternatives meeting performance, power, area, and timing constraints.
Reviews and influences cross functional roadmaps.
Collaborates with SW and HW architects, design, verification, and validation engineers during the execution of the project. Finds mitigations for issues that arise during implementation of his/her features.

We are seeking a highly experienced Technical Field Architect to join our CTO team, working onsite in our Tel Aviv and Haifa offices in Israel. This is a critical role, facilitating communication and product adoption by the Office of the CTO and other field teams by working closely with our R&D teams to bring product development advances to the field.
The ideal candidate will have a deep understanding of both GTM and R&D processes, and be able to dive into the technical details of new products as they are developed. This person will communicate regularly with colleagues in the Office of the CTO, as well as sales engineering leaders and product management, to ensure rollout of releases and features are well-understood by ourfield teams and their customers. This person will work with the field and customers to ensure features are developed with customer requirements in mind, and work with engineering and architects to understand the detailed implementation of features.
Responsibilities:
Regularly meet with R&D teams responsible for feature design and development, ensuring alignment with customer requirements and field teams
Understand and help document product development and release processes and timelines
Develop and lead technical presentations for field teams
Work closely with colleagues in both R&D and the Office of the CTO to streamline communication and establishing close alignment
Install pre-release SW and give engineering feedback.

We are looking for a SW Development Team Leader to join our growing team!
We are looking for a software team leader to lead one of our core teams. He/she will be responsible for the delivery of innovative key features, guiding team members, improving existing products and features. He/she should be a great team player with the ability to develop strong working relationships and increase engagement / collaboration with peers to drive technology roadmaps.
Key Responsibilities
Responsible to contribute to products vision and subsequent execution
Oversee the overall development life-cycle, from design/planning, to implementation and support to maintain high standard of software quality
Provide technical leadership to team member while taking active part in the team tasks
Assigns tasks, reviews work and may contribute to employee performance appraisals
Work with internal teams, peers and customers to understand product requirements thus translating to successful software development

Which department will you join? The SOC verification group owns the important and challenging job of verifying our company's chip. It is involved from product specification to final SOC delivery, and involves all the system components. The group is made up of few of the best verification engineers, so besides contributing to making our roads safer, youll get the chance to work at one of the most professional verification teams.
What will your job look like:
You will manage a team of 5 engineers
You'll be responsible for Pre-Silicon system-level verification of the most cutting-edge AI accelerators and technologies in the automotive field.
Define the TestPlan, develop and run tests on simulation/emulation environments, develop test environment and verification collaterals.
You'll have a broad effect on our unique product from the very beginning of the process.

We are looking for an exceptional deep learning algorithm developer with proven experience in LLMs/VLMs/VLA models to join our growing team under our copmpanys Algorithms Group. The team is building an innovative multimodal learning framework aimed at improving autonomous driving performance by understanding long-tail cases and providing actionable navigation insights. Were combining state-of-the-art vision-language models to revolutionize how we train, validate, and scale our autonomous systems. If youre passionate about deep learning and engineering high-impact autonomous solutions - this is the place for you.
What will your job look like:
Lead dataset curation strategy - designing scalable pipelines for multimodal data to drive high-quality training and validation.
Architect and optimize LLMs, VLMs, and VLA models - transforming scene understanding into reliable driving guidance.
Own the validation strategy - defining methodologies, metrics, and failure-analysis workflows for robust vision-language-action alignment.
Make an immediate impact by applying deep expertise to guide model design, methodology, and development priorities from day one.
Collaborate closely with AV planners, perception teams, and infrastructure engineers to ensure seamless deployment in a real-time ecosystem.
Influence the technical direction of language-driven autonomy - contributing experience, shaping capabilities, and driving innovation to production.