דרושים » הנדסה » CPU Architect for Codesign

Looking for a CPU Architect with expertise in HW/SW codesign of dense computational logic (e.g., vector, matrix)
The role includes but is not limited to:
Analysis of technical challenges in relevant use cases and determination of whether to solve them by a combination of new HW and new SW or by only one of these
Analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usage.
Invents corresponding HW features and SW solutions to address above challenges. Evaluates feasibility tradeoffs, explores, and defines new approaches and novel architectures for CPU. Develops the end-to-end architecture of new instructions in cooperation with partners. Drives the inclusion of the feature in a CPU project working with micro-architects, designers and verification experts.
(Preferably) models CPU functionality, performance and power in simulators.
Provides experimental/proof of concept changes for proposing design alternatives meeting performance, power, area, and timing constraints.
Reviews and influences cross functional roadmaps.
Collaborates with SW and HW architects, design, verification, and validation engineers during the execution of the project. Finds mitigations for issues that arise during implementation of his/her features.

Looking for a CPU performance modeling architect to take responsibility over the performance aspects of new CPU instructions or modes of operation. The role includes but is not limited to:
Partners with lead SW and HW architects to co-invent optimal HW and SW solutions that come to address requirements. Influences the direction based on experiments and simulation data
Models CPU functionality, performance and/or power in pre-silicon simulators
Defines and runs performance experiments to aid feature definition. Such experiments can be performed on a pre-silicon simulation environment or in a real system or on a combination of both or even in combination with analytical models
Provides experimental/proof of concept for new features and implementation alternatives meeting performance constraints.
Analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usages
Potentially (in the future), lead a team doing above activities
An adequately qualified candidate can also become the leader of definition for some features in addition to all the roles above.

Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Micro architect will take charge in defining a processor Micro architecture features that will improve the performance and reduce the power consumption of the CPU core. This architect will use a performance simulator to explore his ideas and will analyze implementability of these features: Power, Timing, Area. This architect will utilize his processor and VLSI design experience to develop many advanced features for Huawei processors.

We are currently looking for a Performance Simulation Expert develop and evaluate next generation performance features as well as develop the future generation of our Compute system simulation infrastructure, models and analysis tools.

The company Operating System Team is looking for a highly talented Embedded SW Integration Engineer with a passion for operating systems and Linux in specific. The team is developing the Boot and Operating System SW for our companys autonomous vehicle and smart advanced driver assist platforms.
What will your job look like?
Hands-on debugging and testing of OS and related components (Boot, HW initialization, Device drivers, Linux Kernel, User space libraries and tools & automated tests in python).
Deep understanding of the involved OS/Boot components and their integration with other SW/HW modules involving testing automation and system level validation.
Closely work with members of the Boot and OS development teams to integrate, test and automate new features, components and systems.
Release & feature management in a multi-project and multi-disciplinary environment while managing CI systems for testing coverage.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Design Verification Engineer, you will work as part of a research and development team, and will build verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers in projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification which can range from verification planning, test execution or collecting, and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers , our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog/UVM, or Specman.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Lead coverage measures to identify verification holes and to show progress towards tape-out.

Do you want to impact billions of users by developing an extraordinary product with a prime focus on accuracy, understandability and performance of the product?
Bring passion and dedication to your job and there's no telling what you could accomplish.
PHY system engineers are responsible for pre/post-silicon system design activities to achieve full operation and optimization of all PHY aspects of a highly integrated complex wireless communication device.

In this role, you will be part of the team responsible for the PHY system design integration of a WiFi/BT/UWB IC solution. This includes, among other things:
Digital correction methods of RF impairments like Digital pre-distortion, IQ MM correction, Power Control, AGC, Modem control.
Optimizing PHY performance for a given system constraints.
Participate in modem design and implementation, from the architecture stage and floating point implementation all the way to RTL/FPGA validation in fixed point - Debug complex multi-disciplinary issues spanning from RF, PHY, MAC, HW and SW.
Connect with X-functional teams (RFIC, Algo, SW/FW etc.).
Perform hands-on PHY/RF lab work.

We are looking for talented engineers to help us develop a semiconductor platform based on a revolutionary architecture.
Take part in the development of products within a disruptive system architecture. Youll have the opportunity to work in a dynamic, open, fast-paced environment, developing the technologies that power the worlds largest cloud provider. AWS provides a highly reliable, scalable, low-cost infrastructure platform in the cloud, which powers hundreds of thousands of businesses in 190 countries around the world.
This position is based out of our Haifa office
Key job responsibilities
In this role, you'll be responsible for creating ML (Machine learning) and HPC (High performance computing) automation and tools, create CI/CD flows and implement effective dashboards with high scale.
About the team
Diverse Experiences
AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasnt followed a traditional path, or includes alternative experiences, dont let it stop you from applying.
Why AWS?
We are the worlds most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating thats why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses.
Inclusive Team Culture
AWS values curiosity and connection. Our employee-led and company-sponsored affinity groups promote inclusion and empower our people to take pride in what makes us unique. Our inclusion events foster stronger, more collaborative teams. Our continual innovation is fueled by the bold ideas, fresh perspectives, and passionate voices our teams bring to everything we do.
Mentorship & Career Growth
Were continuously raising our performance bar as we strive to become Earths Best Employer. Thats why youll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.
Work/Life Balance
We value work-life harmony. Achieving success at work should never come at the expense of sacrifices at home, which is why flexible work hours and arrangements are part of our culture. When we feel supported in the workplace and at home, theres nothing we cant achieve in the cloud.

You will be responsible to create analysis tools to assist in architecture exploration. You will define and simulate CPU features and develop supporting tool chains including simulators, analysis tools, compiler, etc.. You will collaborate with SW and algorithm teams as well as implementation teams to define and build efficient CPUs that integrate seamlessly into various subsystems.
Responsibilities
Work with SW and algorithm teams for optimization and customization of ISAs, CPU architecture, and micro architecture features
Create and analyze benchmarks for CPU and SOC subsystem architectures
Develop architectural and performance simulators
Define and develop toolchain infrastructure