דרושים » חשמל ואלקטרוניקה » Senior Verification Engineer

You'll join our architecture team, central to silicon development .
You will define features of future devices using the latest silicon technologies, focusing on Logic Design and coding.
You will be responsible for defining the device specificaton.

Join the PHY System Team, a key part of silicon development.
You'll be at the forefront of defining, implementing, and validating advanced PHY and system solutions for next-generation network devices.
Your responsibilities will include:
Defining features for future devices utilizing cutting-edge silicon technologies.
Developing and optimizing PHY sequences and calibration processes.
Driving system-level definitions, operations, and post-silicon validation.
Collaborating with cross-functional teams to ensure high-quality deliverables.

Join the our team in developing a unified silicon architecture for web-scale and service provider networks.
our team provides an outstanding, unique experience for ASIC engineers by combining the resources offered by a sizable multi-geography silicon organization and a large campus (with an on-site gym, healthcare, café, social interest groups, and philanthropy) with the startup culture and breadth of growth opportunities that working in a smaller ASIC team can provide.
Your Impact
Define devices and deliver specifications to other development teams.
Work with internal and external customers to understand and define current and future requirements.
Innovate at all levels to deliver market-first features and solutions.
Conduct in-depth research to shape the architecture of next-generation networking devices.
Contribute to full-chip integration and cross-functional collaborations to enhance design methodology.
Participate in the definition and analysis of networking system solutions, ensuring they meet market and technical needs.

You'll be part of our group, the hub of ASIC design.
As a member of our team, you'll contribute to driving our groundbreaking next-generation network devices..
Our unique team operates in a startup atmosphere within a stable and leading corporation.
Our design center is exceptional, hosting all silicon hardware and software development disciplines under one roof.
We are redefining the industry and building a new internet for the 5G era, providing a unified, programmable silicon architecture that is the foundation of all future routing products.
Our devices are crafted to be universally adaptable across service providers and web-scale markets, suitable for both fixed and modular platforms. Our devices deliver high speed without sacrificing programmability, buffering, power efficiency, scale, or feature flexibility.

You'll be joining our Physical Design team within Silicon One, which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.
Our Backend Engineers handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.
You will be the tech lead for CAD within the team, leveraging your extensive backend and physical design experience to drive the development, optimization, and innovation of CAD methodologies and tools, ensuring the highest quality and efficiency in our chip design flows from RTL to GDS.
We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.

Youll be joining the post silicon validation team in PHY system group Silicon One group as part of the silicon development .
Our team deals with PHY and system aspects of the SerDes communication IP: PHY FW, calibrations, system definitions and operations and post-silicon validation including developing the automation infrastructure and tools.
We use latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.

You'll join the Front-End Design team , responsible for all chip design processes from definition and microarchitecture to final product.
Our design engineers engage in every aspect of chip design: definition, design, verification, signoff, and validation through to production.
We apply the latest silicon technologies and processes to build the largest-scale and most sophisticated devices, pushing the boundaries of feasibility.