דרושים » מדעים מדוייקים » Verification engineer

We are seeking best-in-class ASIC Verification Engineers to help deliver the worlds leading CPU's and SoC's. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to pursue, that only we can take on, and that matter to the world. We have crafted a team of excellent people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

NVIDIA is building a new group in Israel, this group delivers security engines and risc-V processor IPs to all of NVIDIA product lines working with all NVIDIA groups around the world. We are looking for inquisitive, motivated engineers with experience to continue to build this new group. As a senior member of our team, you will be responsible for the verification of high-performance, low-power security engines and risc-V processor modules. You will work closely with architects, design engineers, FC verification engineers, and SW teams.

What you will be doing:
Participate in micro-architecture development and document specifications.
Build System Verilog UVM verification environments for IPs in areas of crypto and Risc-V platforms.
Build verification and test plans to get to complete coverage.
Work with the designers in our team to debug and clean all bugs
Deliver the IPs to higher level verification like Cluster, FC and emulation.

We are looking for a Senior Chip-Design Verification Engineer to join our Network Adapter Silicon group. As a Senior Verification Engineer in our Networking Silicon team, you will join a group of passionate engineers to design and implement the next generation state-of-the-art Networking Silicon chips. In this position, you will make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a combined design and verification team which develops core units within the Networking silicon.

Build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, FW and Post-Silicon validation.

looking for best-in-class Physical Design Manager to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:
Manage and Lead Physical Design team, up to 10 engineers.
Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part inflows development.

We are looking for a Sr. Embedded Engineer.
As a Senior Embedded Engineer, you will play a key role in developing cutting-edge technologies across diverse areas such as power electronics, control theory, DSP, and communication protocols. This position offers the opportunity to take full ownership of projects, guiding them from concept and simulation through development, integration, and field deployment. You will work closely with cross-functional teams, including hardware engineers, ASIC developers, and system architects, to define and implement software requirements while optimizing embedded systems.
Key Responsibilities:
Developing features in various areas and disciplines power electronics, control theory, DSP and communication over different platforms.
Developing on various micro-controllers and dealing with various RT constraints.
Ownership of a project\product from end to end- from concept and simulation, through development and integration and field deployment.
Building complex simulations integrating SW
and HW.
Collaborate with cross-functional teams including hardware engineers, ASIC developers, and system architects to define and implement software requirements.
Design, implement, debug, and optimize code in C++ and C to interface with hardware.

we are a global pioneer of RADAR systems for active military protection, counter-drone applications, critical infrastructure protection, and border surveillance.
Join Our Team as a Radar Performance Analyst!
Are you passionate about radar technology and skilled in performance analysis? Do you thrive in a dynamic, innovative environment where your contributions directly impact cutting-edge solutions? If so, we invite you to explore this exciting opportunity to join our growing team as a Radar Performance Analyst in our Algorithms Department.
Responsibilities:
Collaborate with experienced radar algorithms engineers to optimize radar system performance.
Analyze experiments and field tests to derive technical insights and recommendations for enhancing radar system performance.
Conduct in-depth performance analysis of various radar algorithms to ensure optimal functionality.

A highly motivated senior AI cloud infrastructure Software architect to join our team in Israel. Work on innovative technologies shaping the future of AI and cloud infrastructure. We are developing RDMA Transport protocols within the Networking software architecture team. Efficient and fast communication between GPUs directly impacts end-to-end application performance. This impact continues to grow with the increasing scale of next generation systems. This is an outstanding opportunity to advance the state-of-the-art, break performance barriers, and deliver platforms the world has never seen before. Are you ready to build the new and innovative technologies that will help realize vision?

What you'll be doing:
Translate requirements into vision, architecture, and roadmap
Design infrastructure to support programmable improvements to RDMA protocols for E/W AI networking stack
Collaborate with multi-functional teams to innovate and deliver networking solutions
Explore innovative solutions in HW and SW for our next-generation platforms as part of programmable RDMA architecture
Build proofs-of-concept, conduct experiments, and perform quantitative modeling to evaluate and drive new innovations