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Our RADAR VLSI TEAM is looking for an Embedded SW Engineer for SystemC Modeling that include Performance and Program view Modeling. You will be part of VLSI emulation team, working on current and next-generation designs for next generation sensors.
The SystemC models are fundamental parts of the VLSI chip infrastructure, they are used during HW architecture definition phase and by SW developers for system shift left.
What will your job look like:
You will work on Critical performance analysis and optimizations on the ASIC micro architecture as multi-NOC , DDR and CPU .
You will work on developing SystemC models that describe the RTL models on High level language and enable true system . level shift left for the embedded SW team.
You will have the opportunity to work on state-of-the-art simulation and profiling tools and adopt them to our needs.
You will work closely with HW architects and SW/Algorithms developers.

We are looking for an experienced engineer, to help us develop our cutting-edge semiconductor platform.
Youll have the opportunity to join a top-tier, agile, fast-paced team, and take part in the development of the technology that powers the worlds largest cloud provider.
Our Web Services offers a highly reliable, scalable, low-cost cloud platform that enables hundreds of thousands of businesses in 190 countries around the world.
We are looking for talented people to join the Chip Design team in TLV, working on the Nitro product line.
Take an active, significant part in developing the next generations of products that will enable AWS to be the lead in the Cloud sector.

To apply: please compile your CV and university grades sheet into 1 pdf, without both documents, your application cannot be considered.

Key job responsibilities:
Full ownership of one or more IPs within the product:
- Micro-architecture.
- RTL coding and debug.
- Synthesis and timing closure.
- Sign-off.
Supporting the Verification and Emulation teams:
- Test plan.
- Coverage review.
Ensuring that the chip meets quality and reliability standards
Collaborating with cross-functional teams, including Product Definition, Verification, Software, and Physical design.

Our Autonomous Driving group in Haifa is looking for an Electrical Validation & Embedded SW Engineer. This is an exciting opportunity to join a growing team of highly talented engineers, working on the worlds most advanced SoCs for ADAS and self-driving vehicles.
Electrical Validation engineers enable, debug, and validate high-speed interfaces - like LPDDR4/5, PCIe Gen4/5, and CDPHY - using high-end Lab measurement equipment and advanced SW tools. This dynamic work environment requires interfacing with Silicon and hardware design engineers, Software developers, Signal Integrity, and System Validation teams. The proximity to Signal/Power integrity simulation activities - we are a single SI/EV team - is another powerful advantage, enabling joint simulation-measurement effort.
What will your job look like:
You will join a relatively small team of talented and experienced EV/SI/PI engineers with wide scope of responsibility, from Pre-Si SI/PI simulations to Post-Si Electrical validation and debug, covering all the high-speed analog interfaces of our EyeQ products.
Responsibilities include performing electrical spec compliance and system margin validation, interface optimization, statistical results analysis, validation flow definitions, and automation, etc.
You will also deal with FW development, automation enabling, data post-processing and debug of high-speed interfaces, like LPDDR4/5, PCIe Gen4/5, and D/C/MPHY.

Required Production Configuration Manager
The Quality team is responsible to foster quality and excellence in our products and processes across the entire company. MEQ team focuses on ensuring high customers' satisfaction through continuous improvement and implementation of automotive standards and best-practices such as ASPICE, IATF16949, ISO 9001, VDA/AIAG Core Tools and ISO26262, both internal and across the entire supply chain, In order to support MEQ objectives, The QMS & Production Quality team is looking for a Production Configuration Manager.
What will your job look like:
Define and implement cross company configuration and change management process, incl: KPIs, Inputs, Outputs, Control points, Reports (from scratch)
Work closely with colleagues from other departments (PMs, development engineers, production engineers, management) and other organizations (suppliers and customers) to realize relevant activities
Define work items/products release process.
Manage and verify retention, back-up and recovery of company products/projects work items.
Create, manage and update PPAP folders for company products
Identify opportunities for improvement and execute them.
Create relevant work items templates and coach the team how to use them.
CCB team - Lead/participate.
Support configuration & change related issues with customers, suppliers and 3rd party organizations.

Were looking for a Physical Design STA Technical Expert to join the growing Physical Design Team, responsible for state of the art SoC design from definition to Tape-Out.
What will your job look like:
Leading FC timing activities & methodologies for brand New SoC, from definition to TO.
Writing design constraints (SDC) for FC/IP/Block levels for all modes.
Involved in chip architecture definition for functional & DFT domains.
Working in close collaboration with the front-end & architecture team.
Working with engineers to identify and overcome roadblocks and obstacles.
Defining AC timing from spec to implementation.
Supporting complex clock structures.

We are seeking an exceptional Applied Scientist to join our Prime Video Sports tech team in Israel. Our team is dedicated to developing state-of-the-art science to allow for personalizing the customers experience and customers to seamlessly find any live event in our selection. You will have the opportunity to work on innovative, large-scale projects that push the boundaries of what's possible in sports content delivery and engagement. Your expertise will be crucial in tackling complex challenges such as temporal information retrieval, leveraging Generative AI and Large Language Models (LLMs), and building state-of-the-art recommender systems.

Key job responsibilities:
We are looking for an Applied Scientist with domain expertise in Personalization, Information Retrieval, and Recommender Systems, or general ML to lead the development of new algorithms and end-to-end solutions. As part of our team of applied scientists and software development engineers, you will be responsible for researching, designing, developing, and deploying algorithms into production pipelines. Your role will involve working with cutting-edge technologies such as Gen AI/LLMs to enhance content discovery and search capabilities. You'll also tackle unique challenges like temporal information retrieval to improve real-time sports content recommendations. As a technologist, you will drive the publication of original work in top-tier conferences in Machine Learning and Information Retrieval. We expect you to thrive in ambiguous situations, demonstrating outstanding analytical abilities and comfort in collaborating with cross-functional teams and systems. The ideal candidate is a self-starter with the ability to learn and adapt quickly in our fast-paced environment.

Were looking for a Physical Design Expert to join the growing Physical Design Team, responsible for developing our next generation Imagining Radar SoC from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner from RTL to GDS with horizontal ownership.
Floorplan exploration and collaboration with front-end and architecture teams.
Synthesis exploration and final synthesis including: SDC definition, Scan insertion, Lint, LEC, UPF-LP & Spyglass verification.
Place & Route: from Synthesis to final layout and signoff verification on all tools and floors, with target to achieve best PPA.
STA: timing analysis, working with Sub System and Full Chip owners to manage block and top level constraints for synthesis, P&R and signoff.
Signoff : on all physical design domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification.

We are looking for a skilled and motivated Embedded SW Integration Team Lead for the Platform OS Department to manage the daily integration of the OS deliveries into our SW stack. The Platform OS team is leading a global effort of making the Linux OS as the Automotive Safety OS that will fuel the Autonomous Vehicle and the whole automotive industry. Youll lead a fast-paced, hands-on and dynamic team of integration and automation engineers, contributing to the overall qualification and integration effort while collaborating with other teams across the organization.
What will your job look like:
Lead and mentor a team of 4-6 SW Integration and Automation engineers
Manage the daily integration of the aggregated delivery of all OS teams upstream into our SW stack.
Daily tracking of changes coming from OS development teams and controlling their integration order, priorities, test coverage and conflicts.
Managing a daily integration forum to track nightly tests reports, triaging new issues found and assigning them to development teams.
System level understanding of the OS features and tracking the test coverage developed by the OS developers.
Tracking the utilization, health and allocation of the HW resources in the farm.
Balancing test coverage to HW availability through tracking CI load.
Acting as a PoC for all OS integration issues. Both within the OS teams and externally.
Tracking bug escapes and their mitigation in the OS test coverage.

Our EyeQ Platform Group (EPG) is seeking a motivated Formal Verification Engineer to join our team and contribute to development of hardware verification environments.
This position offers an opportunity to apply formal methods to verify the correctness of various complex digital systems.
This is an exciting opportunity to join a team of talented engineers, working cutting edge technologies in the field of autonomous vehicle.
What will your job look like:
Be the owner of formal verification environment from first draft to sign-off stage
Apply formal methods to verify the correctness of various complex digital systems
Work with HW architects\designers to define assumptions, rules and cover properties
Help define the formal verification methodology and environment to be applied by the team
Explore new Formal methods and Tools
Work with tools like Cadence JasperGold, Verisium manager, Xcelium, Indago
Analyze verification results, identify bugs, and collaborate with engineers to resolve design issues
Develop generic formal blocks\functions of commonly used logic, to be later used off the shelf.

Our Unit Level Verification Team in Haifa is looking for an experienced verification engineer to be involved in the development of our future AI and deep learning HW accelerators.
This is an exciting opportunity to join a team of highly talented engineers, working on the most cutting-edge technologies to deliver our EyeQ future chips, aimed to power the worlds first fully Autonomous Vehicle!
What will your job look like?
Define, implement and enhance verification environments using UVM methodology.
Write and debug tests that combine UVM methodology and SW code.
Identify and write various types of coverage measures.
Collaborate with designers, architects, and SW developers from Haifa and Jerusalem teams to deliver the most comprehensive verification environment.
Integrate Industry Standard (such as AXI and OCP) and other 3rd party VIPs.

Required Experienced SoC Verification Engineer
Which department will you join?
The SOC verification group owns the important and challenging job of verifying our chip. It is involved from product specification to final SOC delivery, and involves all the system components. The group is made up of few of the best verification engineers, so besides contributing to making our roads safer, youll get the chance to work at one of the most professional verification teams.
What will your job look like:
You'll be responsible for Pre-Silicon system-level verification of the most cutting-edge AI accelerators and technologies in the automotive field.
Define the TestPlan, develop and run tests on simulation/emulation environments, develop test environment and verification collaterals.
You'll have a broad effect on our unique product from the very beginning of the process.

Our Autonomous Driving Software Group in looking for an experienced Linux Kernel & Security Developer to design and implement secure embedded software solutions.
This is an exciting opportunity to work with highly talented engineers and contribute to cutting-edge security innovations in automotive technologies
What will your job look like?
You will research, design, and implement Linux kernel drivers and OS features, ensuring compliance with security best practices.
Maintain and enhance existing kernel components while mitigating potential vulnerabilities.
Integrate embedded software solutions in our automotive platforms, including HW bring-up, debugging, and unit testing.
Conduct threat modeling, penetration testing, and vulnerability assessments for Linux-based embedded systems.
Optimize memory management, I/O, networking, and storage security within the Linux kernel.

Required Experienced RFIC/Analog CAD Engineer
The RFIC/Analog design groups in our Radar organization is responsible for developing the cutting edge Transceivers in mmW frequencies for the best Imaging Radar technology. The design process includes the entire process from specs to productization.
To support these challenging processes, we need a skilled CAD team that will work with the design teams on all design aspects and flows from design environment setups, through design tools implementations and support and to chip level verifications and validation enablement.
We're looking for an Experienced CAD or Design Automation Engineer to develop our RF/Analog design tools/flows and automation flows for the next-generation Imaging Radar chips.
What will your job look like:
Build and support RF/analog design environments
Implement, develop, and maintain design flows, tools and scripts.
Evaluate and explore new automation technologies and advocate for efficiency improvements
Evaluate multiple vendor solutions and guide execution, in the most optimal use, based on design needs
Effectively communicate and support a large number of designers, providing high-quality tools and flows, documentation, and presentations

Required Experienced Physical Design Engineer
The EyeC VLSI team designs chips for RADAR systems used in ADAS and autonomous vehicles. Our Physical Design team operates in a startup-like environment, emphasizing technical expertise, execution, and ownership. Each engineer in the Physical Design team takes full responsibility for their work, from initial definition through execution and final sign-offs. Engineers collaborate closely with design and architecture teams to develop constraints, conduct design reviews, and implement RTL modifications to ensure convergence.
We are seeking an Experienced Backend to join our growing Physical Design team. In this role, you will play a key part in the design of state-of-the-art SoCs, from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner from RTL to GDS.
Floorplan exploration with guidance and collaboration with front-end and architecture teams.
STA: work with FE and floor planner to manage block and top level constraints and 1st level of timing analysis.
Synthesis exploration and final synthesis netlist: Scan insertion @ synthesis, clean checks from Lint, UPF & Spyglass.
Place & Route: from Synthesis netlist to final layout and signoff verification with target to achieve best power performance and area.
Signoff : on all physical design domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification.

Required Experienced Logic Design Engineer
The EyeC VLSI team specializes in designing advanced radar system chips for ADAS (Advanced Driver Assistance Systems) and autonomous vehicles. The group is responsible for all disciplines of VLSI development, including but not limited to Logic Design, Design Verification, Microarchitecture, Analog and circuit design and layout, Physical and structural design (backend), Product and test engineering.
What will your job look like:
Design ownership on major blocks/clusters from definition to implementation phase.
Participate in various ASIC activities and flow definition which includes CDC, DFT, Lint.
Design micro-architecture of custom blocks.