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we are looking for a Staff Software Engineer
Your Role:

Solve some of the teams toughest technical problems and build solutions that hold up as the product grows.
Partner with product managers, architects, and other engineers on technical approach and planning, contributing perspectives that can extend beyond your immediate area when its useful.
Act as a go-to technical resource for complex design and architecture questions, helping ensure solutions hold up against business needs, compliance standards, and long-term maintainability.
Take ownership of the most complex technical issues that come up in your systems, driving root cause analysis and fixes that hold up over time.
Mentor other engineers through code review, design discussions, and everyday guidance, helping raise the technical bar around you.
Bring a high bar to your own code and design work, and help others do the same through thoughtful review and knowledge sharing.

Requied Full Chip CAD Physical Design Engineer
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.The AI and Infrastructure team is redefining whats possible.
We're the driving force behind our groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Demonstrate an understanding of the Register-Transfer Level (RTL) to Graphic Data Stream (GDS) II flow.
Manage the implementation of large, complex system-on-chips (SoCs), subsystems, and sub-wrappers, and demonstrate an understanding of associated issues and solutions.
Utilize floorplanning, power grid design, and place-and-route methodologies, and use Synopsys tools like Floorplan Compiler (FC) and Formality.
Exhibit an understanding of advanced node design (e.g., 5nm and below) and related optimization techniques.
Develop script in Synopsys TCL and Python.

Required Senior SoC Formal Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our mission is to build the best cloud in the world for our services and for our Cloud customers, by solving real world business issues of performance, cost, and scale, utilizing hardware, software, and system solutions. To better serve evolving cloud needs, we are establishing a team in Israel to develop custom chips for servers.
In this role, you will perform formal verification of design properties of complex ASIC designs. You will collaborate closely with design and verification engineers to define meaningful properties that capture the design intent of a logic block and constraints on its input stimulus. You will also help define and improve design and verification methodologies that allow you to achieve formal verification closure.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Plan the formal verification strategy and create the properties and constraints for complex digital design blocks.
Utilize formal property verification tools combined with formal verification closure techniques to verify properties and apply sign-off to blocks.
Pioneer and refine formal verification methodologies by systematically embedding AI tools to optimize verification accuracy.
Architect and implement reusable formal verification components.

we are the agentic intelligence platform for cyber and quality teams. We protect and analyze data from millions of connected assets worldwide, including vehicles, robots, charging stations, fleets, and the broader physical-AI ecosystem - for Fortune 500 companies. Our platform spans AI and API security, cybersecurity XDR, proactive quality detection, and cyber threat intelligence.
we are looking for a highly motivated student to join our Data Analytics team. This role includes exploring and extracting insights from millions of connected vehicles on the road. As a Data Analyst, you'll develop the next generation of cybersecurity and mobility data applications for the automotive industry.
we are a fast-growing company and is looking for determined and devoted individuals. This is a chance to witness the connected vehicles revolution from a different angle. You will play a major role in the companys engagements, research large complex datasets, and use cutting-edge tools and methodology.
This role is part-time and is Israel based.
Responsibilities
Leading the data onboarding process of new customers.
Explore raw data of various customers as preparation for parsing and normalization in order to turn data into actionable insights and make data-driven decisions.
Use big data tools and AI to analyze large scale real-time data of connected vehicles and identify anomalies and emerging threats to create meaningful detectors that bring value to our customers.
Representing the data function both internally and externally, including customer-facing interactions.

Required Senior Silicon DFT Lead
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As the Design for Test (DFT) Engineer Lead, you will play a crucial role in DFT Architecture and DFT design, and support devices to production. You will be responsible for providing technical leadership in DFT, developing flows, automation, and methodology, planning DFT activities, tracking the DFT quality throughout the project life-cycle, and providing sign-off DFT to tapeout.
Responsibilities
Lead and execute DFT activities in the design, implementation, and verification solutions for Application-Specific Integrated Circuits (ASIC).
Develop DFT strategy and architecture, including hierarchical DFT, Memory Built-In Self Test (MBIST), and Automatic Test Pattern Generation (ATPG).
Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT requirements are met and mutual dependencies are managed.
Manage a DFT team planning, deliverables, and provide technical mentoring and guidance.
Lead DFT execution of a silicon project, planning, execution, tracking, quality, and signoff.

Were seeking an outstanding Senior SW Engineer to join our team and help us develop our data frameworks integrations. This is a rare opportunity to influence the future of data processing.

Responsibilities:

Develop our Spark plugin and integrations

Develop in Scala and Java

Contribute to open-source projects

Develop in Python

Design advanced algorithms of processing and optimizing query plans

Define our query abstraction layer

Collaborate with other software teams to optimize software and hardware integration for maximum performance

Required CPU Design for Test Engineer, Cloud
About the job
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our platforms, we make our product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
In this role, you will be part of a varied team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You will contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next-generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Design-for-Test (DFT) Engineer, you will play a crucial role in DFT design, and support devices of extreme complexity to production. You will be responsible for developing flows, automation, and methodology, executing DFT activities. You will be responsible for test vectors end-to-end, from generating DFT content on complex design, debugging to coverage goals, simulating it at gate level, sign-off DFT to tapeout, and debugging Si results.
Responsibilities:
Execute activities in the design, implementation, and verification of Design for Testing solutions for Application-Specific Integrated Circuit (ASICs).
Develop DFT strategy for array DFT, hierarchical DFT, Scan, and Automatic Test Pattern Generation (ATPG).
Perform ATPG, scan coverage debug and drive design fixes for coverage and quality improvements.
Perform DFT verification at RTL and gate level.
Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT design requirements are met and mutual dependencies are managed.

We are looking for a talented Algorithm Engineer to join our team and help shape the next generation of products.

In this role, you will develop and optimize algorithms for database operations running on our hardware accelerator, improve performance, and enable new capabilities.

You will gain a deep understanding of the entire stack from systems and applications to software and hardware and work across different parts of the codebase.

Responsibilities:

Researching state-of-the-art algorithms and techniques for data analytics and hardware acceleration

Implementing these algorithms in software, then simulating and optimizing their performance

Working closely with software and hardware engineers

Participating in design reviews and contributing to key design decisions

Required Senior Silicon Physical Design Engineer
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a SoC Physical Design Engineer, you will collaborate with functional design, Design for Testing (DFT), architecture, and packaging engineers. In this role, you will solve technical problems with innovative micro-architecture and practical logic circuits solutions, while evaluating design options with optimized performance, power, and area in mind.
Responsibilities
Use problem-solving and simulation techniques to ensure performance, power, and area (PPA) are within defined requirements.
Collaborate with cross-functional teams to debug failures or performance shortfalls and meet program goals in lab or simulation.
Design chips, chip-subsystems, or partitions within subsystems from synthesis through place and route, and sign off convergence, ensuring that the design meets the architecture goals of power, performance, and area.
Develop, validate, and improve Electronic Design Automation (EDA) methodology for a specialized sign off or implementation domain to enable cross-functional teams to build and deliver blocks that are correct by construction and ease convergence efforts.

We are looking for an experienced Software Engineer (4+ years) to join the team as an AI Integration Engineer, supporting one of our enterprise clients as part of their AI-Native Development program.
In this role, you will act as an AI Champion and Technical Mentor within the clients R&D organization. Your mission is to help development teams effectively integrate AI tools, agentic coding workflows, and best practices into their daily software development lifecycle (SDLC). You will help guide teams through AI adoption, help overcome resistance, and ensure AI delivers real value.
This is not a feature-delivery or coding-focused role, especially in the early stages, the position is centered on enablement, training, and integration, working closely with teams to embed AI development tools into real workflows and support the organizations AI transformation.
This is a high-impact role focused on technical enablement, AI expertise, and effective collaboration with development teams, and intended for experienced engineers who actively use AI in their day-to-day development work and are looking to influence how teams work, rather than for junior profiles or engineers seeking a purely coding-focused position
What Youll Do:
Help drive adoption and optimization of Claude Code and/or similar Agentic coding tools
Support software and QA engineers, answer technical questions and help unblock teams
Stay on the cutting edge of AI releases and best practices, turn your learnings into shareable assets (custom rules, agents, skills, demos, playbooks, etc.)
Measure impact, identify gaps and improvement opportunities across the SDLC
Help defuse resistance to change with patience and empathy
Partner with DevOps, architects and management to track and optimize AI utilization.

Required Signal/Power Integrity Engineer, PhD Graduate
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities:
Simulate high speed interface electrical behavior using HSPICE or other circuit simulators.
Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.
Collaborate extensively with cross-functional teams, including ASIC architects, digital/analog designers, physical design/layout engineers, and system engineers, to define specifications and resolve integration challenges.
Execute lab measurements utilizing test equipment like oscilloscopes, Vector Network Analyzers (VNA), Time Domain Reflectometers (TDR) , Spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.
Establish robust design rules and guidelines for optimal signal/power integrity during PCB and package layout, ensuring high production yield and reliability.

In this role, you will be responsible for building data infrastructure for performance tuning, and analysis of a new analytics product. As a member of our Data Performance team, you will collaborate closely with other SW & HW Engineers to improve the performance of our new cutting-edge APUs. You will collaborate with our business leaders and participate in the product design and implementation. You will evaluate, implement, and integrate a diverse set of tools and technologies such as Spark, Comet, Velox, Dagster, Hardware emulators and software simulators.





Join a multi-disciplinary team of experts operating at the foundation of data infrastructure stack

Build a robust data benchmarking infrastructure

Develop in-house measurements and ETL tools

Conduct detailed performance analysis and characterization

Research state-of-the-art benchmarks and techniques for SQL and data optimization

Were expanding a fast-growing practice that helps engineering teams leverage AI in their SW development lifecycle and transform into AI-native teams. Weve served dozens of satisfied customers in Israel and abroad and are now hiring a hands-on engineer to lead and drive R&D AI transformation programs, AI tooling adoption & tracking, create resources and run training at scale.
Key Responsibilities:
Own the AI R&D transformation and Agentic SDLC agenda across multiple clients: assessments, KPIs, rollout plans, training, champions programs, skills/agent developments, etc.
Lead AI Coding Tooling optimization end-to-end, plus evaluate/compare adjacent tools (e.g. Claude Code, Cursor, GitHub Copilot, Kiro, etc).
Create training materials (slides, exercises, demos) and deliver workshops; Train teams yourself and mentor trainer bench.
Develop AI infra & tooling, dashboards, frameworks, playbooks and AI resources (skills, agents, hooks, MCPs, etc) for clients to enable transformation, automation and governance
Partner with Sales/Delivery on pre-sales to attract new customers.
Stay on the cutting edge of releases and best practices, turn learnings into repeatable packages.

We are looking for an ATE Engineer to join our multidisciplinary team in central Israel.
The role involves developing and implementing complex automated test solutions, from requirements analysis through direct integration with hardware and Automated Test Equipment (ATE).
Key Responsibilities
Translate Test Requirements Documents (TRD) into automated Test Sequences/Scenarios using NI TestStand or OTM (ORION).
Develop, maintain, and enhance automated test sequences and deploy them in laboratory environments.
Integrate measurement instruments and communication protocols with ATE systems, perform debugging, and support troubleshooting activities.
Develop software components and DLLs in C# or C for hardware communication, when required.
Work closely with Hardware, Electronics, and Integration teams, including reading and interpreting electrical schematics.

Required Research Data Scientist II, Waze
About the job
The Personalized Experience team aims to give Waze drivers personalized, hyper-local, contextual and timely routing experience. The team contributes to the Personalized Navigation squad and more. The team members are embedded within the Waze development Squads. We develop and own Machine-Learning models from ideation to production, including research, production grade pipelines, feature engineering, experimentation, monitoring and dashboards, inspection and debugging.
The team works closely with the product team, helping to shape the requirements and success metrics. The team works closely with the Backend teams, integrating the models, ensuring a feedback loop to enrich the models, triage and solve users complaints, leading and guiding experimentation and more.
Waze is where people and technology meet to solve transportation challenges. It's a platform that empowers users to contribute road data and edit Waze maps to improve the way we move about the world. As the social navigation pioneer, Waze leverages mobile technology and a passionate global community to redefine expectations of todays maps.
Responsibilities
Feature engineering, model evaluation and error analysis, data processing and pipelines, model tuning, monitoring and dashboards.
Work with product managers, software developers and quality analysts to define requirements, formulate success metrics and lead experimentation.
Use data to help products to shape the future of Waze and drive innovation. Provide insights on user behavior and help engineers and quality analysts detect and solve complex problems.
Utilize Cloud Platform, Vertex AI, Python, Scikit-learn, TensorFlow, Airflow/Composer, Python and Looker tools.