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We are currently hiring for multiple Security Research positions across our Microsoft Defender Research teams in Israel. By applying to this unified pipeline, you will be considered for a high-impact role (at either the Security Researcher II or Senior Security Researcher role) within one of our specialized groups, including Autonomous Attack Disruption, Cloud Workload Protection, Identity Research, Posture Research, or Security for AI.

We are looking for passionate, highly skilled security researchers who thrive on the challenge of breaking complex attacker kill-chains. Leveraging Microsofts dominant market position and the worlds most massive telemetry set, you will have a direct, tangible impact on the security of the global economy. We are looking for researchers who want to see their findings transformed into production-ready protection, where the ultimate goal is not just to detect threats, but to prevent and stop them in near real-time.

Responsibilities

Investigate real world advanced attacker TTPs to develop high-fidelity protection signals, and robust logic across complex kill-chains.

Design and implement innovative capabilities that autonomously prevent, detect and disrupt sophisticated threats in near real-time.

Infuse deep security expertise into the analysis of massive telemetry sets using big-data query languages, reasoning over data to identify novel malicious patterns, and drive evidence-based research decisions.

Partner with engineering and product teams to share research insights, validate protection concepts, and push ideas forward into production-ready protection at a global scale.

Contribute expert insights to a strategic feedback loop by analyzing real-world attack data and telemetry to refine protection coverage and accuracy.

The WSSI (Windows Silicon System Integration) team is looking for an experienced Silicon Design Verification Team Lead to lead verification for complex silicon subsystems that are part of advanced solutions delivered in Windows client products.

This is an opportunity for an excellent DV leader to combine people leadership with meaningful hands-on technical contribution. You will lead a silicon engineering team that includes design verification, silicon design, and physical design engineers, while serving as the technical anchor for the team's verification strategy, execution, and quality.

The team works on complex security-oriented silicon subsystems that require rigorous pre-silicon verification and close collaboration with architecture, design, firmware, system engineering, and physical design partners to deliver robust silicon quality.

We are looking for a leader who is passionate about building excellent teams, driving rigorous execution, contributing hands-on to complex verification challenges, and continuously improving verification methodologies - including applying modern AI-assisted techniques to improve productivity, debug efficiency, and verification quality.

Responsibilities
Lead, grow, and mentor a silicon engineering team that includes design verification, silicon design, and physical design engineers, while fostering a culture of technical excellence, ownership, collaboration, and continuous learning.
Own and drive the verification strategy for complex silicon subsystems from planning through execution, closure, and emulation readiness.
Provide substantial hands-on technical contribution and leadership in verification planning, testbench architecture, debug, coverage analysis, regression quality, and verification closure.
Build and promote modern verification workflows, including AI-assisted techniques that improve verification environment development, automation, debug efficiency, coverage analysis, and execution quality.
Define verification plans, quality metrics, regression strategy, coverage goals, and emulation readiness plans aligned with project milestones.
Collaborate closely with architecture, design, system engineering, firmware, and physical design partners to identify risks early, resolve complex issues, and deliver high-quality silicon subsystems.

The WSSI (Windows Silicon System Integration) team is looking for a Senior Silicon Designer to help design complex silicon subsystems that are part of advanced solutions delivered in Windows client products.
This is an opportunity for an excellent silicon engineer to take meaningful technical ownership in a dynamic, agile, and highly collaborative environment. You will work on advanced subsystem design spanning microarchitecture, RTL implementation, integration, and design quality, with close collaboration across architecture, verification, firmware, system engineering, and physical design teams.
The role focuses on complex security-oriented silicon subsystems. We are looking for someone who combines strong design fundamentals with curiosity, ownership, and the motivation to learn and apply modern techniques - including AI-assisted workflows - to improve silicon development productivity and quality.

Responsibilities
Own and drive microarchitecture and RTL design for complex silicon blocks and subsystems, translating architecture and system requirements into clean, efficient, and high-quality hardware implementations.
Collaborate closely with verification, firmware, system engineering, architecture, and physical design partners to define interfaces, debug complex issues, manage technical risks, and deliver robust silicon solutions.
Contribute to subsystem integration, design reviews, quality checks, synthesis readiness, timing considerations, and design handoff flows.
Explore and apply modern silicon development workflows, including AI-assisted techniques for design productivity, debug, documentation, and quality improvements.
Act as a technical leader within the team by mentoring others, raising the engineering bar, and helping drive execution in a fast-moving environment.

We are seeking a seasoned Backend Tech Lead with a solid background in high-load environments and experience in managing multiple Linux servers. The ideal candidate is someone who thrives in a fast-paced, innovative, and technology-driven culture.
Responsibilities:
Own architecture for high-scale, user-facing backends and data pipelines.
Lead and mentor engineers; guide design reviews, roadmaps, and execution.
Operate production systems with clear SLOs/SLAs, on-call quality, and blameless postmortems.
Evolve our K8s/GPU platform, CI/CD, and observability to increase deployment velocity and resilience.
Integrate and serve ML models (PyTorch, CUDA/TensorRT, Triton) with a focus on throughput and cost.
Partner cross-functionally (ML, Product, Security, Finance) on priorities and cost/perf trade-offs.
Hire, level up the team, and uplevel engineering standards.

We are seeking a seasoned ASO Specialist to join our amazing growing team where each team member makes an impact.
Responsibilities:
Develop and implement ASO strategies using textual and visual tools on App Store Connect and Google Play for multiple projects, localized in a broad range of languages
Prepare briefs for graphic and motion designers and closely collaborate with them to build engaging visual content (Icons, Promo Screens, Promo Video, Cover Images)
Formulate and test hypotheses to enhance conversion rates
Work with tools like App Store Connect, Google Play, and App Tweak for analytics
Conduct A/B testing in Apps Consoles
Provide regular updates on progress and effectiveness
Potentially, make small contributions to the projects social networks.

Were looking for engineers who are proactive, curious, and take full ownership of their work. In this role, youll have the opportunity to drive real impact, shape the direction of our product, and grow as a technical leader.

You will:
Take end-to-end ownership of features-from design and implementation to deployment and ongoing improvement.
Build high-quality, scalable, and resilient systems using modern engineering practices.
Work closely with PM, design, and security experts to define and deliver customer-facing experiences.
Drive technical direction and make thoughtful tradeoffs that balance speed, quality, and long-term maintainability.
Bring a strong sense of initiative-identifying opportunities, raising issues early, and pushing ideas forward.

Were searching for a Senior Product Analyst to join our elite team and take our data game to the next level. In the past year alone, weve conducted over 200 A/B tests, and were just getting started. If youre a data wizard who thrives on uncovering insights and driving product strategy, this is the role for you.
Want to hear more - check the song at the bottom of this page!
Responsibilities:
Own the end-to-end analytics process, from data collection to insight generation.
Identify trends, opportunities, and actionable insights to fuel our explosive product growth.
Create stunning data visualizations and reports that inspire cross-functional teams to make data-informed decisions.
Lead high-impact testing initiatives to validate hypotheses and shape product development.
Manage and optimize our robust data pipeline to ensure scalability as we continue to skyrocket.

Software Engineer III, Waze, Mobile (Android)
About the job
Our software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to our needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.
Waze is where people and technology meet to solve transportation challenges. It's a platform that empowers users to contribute road data and edit Waze maps to improve the way we move about the world. As the social navigation pioneer, Waze leverages mobile technology and a passionate global community to redefine expectations of todays maps.
Responsibilities
Write product or system development code.
Participate in, or lead design reviews with peers and stakeholders to decide amongst available technologies.
Review code developed by other developers and provide feedback to ensure best practices (e.g., style guidelines, checking code in, accuracy, testability, and efficiency).
Contribute to existing documentation or educational content and adapt content based on product/program updates and user feedback.
Triage product or system issues and debug/track/resolve by analyzing the sources of issues and the impact on hardware, network, or service operations and quality.

Required Software Engineer III, Full Stack, SOAR Pulsar
About the job
Our software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to our needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.
You will join the Security Orchestration, Automation, and Response (SOAR) organization, which is central to improving security efficiency. SOAR solutions enable the structured, AI-assisted automation of the often manual investigation, analysis, and remediation actions that take place in a typical Security Operations Center (SOC). By leveraging generative AI and machine learning directly within our execution flows, we transform how analysts interact with security data. Our solutions empower analysts to intuitively build and optimize smart playbooks that integrate with the security and non-security systems, drastically improving response time, reducing analyst fatigue, and maximizing efficiency.
Responsibilities
Manage the Authorization and Authentication framework for the entire SOAR platform. Lead the design and implementation of granular Data Role-Based Access Control, ensuring multi-tenant security and precise data visibility controls for our global enterprise base.
Own the SOAR Settings Page and core platform governance, delivering intuitive, high-performance controls. Help pioneer the future architecture of SOAR-shaping a platform that transitions beyond static playbooks toward adaptive, self-steering incident response workflows that act independently on behalf of security teams.
Lead and contribute to multiple high-impact AI projects within the Platform. Be a key player in pushing the boundaries of innovation by integrating cutting-edge Generative AI technologies, utilizing our Agent Development Kit (ADK) to build intelligent security agents that assist users in real-time.

Required Senior Test Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our data centers are the most advanced in the world. In this role, you will help to manufacture the SoCs that power these data centers by developing and deploying comprehensive manufacturing test and data analytics solutions for high-volume manufacturing at wafer fabrications and Outsourced Semiconductor Assembly and Tests (OSATs). You will have an opportunity to create silicon in the most advanced technologies and follow it into the field to close the loop back to design and test for the next-generation of chips. You will help to integrate SoC technologies into devices and drive manufacturing test flows to assure performance and screen devices. You will drive yield improvement, cost optimization and work closely with cross-functional teams to ensure the optimal test coverage in production to ensure high quality SoCs. You will need to have a strong understanding of Integrated Circuit (IC) flows, wafer processing, testing, qualification, diagnostics, and failure analysis. You will work with various groups to deploy screening methodologies and flows for data processing, analytics and diagnostics. You will drive the release of cost effective production test solutions into mass production to hit yield and quality goals.
Responsibilities
Develop and implement high-volume manufacturing strategies for SoC products, optimizing ATE/SLT test coverage, reduce Defective parts per million (DPPM) and test costs, and manage product data integration.
Accelerate mass production via test program releases, data analytics, lot disposition, test time reduction, yield improvement, and return merchandise authorization (RMA) handling.
Partner with cross-functional teams (Test, Quality, Packaging, Operations) to deploy and maintain high-volume manufacturing (HVM) screening solutions.
Manage database integration for wafersort, final test, SLT, and burn-in, while overseeing test program integration, production release, binning, manufacturing flow definition, NPI material handling, and foundry process optimization.

Required Software Engineer II, Cloud Network
About the job
Our software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to our needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.
Cloud accelerates every organizations ability to digitally transform its business and industry. We deliver enterprise-grade solutions that leverage our cutting-edge technology, and tools that help developers build more sustainably. Customers in more than 200 countries and territories turn to Cloud as their trusted partner to enable growth and solve their most critical business problems.
Responsibilities
Build the tools and data pipelines that provide transparency into our cloud network.
Design, implement, and maintain high-impact observability solutions (e.g., packet sample logs) that enable on-call developers, Site Reliability Engineers (SREs), and support teams to troubleshoot complex networking issues.
Lead the team's AI transformation, contributing to network labs by building and optimizing Agentic tools and diagnostic skills that expose observability data through automated, LLM-driven workflows.
Contribute to the scalability of data pipelines and the reliability of our AI-driven diagnostic suite while participating in the team's on-call rotation to resolve customer escalations.

Required Senior RTL Design Engineer, Digital Signal Processing
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
As an RTL Design Engineer, you will be a key contributor to the physical implementation of next-generation TPU technology building ASICs for high-speed communication systems. You will take ownership of complex blocks, translating mathematical models into bit-exact silicon. Your expertise in front-end design flows will be vital in delivering the hardware that powers our advanced AI models and cloud services.
We're the driving force behind our groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
Responsibilities
Design and implement high-speed blocks, taking end-to-end ownership of complex modules within the larger system.
Solve complex implementation issues related to GHz-frequency timing closure and advanced process nodes.
Transform high-level architectural specifications and communication theory models into efficient, bit-exact implementations.
Perform fixed-point analysis and micro-architectural trade-offs. Execute and optimize the front-end design flow for your assigned components to ensure, sign-off quality designs.
Collaborate closely with verification teams to develop bit-exact C++/SystemC models and ensure seamless integration.

Required Power and Signal Integrity Engineer
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
As a Power and Signal Integrity Engineer, you will be responsible for the design and characterization of signal and power integrity of our IC designs. You will design the external electrical interfaces of the device, from their Signal/Power-integrity and electrical usage perspectives.
You'll set up methodologies, perform simulations, silicon characterization and correlations to ensure our IC designs meet systems design budgets and achieve the highest performance. You will work with systems architects, ASIC design, systems engineers, and partner cross-functionally with teams and external vendors/partners.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.
Design and optimize power distribution networks (PDN) across chip, package, and board levels.
Manage power/ground planes, decoupling capacitors, and power gating strategies.
Conduct both pre-layout and post-layout power integrity simulations to analyze power and ground noise (SSN/SSO), voltage drops (IR drop), and electromagnetic interference (EMI).

Required CPU Design for Test Engineer, Cloud
In this role, you will be part of a varied team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You will contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next-generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Design-for-Test (DFT) Engineer, you will play a crucial role in DFT design, and support devices of extreme complexity to production. You will be responsible for developing flows, automation, and methodology, executing DFT activities. You will be responsible for test vectors end-to-end, from generating DFT content on complex design, debugging to coverage goals, simulating it at gate level, sign-off DFT to tapeout, and debugging Si results.The AI and Infrastructure team is redefining whats possible. We empower our customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency,
We're behind our groundbreaking innovations, empowering the development of AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Execute activities in the design, implementation, and verification of Design for Testing solutions for Application-Specific Integrated Circuit (ASICs).
Develop DFT strategy for array DFT, hierarchical DFT, Scan, and Automatic Test Pattern Generation (ATPG).
Perform ATPG, scan coverage debug and drive design fixes for coverage and quality improvements.
Perform DFT verification at RTL and gate level.
Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT design requirements are met and mutual dependencies are managed.