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4 ימים
Location: Yokne`am
Job Type: Full Time
We are looking for a Senior Formal Verification Engineer for our company Networking team!
This is an exciting opportunity to join a hardworking Pre-Silicon design and verification team, working on groundbreaking NIC technologies. We deploy state-of-the art formal verification tools and methodologies to prove design correctness. Working in our formal verification team will expose you to a wide range of cutting edge design and technologies. Our NIC team delivers world class CPU interface and offload solutions for HPC, data-center, network, and storage markets. We micro-architect, verify, and deliver the best and most widely used high BW ethernet and IB NICs in the industry. our company has the most sophisticated formal tools and methodologies in the industry, which help us achieve A0 design tapeouts. As part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.
What you'll be doing:
In this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.
You will work on ambitious designs along with our Pre-Silicon team and take part in developing the next generation of our company's core technology.
You will learn state of the art formal methodologies and advance your expertise in communication protocols and hardware implementations.
Requirements:
BSc in Electrical/Computer Engineering or MSc in Mathematics, or equivalent experience.
5+ years of relevant experience.
Excellent analytical, logical reasoning and problem-solving skills.
Strong debugging and analytical skills.
Strong communication and interpersonal skills are required.
Ways to stand out from the crowd:
Formal verification work experience.
Knowledge of digital logic.
This position is open to all candidates.
 
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4 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
we are looking for outstanding Chip Design Verification Engineers to join our Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
Come and take a significant part in designing and verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.
What you will be doing:
Join Tel Aviv group, working in a combined design and verification team which develops Phy Layer IP within the Networking silicon.
Build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.
Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, FW and Post-Silicon validation.
Requirements:
B.Sc in Electrical Engineering or equivalent experience.
5+ years of validated experience in RTL Frontend ASIC Design or Verification (Chip Design). Less experienced engineers with outstanding academic records will also be considered.
Strong debugging, problem-solving and analytical skills.
A great teammate with strong communication and interpersonal skills.
Ways to stand out from the crowd:
Knowledge in Specman.
Knowledge in Verilog.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8318141
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4 ימים
Location: Yokne`am
Job Type: Full Time
our company's Networking IC Product Engineering team is looking for a System Mechanical Characterization and Validation engineer, to take part of Networking system validation and characterization efforts of different platforms and products. You will be a part of a team working on groundbreaking technology. We are in need of hardworking and motivated engineers ready to define and lead validation activities. Do you have a mechanical aptitude, have passion for lab work, data analysis and hands-on problem solving related to mechanical aspects? We will be happy to have you on our team!
We are looking for a skilled and experienced Engineer with a focus on System Mechanical Validation to join our Engineering team in Yokneam, Israel. As part of this role, you will play a crucial role in ensuring the structural integrity and reliability of our advanced products. You will collaborate closely with mechanical design, system architecture and company-wide system, validation, reliability, thermal, and testing owners to devise and implement effective validation strategies, aligning with our high-quality standards.
What youll be doing:
Create and implement mechanical validation plans for new products.
Analyze and interpret validation results to identify potential mechanical issues.
Collaborate with design and architecture teams to define required mechanical validation and optimize and solve mechanical issues.
Design and develop test setups and procedures to evaluate mechanical performance and reliability.
Work closely with hardware and product teams to ensure seamless mechanical integration.
Provide technical expertise and guidance to junior team members on mechanical validation methodologies.
Maintain accurate documentation of mechanical validation activities and results.
Requirements:
Bachelor's or Master's degree in Mechanical Engineering or a related field, or equivalent experience.
5+ years of proven experience in mechanical validation.
Strong understanding of mechanical principles, materials science, and structural analysis.
Familiarity with mechanical testing methodologies, equipment, and data acquisition.
Experience with CAD software (e.g., SolidWorks, AutoCAD) for test fixture design.
Excellent problem-solving and analytical skills related to mechanical systems.
Ability to work collaboratively in a fast-paced and dynamic environment.
Exceptional communication and interpersonal skills.
Fluency in English.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8318101
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4 ימים
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
we are looking for a Senior Chip-Design Verification Engineer to join our Network Adapter Silicon group. As a Senior Verification Engineer at our company Networking Silicon team, you will join a group of passionate engineers to design and implement the next generation state-of-the-art Networking Silicon chips. In this position, you will make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
What you'll be doing:
Work in a combined design and verification team which develops core units within the Networking silicon.
Build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.
Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, FW and Post-Silicon validation.
Requirements:
B.Sc. in Electrical Engineering or Computer Engineering, or equivalent experience.
8+ years of proven experience in RTL verification.
Background in Specman.
Knowledge of HDL (Verilog/VHDL).
A great teammate with good communication and interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8318049
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
4 ימים
Location: Yokne`am
Job Type: Full Time
our company Networking IC Product Engineering team is looking for a System Electrical Characterization and Validation engineer, to take part of Networking system validation and characterization efforts of different platforms and products. You will be a part of a team working on groundbreaking technology. We are in need of hardworking and motivated engineers ready to define and lead validation activities. Do you have analog approach, have passion for lab work, data analysis and post-Si hands on problem solving? We will be happy to have you on our team!
We are looking for a skilled and experienced Engineer with a focus on System Electrical Validation to join our Engineering team in Yokneam, Israel. As part of this role, you will play a crucial role in ensuring the quality of our advanced products. You will collaborate closely with PHY design, system architecture and company wide system, validation, reliability, signal integrity and testing owners to devise and implement effective validation strategies, aligning with our high-quality standards.
What youll be doing:
Create and implement electrical validation plans for new products.
Analyze and interpret validation results to identify potential issues.
Collaborate with design and architecture teams to define required validation and optimize and solve electrical issues.
Design and develop test scripts and frameworks to automate validation processes.
Work closely with software and firmware teams to ensure seamless integration.
Provide technical expertise and guidance to junior team members.
Maintain accurate documentation of validation activities and results.
Requirements:
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience.
5+ years of proven experience in electrical validation.
Ability to analyze analog circuits and analog issues.
Familiarity with I/O protocol and electrical compliance and validation.
Proficiency in scripting languages such as Python, Perl, or Shell.
Excellent problem-solving and analytical skills.
Ability to work collaboratively in a fast-paced and dynamic environment.
Exceptional communication and interpersonal skills.
Fluency in English.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8317811
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4 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
We are now looking for a Senior Chip Design Verification Engineer to join our Switch Silicon team.As a Chip Design Engineer at our company's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
What You'll Be Doing:
Work in a design/verification team which develops core units within the Switch silicon.
Micro-architecture of dynamic verification environments planning for units and modules.
Design dynamic verification environments of units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.
Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW.
Requirements:
Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience.
5+ years of experience in RTL design/dynamic verification.
Knowledge in network protocols and/or HPC and distributed calculations - advantage.
A team player with good communication and interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8317762
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דיווח על תוכן לא הולם או מפלה
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שליחה
סגור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
4 ימים
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are now looking for a best-in-class Senior Chip Design Engineer to join our outstanding GPU-Networking Silicon Engineering team. As a DV Engineer at our company's GPU-Networking group, you'll make a real impact in a dynamic, technology-focused company while being a part of the team that develops the flagship product of todays semiconductor industry our companys GPU Super-Chip.
What youll be doing:
Work in a DV (Design Verification) team that has a global responsibility over deliverable units and clusters to the silicon GPU
Integrations and Full-Chip models
Verification of chip blocks/entities according to specifications under challenging constraints
Your daily work will involve all aspects of Design Verification : Planning, Coding, Coverage and Integration.
Requirements:
5+ years of experience in RTL design verification.
B.Sc. in Electrical Engineering or Computer Engineering.
A team player with good communication and interpersonal skills.
Ways to stand out from the crowd:
Knowledge in Specman and System-Verilog UVM
Knowledge in Networking.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8317758
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
4 ימים
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a Senior Chip Design Verification Engineer for developing the next generation DFT technologies.
As a Senior Chip Design Verification Engineer in the DFT team at our company, you will verify the design and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our DFT solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.
What you'll be doing:
In this position, you will be responsible for verification of the DFT design, architecture and micro-architecture using sophisticated verification methodologies.
As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.
Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.
Requirements:
BSc. in Electrical Engineering or Computer engineering, or equivalent experience.
5+ years of practical verification experience.
Experience in developing verification environments and random based verification for unit level and system level using verification tools (simulation tools, Verilog, debug tools like Simvision/Debussy).
Experience with Specman is a plus.
Good understanding of RTL design (Verilog).
Strong debugging, problem solving and analytical skills.
Excellent communication and social skills.
Ability to work in a geographically diverse team environment.
Self motivated, independent and target oriented.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8317717
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Jerusalem
Job Type: Full Time
our companys ADAS (Advanced Driver Assistance Systems) Execution & Validation group is looking for a sharp, driven, and technically oriented manager to lead cross-functional validation initiatives aimed at discovering bugs earlier in the development lifecycle. This role is at the heart of our effort to enhance validation methodologies across our companys ADAS algorithmic technologies, integrating AI-driven systems, data pipelines, and operational workflows. As the ADAS Validation Manager, youll orchestrate multiple teams, under you direct management, help shape our validation strategy and drive alignment across the organization. You will be the central point of contact for validation activities across ADAS, working closely with algorithm developers, analysts, and product stakeholders. If you thrive on managing complexity, pushing for excellence, and turning high-level goals into execution - we want to meet you.
What will your job look like:
Manage multiple validation-related teams, consisting of 10 people, while managing timelines, deliverables, and execution for diverse goals and expertise.
Lead multiple activities and initiatives across ADAS, with a focus on early detection of system bugs (shift left mindset).
Collaborate with algorithm developers, operational experts, and validation analysts to drive scalable validation tools and methodologies.
Drive innovation in validation by introducing AI/LLM-based tools and cutting-edge technologies into operational workflows.
Help set a high standard of excellence for cross-functional validation practices within the ADAS domain.
Youll oversee validation efforts across tech teams, working hand-in-hand with local validation groups to align goals, share insights, and push validation earlier in the pipeline.
Requirements:
B.Sc. in Computer Science or a related engineering field
5-10 years of proven experience managing complex, cross-functional technical projects, ideally in validation or algorithmic environments.
Proven track record in leading and managing teams.
Deep understanding of validation principles, QA, or system testing- must.
Strong background in project leadership: ownership, execution, timelines, and cross-team collaboration.
Hands-on background in software development or engineering (Python or C++ preferred)- strong advantage.
Familiarity with modern AI systems and operationalizing machine learning or LLM pipelines- advantage.
Strong communication skills and the ability to manage multiple stakeholders and priorities.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8316849
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Haifa
Job Type: Full Time
Which department will you join? You will be joining our company's SoC DDR team working on one of the most cutting-edge technologies - Autonomous Vehicle (AV). You will be taking part in developing validating the DDR interface of our current and future SoC family for ADAS and AV.
What will your job look like:
Validate the SoC DDR interface including the integration of advanced DDR controller and PHY.
Build unit level Verification of the DDR
Integrate Industry Standard (such as AXI and OCP) and other 3rd party VIPs.
Collaborate with designers, architects, and SW developers from Haifa and Jerusalem teams to deliver the most comprehensive verification environment.
Write and debug tests that combine UVM methodology and SW code.
Define, develop, and execute various complex validation scenarios on the DDR interface.
Requirements:
BSc in electrical engineering, computer engineering, or computer science
3+ years of experience working in verification environment, tests, and test bench development (SV/UVM/C/C++)
Knowledge in Industry Standard protocols such as AXI/OCP/APB - Advantage
Technical knowledge of DDR/LPDDR interface - advantage.
Ability to read complex HW specifications and define tests based on them.
Experience in Verilog \ system Verilog.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8316829
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Haifa
Job Type: Full Time
our companys Autonomous Driving group in Haifa is looking for an Electrical Validation & Embedded SW Engineer. This is an exciting opportunity to join a growing team of highly talented engineers, working on the worlds most advanced SoCs for ADAS and self-driving vehicles. In our company, Electrical Validation engineers enable, debug, and validate high-speed interfaces - like LPDDR4/5, PCIe Gen4/5, and CDPHY - using high-end Lab measurement equipment and advanced SW tools. This dynamic work environment requires interfacing with Silicon and hardware design engineers, Software developers, Signal Integrity, and System Validation teams. The proximity to Signal/Power integrity simulation activities - we are a single SI/EV team - is another powerful advantage, enabling joint simulation-measurement effort.
What will your job look like:
You will join a relatively small team of talented and experienced EV/SI/PI engineers with wide scope of responsibility, from Pre-Si SI/PI simulations to Post-Si Electrical validation and debug, covering all the high-speed analog interfaces of our companys EyeQ products.
Responsibilities include performing electrical spec compliance and system margin validation, interface optimization, statistical results analysis, validation flow definitions, and automation, etc.
You will also deal with FW development, automation enabling, data post-processing and debug of high-speed interfaces, like LPDDR4/5, PCIe Gen4/5, and D/C/MPHY.
Requirements:
BSc or MSc in Electrical or Computer engineering
3+ years of hands-on experience in validation or HW/SW debug, including the use of advanced lab equipment (Scope, BERT, etc.)
Hands-on experience with test automation development or FW development or automated data analysis
Strong debugging and advanced analysis experience
Experience in Signal/Power Integrity design- An advantage
Experience with analog circuits or PHY IP knowledge - An advantage
Strong sense of ownership, commitment, and responsibility
Good interpersonal communication skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8316821
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Jerusalem
Job Type: Full Time
You will be part of our company's REM department. our companys Road Experience Management (REM) is an end-to-end mapping and localization engine which is used for full autonomy capabilities and services. Generating validation process and methodologies for such a technology giant is challenging, sufficient & enriching work. Since we are dealing with a complex system based on machine learning and image processing, the analysis and validation processes require deep thinking as well as advanced technical and analytic abilities. You will be responsible for defining and developing validation infrastructure, tools and methods using cutting edge technology and cloud-based application.
What will your job look like?
Participate in planning and implementation of advanced validation Processes
Define and implement end-to-end validation tools and methods with advanced geometric calculations, logics, and heuristic
Integrating new features into existing Validation Processes
Improving sensitivity, efficiency, effectiveness, and quality of validation processes
Management and prioritization of daily tasks
Integration of tools and algorithms from different departments in the company and applying them into our validation infrastructure.
Requirements:
BSc in computer science, Mathematics, or similar field
3+ years of experience in designing, implementing, and automating algorithm validation or software testing, with a focus on performance testing for complex, data-intensive, or machine-learning algorithms.
Experience with Python (NumPy, SciPy, Matplotlib, Pandas)
Strong analytical capabilities and experience in data processing
Knowledge in descriptive statistics, probability, and statistical inference
Ability to juggle multiple tasks
Broad vision and a systematic approach
Thoroughness and attention to details
Independence, ability to learn new material quickly
Fluent English.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8316806
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Petah Tikva
Job Type: Full Time
Which team will you join? our company EyeC VLSI team - a group designing the chips for Radar systems for ADAS and autonomous cars. The group is responsible for all disciplines of VLSI development, including but not limited to Logic Design, Design Verification, Microarchitecture, Analog and circuit design and layout, Physical and structural design (backend), Product and test engineering.
What will your job look like:
You will take a central hands-on role in Design Verification.
Define Environment micro-Architect, Implement complex UVM environment, Build vPlan .
Execute coverage implementation.
Be part of external IP verification and Internal custom IP.
Be part of System definition and top-level activity.
Take part in Silicon bring-up.
Requirements:
Bsc/MSC in Electrical engineering/Computer engineering .
Over 5 years of experience in a design verification role .
Experience in UVM.
Experience in System Verilog.
Experience in high-speed I/F - Advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8316656
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שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Haifa
Job Type: Full Time
Which department will you join? our companys Unit Level Verification Team in Haifa is looking for an experienced verification engineer to be involved in the development of our companys future AI and deep learning HW accelerators. This is an exciting opportunity to join a team of highly talented engineers, working on the most cutting-edge technologies to deliver our companys EyeQ future chips, aimed to power the worlds first fully Autonomous Vehicle!
What will your job look like?
Define, implement and enhance verification environments using UVM methodology.
Write and debug tests that combine UVM methodology and SW code.
Identify and write various types of coverage measures.
Collaborate with designers, architects, and SW developers from Haifa and Jerusalem teams to deliver the most comprehensive verification environment.
Integrate Industry Standard (such as AXI and OCP) and other 3rd party VIPs.
Requirements:
BSc in electrical engineering, computer engineering, or computer science
8+ years of experience working in verification environment, tests, and test bench development (SV/UVM/C/C++)
System Verilog writing skills, preferably in OVM/UVM
SW embedded experience, C/C++ skills
TestPlan defining and Coverage-Driven Verification experience
3rd-party IPs integration testing experience
Waveform debugging with the latest EDA tools, root-cause bugs independently
Skills in scripting Perl/Python - Advantage
Knowledge in Industry Standard protocols such as AXI/OCP/APB - Advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8316634
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Petah Tikva
Job Type: Full Time
The Radar VLSI team at our company EyeC is looking for an experienced Formal Verification Engineer to join us! This is a newly established team with a mission to integrate Formal Verification as a key methodology in Radar projects. Be part of a cutting-edge group designing chips for radar systems in ADAS and autonomous vehicles, where your expertise will have a significant impact.
What will your job look like:
You will verify unique and complex design blocks.
Help determine the Formal strategy and methodology for the team.
Explore new Formal methods and tools.
Requirements:
4+ years of experience in Formal Verification.
Strong debug skills.
In-depth knowledge of how Formal works.
Experience in System Verilog - Advantage.
Knowledge in Industry Standard protocols such as AXI/OCP/APB - Advantage.
Experience with multiple clock domains during cover block by Formal.
Knowledge of the following programming languages: Perl/Bash/Tcl/Python.
Experience with Hardware Verification concepts and tools (UVM).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8316566
סגור
שירות זה פתוח ללקוחות VIP בלבד
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