לוח משרות דרושים &nbsp;ניהול - חשמל / אלקטרוניקה עבודה היברידית, לחיפוש זה נמצאו 4 משרות !

30/06/2026

ASIC Design Engineering Technical Leader

Location: Caesarea

Job Type: Full Time and Hybrid work

Required ASIC Design Engineering Technical Leader
Meet the Team
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
We are transforming the industry with a unified, programmable architecture powering our future routing portfolio and shaping the Internet for decades to come.
Your Impact:
Write and review micro-architecture specifications
Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
Contribute to full chip integration, timing methodology, and analysis
Collaborate with verification engineers to resolve bugs and achieve coverage closure
Work with the physical design team to close timing and PnR issues
Support design methodology evolution and best practices
Perform debug, root-cause analysis, and post-silicon validation in the lab.

Requirements:
Minimum Qualifications:
B.Sc./M.Sc. in Electrical Engineering from a top university
Minimum of 8 years of proven experience in a relevant field
RTL design experience
Familiarity with UVM and functional verification methodologies
Preferred Qualifications:
Experience with MATLAB simulations and bit-exact modeling environments
Familiarity with mixed-signal systems and environments
Knowledge and hands-on experience with Clock Domain Crossing (CDC).

This position is open to all candidates.

עדכון קורות החיים לפני שליחה

8717092

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30/06/2026

Physical Design Manager

Location: Tel Aviv-Yafo and Caesarea

Job Type: Full Time and Hybrid work

We are seeking a Physical Design Manager.
Meet the Team:
Physical Design team within Silicon One is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.
We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.
Your Impact:
You'll be part of the Silicon One team, which is at the heart of our software and ASIC design efforts.
As the Physical Design Manager, you will provide strategic and technical leadership to a team of engineers, guiding them through the entire chip design lifecycle. You will be responsible for the group's output, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.

Requirements:
Minimum Qualifications
A VLSI Design with extensive experience in backend design
B.Sc./M.Sc. in Electrical Engineering.
Strong understanding of Place & Route flow.
10+ years of hands-on experience in a relevant domain
4+ years of proven Management or Technical Leadership experience.
Preferred Qualifications
Deep understanding of all aspects of Physical construction and Integration.
Knowledge in Physical Design Verification methodology LVS/DRC.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

This position is open to all candidates.

עדכון קורות החיים לפני שליחה

8716804

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מייל

תיאור

שליחה

תודה על שיתוף הפעולה

מודים לך שלקחת חלק בשיפור התוכן שלנו :)

המשרה נמחקה

תוכל לצפות בה בדף המשרות שלי

המשרה הוחזרה לרשימת תוצאות החיפוש

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אירעה שגיאה בשליחת פרטיך למשרה

30/06/2026

ASIC Leader

Location: Tel Aviv-Yafo and Caesarea

Job Type: Full Time and Hybrid work

Required ASIC Leader
Meet the Team
Join the Silicon One Front-End Design team, at the core of our silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation.
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
We are transforming the industry with a unified, programmable architecture powering our future routing portfolio and shaping the Internet for decades to come.
Your Impact
Review micro-architecture specifications
Supervise verification team members and provide professional guidance
Implement Verification environment UVM based
Collaborate with Design engineers to resolve bugs and achieve coverage closure
Work with the firmware/Lab teams to verify chip flows
Perform debug, root-cause analysis, and post-silicon validation in the lab.

Requirements:
Minimum Qualifications
B.Sc./M.Sc. in Electrical Engineering from a top university
10+ years of experience in the filed
knowledge with UVM and functional verification methodologies
Preferred Qualifications:
Experience with MATLAB simulations and bit-exact modeling environments
Familiarity with mixed-signal systems and environments
Knowledge and hands-on experience with GLS.

This position is open to all candidates.

עדכון קורות החיים לפני שליחה

8716793

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דיווח על תוכן לא הולם או מפלה

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שמך המלאמה השם שלך?

מייל

תיאור

שליחה

תודה על שיתוף הפעולה

מודים לך שלקחת חלק בשיפור התוכן שלנו :)

המשרה נמחקה

תוכל לצפות בה בדף המשרות שלי

המשרה הוחזרה לרשימת תוצאות החיפוש

האם תרצה להסיר את המשרה מרשימת

המשרות השמורות שלך?

כן לא

אירעה שגיאה בשליחת פרטיך למשרה

30/06/2026

Physical Design Technical Leader

Location: Tel Aviv-Yafo and Caesarea

Job Type: Full Time and Hybrid work

We are seeking a Physical Design Technical Leader.
Meet the Team
Physical Design team within is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.
We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.
Your Impact:
You'll be part of the Silicon One team, which is at the heart of our software and ASIC design efforts.
You'll handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.

Requirements:
Minimum Requirements:
A VLSI Design with extensive experience in backend design
B.Sc./M.Sc. in Electrical Engineering.
Strong understanding of Place & Route flow.
7+ years of hands-on experience in a relevant domain
Preferred/Advantageous Qualifications:
Deep understanding of all aspects of Physical construction and Integration.
Knowledge in Physical Design Verification methodology LVS/DRC.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
Great teammate, self-learning skills, and ability to work autonomously.

This position is open to all candidates.

עדכון קורות החיים לפני שליחה

8716665

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